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[Qemu-commits] [qemu/qemu] b2ae52: target/i386: define md-clear bit
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] b2ae52: target/i386: define md-clear bit |
Date: |
Thu, 23 May 2019 01:55:31 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: b2ae52101fca7f9547ac2f388085dbc58f8fe1c0
https://github.com/qemu/qemu/commit/b2ae52101fca7f9547ac2f388085dbc58f8fe1c0
Author: Paolo Bonzini <address@hidden>
Date: 2019-05-21 (Tue, 21 May 2019)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
target/i386: define md-clear bit
md-clear is a new CPUID bit which is set when microcode provides the
mechanism to invoke a flush of various exploitable CPU buffers by invoking
the VERW instruction.
Signed-off-by: Paolo Bonzini <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Commit: 2c7e82a30774730100da9dbe68d2360459030d91
https://github.com/qemu/qemu/commit/2c7e82a30774730100da9dbe68d2360459030d91
Author: Daniel P. Berrangé <address@hidden>
Date: 2019-05-21 (Tue, 21 May 2019)
Changed paths:
M docs/qemu-cpu-models.texi
Log Message:
-----------
docs: recommend use of md-clear feature on all Intel CPUs
Update x86 CPU model guidance to recommend that the md-clear feature is
manually enabled with all Intel CPU models, when supported by the host
microcode.
Signed-off-by: Daniel P. Berrangé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Commit: 20140a82c67467f53814ca197403d5e1b561a5e5
https://github.com/qemu/qemu/commit/20140a82c67467f53814ca197403d5e1b561a5e5
Author: Paolo Bonzini <address@hidden>
Date: 2019-05-21 (Tue, 21 May 2019)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
target/i386: add MDS-NO feature
Microarchitectural Data Sampling is a hardware vulnerability which allows
unprivileged speculative access to data which is available in various CPU
internal buffers.
Some Intel processors use the ARCH_CAP_MDS_NO bit in the
IA32_ARCH_CAPABILITIES
MSR to report that they are not vulnerable, make it available to guests.
Signed-off-by: Paolo Bonzini <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Commit: 542ad0eb9571577107c125079fa11eaa368363f4
https://github.com/qemu/qemu/commit/542ad0eb9571577107c125079fa11eaa368363f4
Author: Peter Maydell <address@hidden>
Date: 2019-05-21 (Tue, 21 May 2019)
Changed paths:
M docs/qemu-cpu-models.texi
M target/i386/cpu.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request'
into staging
x86 MDS feature flags
md-clear and mds-no feature flags, for detection and mitigation
of MDS vulnerabilities (CVE-2018-12126, CVE-2018-12127,
CVE-2018-12130, CVE-2019-11091).
# gpg: Signature made Tue 21 May 2019 19:42:43 BST
# gpg: using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <address@hidden>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/x86-next-pull-request:
target/i386: add MDS-NO feature
docs: recommend use of md-clear feature on all Intel CPUs
target/i386: define md-clear bit
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/a4f667b67149...542ad0eb9571
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