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[Qemu-commits] [qemu/qemu] 2089fc: tcg: Implement tcg_gen_extract2_{i32,

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 2089fc: tcg: Implement tcg_gen_extract2_{i32, i64}
Date: Sun, 28 Apr 2019 07:53:05 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 2089fcc9e7b4174d1c351eaa7d277c02188a6dd2
      
https://github.com/qemu/qemu/commit/2089fcc9e7b4174d1c351eaa7d277c02188a6dd2
  Author: David Hildenbrand <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/tcg-op.c
    M tcg/tcg-op.h

  Log Message:
  -----------
  tcg: Implement tcg_gen_extract2_{i32,i64}

Will be helpful for s390x. Input 128 bit and output 64 bit only,
which is sufficient for now.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
[rth: Add matching tcg_gen_extract2_i32.]
Signed-off-by: Richard Henderson <address@hidden>


  Commit: fce1296f135669eca85dc42154a2a352c818ad76
      
https://github.com/qemu/qemu/commit/fce1296f135669eca85dc42154a2a352c818ad76
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/riscv/tcg-target.h
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg-op.c
    M tcg/tcg-opc.h
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Add INDEX_op_extract2_{i32,i64}

This will let backends implement the double-word shift operation.

Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 02616bad6f0788652deaca9a48d0dfa7716ff87a
      
https://github.com/qemu/qemu/commit/02616bad6f0788652deaca9a48d0dfa7716ff87a
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Use deposit and extract2 in tcg_gen_shifti_i64

Signed-off-by: Richard Henderson <address@hidden>


  Commit: b0a6056719b4a409a5699d11bbfdf79301417221
      
https://github.com/qemu/qemu/commit/b0a6056719b4a409a5699d11bbfdf79301417221
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Use extract2 in tcg_gen_deposit_{i32,i64}

Signed-off-by: Richard Henderson <address@hidden>


  Commit: c6fb8c0cf704c4a1a48c3e99e995ad4c58150dab
      
https://github.com/qemu/qemu/commit/c6fb8c0cf704c4a1a48c3e99e995ad4c58150dab
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Support INDEX_op_extract2_{i32,i64}

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3b832d67a993968868f4087a9720a5c911e23f7a
      
https://github.com/qemu/qemu/commit/3b832d67a993968868f4087a9720a5c911e23f7a
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/arm/tcg-target.h
    M tcg/arm/tcg-target.inc.c

  Log Message:
  -----------
  tcg/arm: Support INDEX_op_extract2_i32

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 464c2969d5d7a0a5d38d2aa5d930986df876d3fb
      
https://github.com/qemu/qemu/commit/464c2969d5d7a0a5d38d2aa5d930986df876d3fb
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/aarch64/tcg-target.inc.c

  Log Message:
  -----------
  tcg/aarch64: Support INDEX_op_extract2_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8b86d6d25807e13a63ab6ea879f976b9f18cc45a
      
https://github.com/qemu/qemu/commit/8b86d6d25807e13a63ab6ea879f976b9f18cc45a
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M include/exec/exec-all.h
    M include/exec/translator.h
    M target/alpha/translate.c
    M target/arm/translate.c
    M target/cris/translate.c
    M target/hppa/translate.c
    M target/i386/translate.c
    M target/lm32/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/translate.c
    M target/moxie/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/s390x/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tilegx/translate.c
    M target/tricore/translate.c
    M target/unicore32/translate.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  tcg: Hoist max_insns computation to tb_gen_code

In order to handle TB's that translate to too much code, we
need to place the control of the length of the translation
in the hands of the code gen master loop.

Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6e6c4efed995d9eca6ae0cfdb2252df830262f50
      
https://github.com/qemu/qemu/commit/6e6c4efed995d9eca6ae0cfdb2252df830262f50
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M accel/tcg/translate-all.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Restart after TB code generation overflow

If a TB generates too much code, try again with fewer insns.

Fixes: https://bugs.launchpad.net/bugs/1824853
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7ecd02a06f8f4c0bbf872ecc15e37035b7e1df5f
      
https://github.com/qemu/qemu/commit/7ecd02a06f8f4c0bbf872ecc15e37035b7e1df5f
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Restart TB generation after relocation overflow

If the TB generates too much code, such that backend relocations
overflow, try again with a smaller TB.  In support of this, move
relocation processing from a random place within tcg_out_op, in
the handling of branch opcodes, to a new function at the end of
tcg_gen_code.

This is not a complete solution, as there are additional relocs
generated for out-of-line ldst handling and constant pools.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 1768987b73fa7e23e58b7844abe5882490ff8e42
      
https://github.com/qemu/qemu/commit/1768987b73fa7e23e58b7844abe5882490ff8e42
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/tcg-pool.inc.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Restart TB generation after constant pool overflow

This is part b of relocation overflow handling.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: aeee05f53a5d67304a521d2644dc0a607e3c8b28
      
https://github.com/qemu/qemu/commit/aeee05f53a5d67304a521d2644dc0a607e3c8b28
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/aarch64/tcg-target.inc.c
    M tcg/arm/tcg-target.inc.c
    M tcg/i386/tcg-target.inc.c
    M tcg/mips/tcg-target.inc.c
    M tcg/ppc/tcg-target.inc.c
    M tcg/riscv/tcg-target.inc.c
    M tcg/s390/tcg-target.inc.c
    M tcg/tcg-ldst.inc.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Restart TB generation after out-of-line ldst overflow

This is part c of relocation overflow handling.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: a7cdaf710f2aaaf0be855a338dd67463d4bb99e2
      
https://github.com/qemu/qemu/commit/a7cdaf710f2aaaf0be855a338dd67463d4bb99e2
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-24 (Wed, 24 Apr 2019)

  Changed paths:
    M tcg/ppc/tcg-target.inc.c

  Log Message:
  -----------
  tcg/ppc: Allow the constant pool to overflow at 32k

There is no point in coding for a 2GB offset when the max TB size
is already limited to 64k.  If we further restrict to 32k then we
can eliminate the extra ADDIS instruction.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: b4b82d7e9caff7ccca5c621817b5a4b8e95eb9b1
      
https://github.com/qemu/qemu/commit/b4b82d7e9caff7ccca5c621817b5a4b8e95eb9b1
  Author: Richard Henderson <address@hidden>
  Date:   2019-04-25 (Thu, 25 Apr 2019)

  Changed paths:
    M tcg/arm/tcg-target.inc.c

  Log Message:
  -----------
  tcg/arm: Restrict constant pool displacement to 12 bits

This will not necessarily restrict the size of the TB, since for v7
the majority of constant pool usage is for calls from the out-of-line
ldst code, which is already at the end of the TB.  But this does
allow us to save one insn per reference on the off-chance.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: ef5dae6805cce7b59d129d801bdc5db71bcbd60d
      
https://github.com/qemu/qemu/commit/ef5dae6805cce7b59d129d801bdc5db71bcbd60d
  Author: Shahab Vahedi <address@hidden>
  Date:   2019-04-25 (Thu, 25 Apr 2019)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  cputlb: Fix io_readx() to respect the access_type

This change adapts io_readx() to its input access_type. Currently
io_readx() treats any memory access as a read, although it has an
input argument "MMUAccessType access_type". This results in:

1) Calling the tlb_fill() only with MMU_DATA_LOAD
2) Considering only entry->addr_read as the tlb_addr

Buglink: https://bugs.launchpad.net/qemu/+bug/1825359
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Shahab Vahedi <address@hidden>
Message-Id: <address@hidden>
[rth: Remove assert; fix expression formatting.]
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e0fb2c3d89aa77057ac4aa073e01f4ca484449b0
      
https://github.com/qemu/qemu/commit/e0fb2c3d89aa77057ac4aa073e01f4ca484449b0
  Author: Peter Maydell <address@hidden>
  Date:   2019-04-28 (Sun, 28 Apr 2019)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/translate-all.c
    M accel/tcg/translator.c
    M include/exec/exec-all.h
    M include/exec/translator.h
    M target/alpha/translate.c
    M target/arm/translate.c
    M target/cris/translate.c
    M target/hppa/translate.c
    M target/i386/translate.c
    M target/lm32/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/translate.c
    M target/moxie/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/s390x/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tilegx/translate.c
    M target/tricore/translate.c
    M target/unicore32/translate.c
    M target/xtensa/translate.c
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/aarch64/tcg-target.inc.c
    M tcg/arm/tcg-target.h
    M tcg/arm/tcg-target.inc.c
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c
    M tcg/riscv/tcg-target.h
    M tcg/riscv/tcg-target.inc.c
    M tcg/s390/tcg-target.h
    M tcg/s390/tcg-target.inc.c
    M tcg/sparc/tcg-target.h
    M tcg/tcg-ldst.inc.c
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg-pool.inc.c
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190426' into staging

Add tcg_gen_extract2_*.
Deal with overflow of TranslationBlocks.
Respect access_type in io_readx.

# gpg: Signature made Fri 26 Apr 2019 18:17:01 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Richard Henderson <address@hidden>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190426:
  cputlb: Fix io_readx() to respect the access_type
  tcg/arm: Restrict constant pool displacement to 12 bits
  tcg/ppc: Allow the constant pool to overflow at 32k
  tcg: Restart TB generation after out-of-line ldst overflow
  tcg: Restart TB generation after constant pool overflow
  tcg: Restart TB generation after relocation overflow
  tcg: Restart after TB code generation overflow
  tcg: Hoist max_insns computation to tb_gen_code
  tcg/aarch64: Support INDEX_op_extract2_{i32,i64}
  tcg/arm: Support INDEX_op_extract2_i32
  tcg/i386: Support INDEX_op_extract2_{i32,i64}
  tcg: Use extract2 in tcg_gen_deposit_{i32,i64}
  tcg: Use deposit and extract2 in tcg_gen_shifti_i64
  tcg: Add INDEX_op_extract2_{i32,i64}
  tcg: Implement tcg_gen_extract2_{i32,i64}

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/9ec34ecc97bc...e0fb2c3d89aa
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