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[Qemu-commits] [qemu/qemu] 49e9fd: spapr: Correctly set LPCR[GTSE] in H_

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 49e9fd: spapr: Correctly set LPCR[GTSE] in H_REGISTER_PROC...
Date: Tue, 19 Mar 2019 04:50:25 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 49e9fdd741301a891493caf0d3936249504e7fdc
      
https://github.com/qemu/qemu/commit/49e9fdd741301a891493caf0d3936249504e7fdc
  Author: David Gibson <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M hw/ppc/spapr_hcall.c

  Log Message:
  -----------
  spapr: Correctly set LPCR[GTSE] in H_REGISTER_PROCESS_TABLE

176dccee "target/ppc/spapr: Clear partition table entry when allocating
hash table" reworked the H_REGISTER_PROCESS_TABLE hypercall, but
unfortunately due to a small error no longer correctly sets the LPCR[GTSE]
bit which allows the guest to directly execute (some types of) tlbie (TLB
flush) instructions without involving the hypervisor.

We got away with this, initially, because POWER9 did not have hypervisor
mode enabled in its msr_mask, which meant we didn't actually run hypervisor
privilege checks in TCG at all.  However, da874d90 "target/ppc: add HV
support for POWER9" turned on HV support on POWER9 for the benefit of the
powernv machine type.

This exposed the earlier bug in H_REGISTER_PROCESS_TABLE, and causes guests
which rely on LPCR[GTSE] (i.e. basically all of them) to crash during early
boot when their first tlbie instruction causes an unexpected trap.

Fixes: 176dccee target/ppc/spapr: Clear partition table entry when allocating 
hash table
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Tested-by: Cleber Rosa <address@hidden>


  Commit: 1a7c00bb3aa4cf5501343fe041e93227ec33e66f
      
https://github.com/qemu/qemu/commit/1a7c00bb3aa4cf5501343fe041e93227ec33e66f
  Author: Cédric Le Goater <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M pc-bios/skiboot.lid
    M roms/skiboot

  Log Message:
  -----------
  ppc/pnv: update skiboot to commit 261ca8e779e5.

It includes better support for POWER9 processor and the QEMU platform.
DD1.0 workarounds have been removed which simplifies a bit the XIVE
PowerNV model.

Built from submodule.

Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 1af82d4f287332862f340f4daed2d8ffd99ad657
      
https://github.com/qemu/qemu/commit/1af82d4f287332862f340f4daed2d8ffd99ad657
  Author: Cédric Le Goater <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: PPC: add a PowerNV machine entry

and declare David and myself as maintainers of the PPC PowerNV
(Non-Virtualized) machine using the OPAL (skiboot) firmware.

Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 26aa5b1eeb086a67efc859933e04137e79aeac78
      
https://github.com/qemu/qemu/commit/26aa5b1eeb086a67efc859933e04137e79aeac78
  Author: Greg Kurz <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M hw/ppc/pnv.c

  Log Message:
  -----------
  ppc/pnv: Use local_err variable in pnv_chip_power9_intc_create()

Detected by Coverity: CID 1399702

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: f3e971ac9b64067ec94aab11653f92f74ca084aa
      
https://github.com/qemu/qemu/commit/f3e971ac9b64067ec94aab11653f92f74ca084aa
  Author: Greg Kurz <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M hw/ppc/pnv_psi.c

  Log Message:
  -----------
  ppc/pnv: Fix variable size in pnv_psi_power9_irq_set()

PSI registers are 64-bit.

Spotted by Coverity: CID 1399704

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: ebc184be647259ad1f684da8205afb405834b421
      
https://github.com/qemu/qemu/commit/ebc184be647259ad1f684da8205afb405834b421
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M hw/intc/xics_spapr.c

  Log Message:
  -----------
  ppc/xics/spapr: Fix H_IPOLL implementation

H_IPOLL takes the CPU# of the processor to poll as an argument,
it doesn't operate on self.

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: e366d181ceb96109b3f4fc6f8356bea644117f9a
      
https://github.com/qemu/qemu/commit/e366d181ceb96109b3f4fc6f8356bea644117f9a
  Author: Markus Armbruster <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M hw/ppc/spapr_pci.c

  Log Message:
  -----------
  spapr: Remove NULL checks on error_propagate() calls

Patch created mechanically by rerunning:

  $  spatch --sp-file scripts/coccinelle/error_propagate_null.cocci \
            --macro-file scripts/cocci-macro-file.h \
            --dir . --in-place

Signed-off-by: Markus Armbruster <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 86e2fca2d7f163c50b80254e0afdd4e16378b3bb
      
https://github.com/qemu/qemu/commit/86e2fca2d7f163c50b80254e0afdd4e16378b3bb
  Author: Peter Maydell <address@hidden>
  Date:   2019-03-19 (Tue, 19 Mar 2019)

  Changed paths:
    M MAINTAINERS
    M hw/intc/xics_spapr.c
    M hw/ppc/pnv.c
    M hw/ppc/pnv_psi.c
    M hw/ppc/spapr_hcall.c
    M hw/ppc/spapr_pci.c
    M pc-bios/skiboot.lid
    M roms/skiboot

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190319' into 
staging

ppc patch queue for 2019-03-19

This is a small set, it has a number of fixes and a couple of minor
cleanups to go in for the hard freeze.

# gpg: Signature made Tue 19 Mar 2019 10:05:48 GMT
# gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <address@hidden>" [full]
# gpg:                 aka "David Gibson (Red Hat) <address@hidden>" [full]
# gpg:                 aka "David Gibson (ozlabs.org) <address@hidden>" [full]
# gpg:                 aka "David Gibson (kernel.org) <address@hidden>" 
[unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-4.0-20190319:
  spapr: Remove NULL checks on error_propagate() calls
  ppc/xics/spapr: Fix H_IPOLL implementation
  ppc/pnv: Fix variable size in pnv_psi_power9_irq_set()
  ppc/pnv: Use local_err variable in pnv_chip_power9_intc_create()
  MAINTAINERS: PPC: add a PowerNV machine entry
  ppc/pnv: update skiboot to commit 261ca8e779e5.
  spapr: Correctly set LPCR[GTSE] in H_REGISTER_PROCESS_TABLE

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/54281eefc259...86e2fca2d7f1
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