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[Qemu-commits] [qemu/qemu] a5f5ca: target/s390x: Remove non-architected
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] a5f5ca: target/s390x: Remove non-architected entries from ... |
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Date: |
Mon, 11 Mar 2019 17:16:07 +0000 (UTC) |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: a5f5ca5eafb9c61641e243b6360506770e583386
https://github.com/qemu/qemu/commit/a5f5ca5eafb9c61641e243b6360506770e583386
Author: Thomas Huth <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/internal.h
Log Message:
-----------
target/s390x: Remove non-architected entries from struct LowCore
There are some fields in our struct LowCore which apparently have
been copied from a very old version of the Linux kernel. These
fields are not architected in the "Principles of Operation", and
only used on these memory locations in Linux kernels older than
2.6.29. Newer Linux kernels moved the entries to different locations
or are not using them at all anymore. Thus we should never access
these fields from the QEMU side, so they should be removed.
While we're at it, also add a QEMU_BUILD_BUG_ON() statement to
assert that struct LowCore has the right size.
Reviewed-by: David Hildenbrand <address@hidden>
Signed-off-by: Thomas Huth <address@hidden>
Message-Id: <address@hidden>
Acked-by: Christian Borntraeger <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 481accd4f52496a86aa347c8c5de01765a388f83
https://github.com/qemu/qemu/commit/481accd4f52496a86aa347c8c5de01765a388f83
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-format.def
M target/s390x/translate.c
Log Message:
-----------
s390x/tcg: Define vector instruction formats
These are the new instruction formats related to vector instructions as
up to the z14 (a.k.a. latest PoP).
As v2 appeares (like x2 in VRX) with d2/b2 in VRV, we have to assign it a
higher field number to avoid collisions.
Properly take care of the MSB (to be able to address 32 registers) for
each vector register field stored in the RXB field (Bit 36 - 30 for all
vector instructions). As we have 32 bit vector registers and the
"v" fields are only 4 bit in size, the 5th bit is stored in the RXB.
We use a new type to indicate that the MSB has to be fetched from the
RXB.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: b971a2fda3c87adf4d57d81cf5e24fba59e36924
https://github.com/qemu/qemu/commit/b971a2fda3c87adf4d57d81cf5e24fba59e36924
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/cpu.h
M target/s390x/translate.c
Log Message:
-----------
s390x/tcg: Check vector register instructions at central point
Check them at a central point. We'll use a new instruction flag to
flag all vector instructions (IF_VEC) and handle it very similar to
AFP, whereby we use another unused position in the PSW mask to store
the state of vector register enablement per translation block.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 5b5d2090de187937baf15674aca20299f2ea8e89
https://github.com/qemu/qemu/commit/5b5d2090de187937baf15674aca20299f2ea8e89
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
A target/s390x/vec.h
Log Message:
-----------
s390x/tcg: Utilities for vector instruction helpers
We'll have to read/write vector elements quite frequently from helpers.
The tricky bit is properly taking care of endianess. Handle it similar
to aarch64.
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 6d841663be823d69a7dc22c5a175b8934d55c39c
https://github.com/qemu/qemu/commit/6d841663be823d69a7dc22c5a175b8934d55c39c
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate.c
A target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR GATHER ELEMENT
Let's start with a more involved one, but it is the first in the list
of vector support instructions (introduced with the vector facility).
Good thing is, we need a lot of basic infrastructure for this. Reading
and writing vector elements as well as checking element validity.
All vector instruction related translation functions will reside in
translate_vx.inc.c, to be included in translate.c - similar to how
other architectures handle it.
While at it, directly add some documentation (which contains parts about
things added in follow-up patches, but splitting this up does not make
too much sense). Also add ES_* defines heavily used later.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 64052062a4696417e613ffc01d7b37c81e4c9012
https://github.com/qemu/qemu/commit/64052062a4696417e613ffc01d7b37c81e4c9012
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate.c
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR GENERATE BYTE MASK
Let's optimize it for the common cases (setting a vector to zero or all
ones) - courtesy of Richard.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: eeb11a90a68ed4d1be433187c3cb0b90b85d2e18
https://github.com/qemu/qemu/commit/eeb11a90a68ed4d1be433187c3cb0b90b85d2e18
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR GENERATE MASK
Add gen_gvec_dupi() for handling duplication of immediates, so it can
be reused later.
Reviewed-by: Richard Henderson <address@hidden
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: b4f5ae47d8f3d4f31ccd78c8c02c1e7f206b5ef5
https://github.com/qemu/qemu/commit/b4f5ae47d8f3d4f31ccd78c8c02c1e7f206b5ef5
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD
When loading from memory, load both elements into temps first before
modifying the target vector
Loading with strange alingment from the end of the address space will
not properly wrap, we can ignore that for now.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 79c1620aeac0bddd0466c4baf217e77337319c9a
https://github.com/qemu/qemu/commit/79c1620aeac0bddd0466c4baf217e77337319c9a
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD AND REPLICATE
We can use tcg_gen_gvec_dup_i64() to carry out the duplication.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 4b664394638b71935d953a8c33c1403e8d03a14b
https://github.com/qemu/qemu/commit/4b664394638b71935d953a8c33c1403e8d03a14b
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD ELEMENT
Fairly easy, load with desired size and store it into the right element.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: e6790d3211185ee4c20fef38fb025f87c1931350
https://github.com/qemu/qemu/commit/e6790d3211185ee4c20fef38fb025f87c1931350
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD ELEMENT IMMEDIATE
Take care of properly sign-extending the immediate.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 5d203bea599bcfbcca00a1f614784a2cfd17e0f8
https://github.com/qemu/qemu/commit/5d203bea599bcfbcca00a1f614784a2cfd17e0f8
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD GR FROM VR ELEMENT
To avoid an helper, we have to do the actual calculation of the element
address (offset in cpu_env + cpu_env) manually. Factor that out into
get_vec_element_ptr_i64(). The same logic will be reused for "VECTOR
LOAD VR ELEMENT FROM GR".
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: f180da83c039acfd9ac949c029b154c118a7b293
https://github.com/qemu/qemu/commit/f180da83c039acfd9ac949c029b154c118a7b293
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD LOGICAL ELEMENT AND ZERO
Fairly easy, zero out the vector before we load the desired element.
Load the element before touching the vector.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 0a85f8257aa9aac4b71b9d57fa8e250321163aea
https://github.com/qemu/qemu/commit/0a85f8257aa9aac4b71b9d57fa8e250321163aea
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD MULTIPLE
Try to load the last element first. Access to the first element will
be checked afterwards. This way, we can guarantee that the vector is
not modified before we checked for all possible exceptions. (16 vectors
cannot cross more than two pages)
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 60e9e3f1b0117a3aefd4a8047168f1c20f6c9013
https://github.com/qemu/qemu/commit/60e9e3f1b0117a3aefd4a8047168f1c20f6c9013
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/Makefile.objs
M target/s390x/helper.h
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
A target/s390x/vec_helper.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARY
Very similar to LOAD COUNT TO BLOCK BOUNDARY, but instead of only
calculating, the actual vector is loaded. Use a temporary vector to
not modify the real vector on exceptions. Initialize that one to zero,
to not leak any data. Provide a fast path if we're loading a full
vector.
As we don't have gvec ool handlers for single vectors, just calculate
the vector address manually.
We can reuse the helper later on for VECTOR LOAD WITH LENGTH. In fact,
we are going to name it "vll" right from the beginning, because that's
a better match.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 90e3af6bb8674c551d523a025048d783fb2a96bc
https://github.com/qemu/qemu/commit/90e3af6bb8674c551d523a025048d783fb2a96bc
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GR
Very similar to VECTOR LOAD GR FROM VR ELEMENT, just the opposite
direction. Also provide a fast path in case we don't care about the
register content.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 76dbd28935273e5367e2701d82e636bf22fe85af
https://github.com/qemu/qemu/commit/76dbd28935273e5367e2701d82e636bf22fe85af
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD VR FROM GRS DISJOINT
Fairly easy, just load from to gprs into a single vector.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: f6c7ff67574d1dd7266e6a0e16db5e891b3a4444
https://github.com/qemu/qemu/commit/f6c7ff67574d1dd7266e6a0e16db5e891b3a4444
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate.c
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR LOAD WITH LENGTH
We can reuse the helper introduced along with VECTOR LOAD TO BLOCK
BOUNDARY. We just have to take care of converting the highest index into
a length.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 2ff47e6cce21c7a210d99f018d10a94404e797e9
https://github.com/qemu/qemu/commit/2ff47e6cce21c7a210d99f018d10a94404e797e9
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR MERGE (HIGH|LOW)
We cannot use gvec expansion as source and destination elements are
have different element numbers. So we'll expand using a fancy loop.
Also, we have to take care of overlapping source and destination
registers, therefore use a safe evaluation irder depending on the
operation.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 73946f0d556453da9605ee0e258220dfc3dfd622
https://github.com/qemu/qemu/commit/73946f0d556453da9605ee0e258220dfc3dfd622
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/helper.h
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
M target/s390x/vec_helper.c
Log Message:
-----------
s390x/tcg: Implement VECTOR PACK *
This is a big one. Luckily we only have a limited set of such nasty
instructions.
We'll implement all variants with helpers, except when sources and
the destination don't overlap for VECTOR PACK. Provide different helpers
when the cc is to be modified. We'll return the cc then via env->cc_op.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 7aaf844d46ae8153a6219493b11623f62971b60a
https://github.com/qemu/qemu/commit/7aaf844d46ae8153a6219493b11623f62971b60a
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/helper.h
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
M target/s390x/vec_helper.c
Log Message:
-----------
s390x/tcg: Implement VECTOR PERMUTE
Take care of overlying inputs and outputs by using a temporary vector.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 66bb3333bc5c657be96d4dd3172d7efa9398a401
https://github.com/qemu/qemu/commit/66bb3333bc5c657be96d4dd3172d7efa9398a401
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATE
Read the whole input before modifying the destination vector.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 28d08731b1d826ddadcd062bae6fc717250e7667
https://github.com/qemu/qemu/commit/28d08731b1d826ddadcd062bae6fc717250e7667
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR REPLICATE
Replicate via the special gvec helper.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 3a338e29dfc892418b1ecd4401f84da8e8d80a40
https://github.com/qemu/qemu/commit/3a338e29dfc892418b1ecd4401f84da8e8d80a40
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR REPLICATE IMMEDIATE
Like VECTOR REPLICATE, but the element to be replicated comes from an
immediate.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 7007ec27a9f731d3012dfedf639d8cb469c631bb
https://github.com/qemu/qemu/commit/7007ec27a9f731d3012dfedf639d8cb469c631bb
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR SCATTER ELEMENT
Similar to VECTOR GATHER ELEMENT, but the other direction.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: db23070c7607301088ed2a3ef85bef0b3af80a30
https://github.com/qemu/qemu/commit/db23070c7607301088ed2a3ef85bef0b3af80a30
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR SELECT
Provide an implementation based on i64 and on real host vectors.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: a2338cfb07536c1d3c19ab9b698cb9c3e2a58ea2
https://github.com/qemu/qemu/commit/a2338cfb07536c1d3c19ab9b698cb9c3e2a58ea2
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD
Load both elements signed and store them into the two 64 bit elements.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: c5a7392cfb965f70cff72155945a81ad62dd20a5
https://github.com/qemu/qemu/commit/c5a7392cfb965f70cff72155945a81ad62dd20a5
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/helper.h
M target/s390x/internal.h
M target/s390x/mem_helper.c
Log Message:
-----------
s390x/tcg: Provide probe_write_access helper
Instead of checking e.g. the first access on every touched page, we should
check the actual access, otherwise we might get false positives when Low
Address Protection (LAP) is active. As probe_write() can only deal with
accesses to one page, we have to loop.
Use i64 for the length, although not needed - easier to reuse
TCG temps we already have in the translation functions where this will
be used. Also allow it to be used from other helpers.
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
[CH: add missing page_check_range()]
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 15e12add0b1256f3e699541c2eb8320e0f63a02d
https://github.com/qemu/qemu/commit/15e12add0b1256f3e699541c2eb8320e0f63a02d
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR STORE
Properly probe the whole access first.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 7b9a236ea70f92c261206e4b120f57b0c68462cd
https://github.com/qemu/qemu/commit/7b9a236ea70f92c261206e4b120f57b0c68462cd
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR STORE ELEMENT
As we only store one element, there is nothing to consider regarding
exceptions.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 29b8bcf140d7f31ad38b811278074fd202ed1275
https://github.com/qemu/qemu/commit/29b8bcf140d7f31ad38b811278074fd202ed1275
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR STORE MULTIPLE
Similar to VECTOR LOAD MULTIPLE, just the opposite direction. Probe
write access first.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 0e0a5b49ad58aa98eaa94b7cac60b5a799456150
https://github.com/qemu/qemu/commit/0e0a5b49ad58aa98eaa94b7cac60b5a799456150
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/helper.h
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
M target/s390x/vec_helper.c
Log Message:
-----------
s390x/tcg: Implement VECTOR STORE WITH LENGTH
Very similar to VECTOR LOAD WITH LENGTH, just the opposite direction.
Properly probe write access before modifying memory.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 2c7590c8ea90a7fbe1efcac90cdfdb8017c1b365
https://github.com/qemu/qemu/commit/2c7590c8ea90a7fbe1efcac90cdfdb8017c1b365
Author: David Hildenbrand <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/insn-data.def
M target/s390x/translate_vx.inc.c
Log Message:
-----------
s390x/tcg: Implement VECTOR UNPACK *
Combine all variant in a single handler. As source and destination
have different element sizes, we can't use gvec expansion. Expand
manually. Also watch out for overlapping source and destination
registers. Use a safe evaluation order depending on the operation.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>
Commit: 208d92df447bde0f1f810fae8a2c523cdeb7a28f
https://github.com/qemu/qemu/commit/208d92df447bde0f1f810fae8a2c523cdeb7a28f
Author: Peter Maydell <address@hidden>
Date: 2019-03-11 (Mon, 11 Mar 2019)
Changed paths:
M target/s390x/Makefile.objs
M target/s390x/cpu.h
M target/s390x/helper.h
M target/s390x/insn-data.def
M target/s390x/insn-format.def
M target/s390x/internal.h
M target/s390x/mem_helper.c
M target/s390x/translate.c
A target/s390x/translate_vx.inc.c
A target/s390x/vec.h
A target/s390x/vec_helper.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190311' into staging
s390x update:
- clean up LowCore definition
- first part of vector instruction support for tcg
# gpg: Signature made Mon 11 Mar 2019 08:59:02 GMT
# gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg: issuer "address@hidden"
# gpg: Good signature from "Cornelia Huck <address@hidden>" [unknown]
# gpg: aka "Cornelia Huck <address@hidden>" [full]
# gpg: aka "Cornelia Huck <address@hidden>" [full]
# gpg: aka "Cornelia Huck <address@hidden>" [unknown]
# gpg: aka "Cornelia Huck <address@hidden>" [unknown]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF
* remotes/cohuck/tags/s390x-20190311: (33 commits)
s390x/tcg: Implement VECTOR UNPACK *
s390x/tcg: Implement VECTOR STORE WITH LENGTH
s390x/tcg: Implement VECTOR STORE MULTIPLE
s390x/tcg: Implement VECTOR STORE ELEMENT
s390x/tcg: Implement VECTOR STORE
s390x/tcg: Provide probe_write_access helper
s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD
s390x/tcg: Implement VECTOR SELECT
s390x/tcg: Implement VECTOR SCATTER ELEMENT
s390x/tcg: Implement VECTOR REPLICATE IMMEDIATE
s390x/tcg: Implement VECTOR REPLICATE
s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATE
s390x/tcg: Implement VECTOR PERMUTE
s390x/tcg: Implement VECTOR PACK *
s390x/tcg: Implement VECTOR MERGE (HIGH|LOW)
s390x/tcg: Implement VECTOR LOAD WITH LENGTH
s390x/tcg: Implement VECTOR LOAD VR FROM GRS DISJOINT
s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GR
s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARY
s390x/tcg: Implement VECTOR LOAD MULTIPLE
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/2e35c7738e16...208d92df447b
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