[Qemu-commits] [qemu/qemu] 5c65ee: disas: nanoMIPS: Correct comments to

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[Qemu-commits] [qemu/qemu] 5c65ee: disas: nanoMIPS: Correct comments to

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] 5c65ee: disas: nanoMIPS: Correct comments to handlers of s...
Date:	Wed, 06 Mar 2019 02:33:40 -0800
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 5c65eed69c32a9f1914137d0e38594c4f4cb090a
      
https://github.com/qemu/qemu/commit/5c65eed69c32a9f1914137d0e38594c4f4cb090a
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M disas/nanomips.cpp

  Log Message:
  -----------
  disas: nanoMIPS: Correct comments to handlers of some DSP instructions

Correct comments to handlers of some DSP instructions.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: ca2b40b7e660ba39537442187aadc74cbe932e54
      
https://github.com/qemu/qemu/commit/ca2b40b7e660ba39537442187aadc74cbe932e54
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M disas/nanomips.cpp

  Log Message:
  -----------
  disas: nanoMIPS: Add graphical description of pool organization

Add graphical description of nanoMIPS instruction pool organization.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 9e9509421f9027cd0b17be332ecb0f43f0d02a33
      
https://github.com/qemu/qemu/commit/9e9509421f9027cd0b17be332ecb0f43f0d02a33
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M tests/tcg/mips/include/wrappers_msa.h

  Log Message:
  -----------
  tests/tcg: target/mips: Add wrappers for various MSA instructions

Add wrappers for various MSA integer instructions.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 26b3256392e06e1d855b135c58ccb227af6d6a92
      
https://github.com/qemu/qemu/commit/26b3256392e06e1d855b135c58ccb227af6d6a92
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/include/test_inputs_32.h
    A tests/tcg/mips/include/test_utils_32.h

  Log Message:
  -----------
  tests/tcg: target/mips: Add test utilities for 32-bit tests

Add test utilities for 32-bit tests.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: ace4458466f228fc5dabfe7ab0d01c20ca7001ff
      
https://github.com/qemu/qemu/commit/ace4458466f228fc5dabfe7ab0d01c20ca7001ff
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/include/test_inputs_64.h
    A tests/tcg/mips/include/test_utils_64.h

  Log Message:
  -----------
  tests/tcg: target/mips: Add test utilities for 64-bit tests

Add test utilities for 64-bit tests. Some of MIPS64R6 instructions
require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits,
hence the need for sets of such inputs.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: dd3ba7036f3df8e42703704cbdc55be0d0d19f45
      
https://github.com/qemu/qemu/commit/dd3ba7036f3df8e42703704cbdc55be0d0d19f45
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M tests/tcg/mips/include/test_inputs.h
    M tests/tcg/mips/include/test_utils.h

  Log Message:
  -----------
  tests/tcg: target/mips: Fix test utilities for 128-bit tests

Add "static" and "const" modifiers where appropriate, and fix other
minor issues.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 6ae2e3bb338a8fda477fb825e72026b925fd49bd
      
https://github.com/qemu/qemu/commit/6ae2e3bb338a8fda477fb825e72026b925fd49bd
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M tests/tcg/mips/include/wrappers_msa.h

  Log Message:
  -----------
  tests/tcg: target/mips: Extend functionality of MSA wrapper macros

Add macros that will allow testing cases when one of the source
registers is identical to the destination register.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 50dccc057faa307082b37aecb46768083f0c8a6b
      
https://github.com/qemu/qemu/commit/50dccc057faa307082b37aecb46768083f0c8a6b
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/include/wrappers_mips64r6.h

  Log Message:
  -----------
  tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions

Add wrappers for some MIPS64R6 instructions.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 99d46107f73c1cdd741efa8dd760cab885255c2d
      
https://github.com/qemu/qemu/commit/99d46107f73c1cdd741efa8dd760cab885255c2d
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_and.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_nor.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_or.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_xor.c

  Log Message:
  -----------
  tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions

Add tests for MIPS64R6 logic instructions: AND, NOR, OR, and XOR.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 8708c32a47363c0773a4fd0bc273fab157198522
      
https://github.com/qemu/qemu/commit/8708c32a47363c0773a4fd0bc273fab157198522
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_bitswap.c
    A tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c

  Log Message:
  -----------
  tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions

Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 9dea2df84855b246113a5587bdd43fc21dc0ea6b
      
https://github.com/qemu/qemu/commit/9dea2df84855b246113a5587bdd43fc21dc0ea6b
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_clo.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_clz.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_dclo.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_dclz.c

  Log Message:
  -----------
  tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions

Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 09a1bc758e639c58d6fdbb94f2743d197eea3309
      
https://github.com/qemu/qemu/commit/09a1bc758e639c58d6fdbb94f2743d197eea3309
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_dsllv.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_dsrav.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_dsrlv.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_sllv.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_srav.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_srlv.c

  Log Message:
  -----------
  tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions

Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV,
DSRLV, and DSRAV.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 7ecdacc56858aff19048d99e6041b1e786f1cf0a
      
https://github.com/qemu/qemu/commit/7ecdacc56858aff19048d99e6041b1e786f1cf0a
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmuh.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmuhu.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmul.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmulu.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_muh.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_muhu.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_mul.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_mulu.c

  Log Message:
  -----------
  tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions

Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU,
MUHU, DMUL, DMUH, DMULU, and DMUHU.

MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended
32-bit inputs.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 2a367db039fae3ea921ca4aa03374cd6c6d8d188
      
https://github.com/qemu/qemu/commit/2a367db039fae3ea921ca4aa03374cd6c6d8d188
  Author: Aleksandar Markovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_h.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_w.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_b.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_d.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_h.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_w.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_b.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_d.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_h.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_w.c

  Log Message:
  -----------
  tests/tcg: target/mips: Add tests for MSA pack instructions

Add tests for MSA pack instructions. This includes following
instructions:

  * PCKEV.B - pack even (bytes)
  * PCKEV.H - pack even (halfwords)
  * PCKEV.W - pack even (words)
  * PCKEV.D - pack even (doublewords)
  * PCKOD.B - pack odd (bytes)
  * PCKOD.H - pack odd (halfwords)
  * PCKOD.W - pack odd (words)
  * PCKOD.D - pack odd (doublewords)
  * VSHF.B - data preserving shuffle (bytes)
  * VSHF.H - data preserving shuffle (halfwords)
  * VSHF.W - data preserving shuffle (words)
  * VSHF.D - data preserving shuffle (doublewords)

Each test consists of 80 test cases, so altogether there are 960
test cases.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>


  Commit: 0fdd986a6c8f921693d025c3f095a0eaf628b6b6
      
https://github.com/qemu/qemu/commit/0fdd986a6c8f921693d025c3f095a0eaf628b6b6
  Author: Mateja Marjanovic <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_w.c

  Log Message:
  -----------
  target/mips: Add tests for integer add MSA instruction group

These are the regression tests for integer addition MSA instruction
- various flavors of instruction add (ADD, ADDS, HADD,...).

Signed-off-by: Mateja Marjanovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>


  Commit: b5b6b2b912bbcd3953407da938a8f969577ad3a1
      
https://github.com/qemu/qemu/commit/b5b6b2b912bbcd3953407da938a8f969577ad3a1
  Author: Peter Maydell <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M disas/nanomips.cpp
    M tests/tcg/mips/include/test_inputs.h
    A tests/tcg/mips/include/test_inputs_32.h
    A tests/tcg/mips/include/test_inputs_64.h
    M tests/tcg/mips/include/test_utils.h
    A tests/tcg/mips/include/test_utils_32.h
    A tests/tcg/mips/include/test_utils_64.h
    A tests/tcg/mips/include/wrappers_mips64r6.h
    M tests/tcg/mips/include/wrappers_msa.h
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_b.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_w.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_d.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_h.c
    A tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_w.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_h.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_w.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_b.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_d.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_h.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_w.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_b.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_d.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_h.c
    A tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_w.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_clo.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_clz.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_dclo.c
    A tests/tcg/mips/user/isa/mips64r6/bit-count/test_mips64r6_dclz.c
    A tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_bitswap.c
    A tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmuh.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmuhu.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmul.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_dmulu.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_muh.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_muhu.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_mul.c
    A tests/tcg/mips/user/isa/mips64r6/int-multiply/test_mips64r6_mulu.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_and.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_nor.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_or.c
    A tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_xor.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_dsllv.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_dsrav.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_dsrlv.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_sllv.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_srav.c
    A tests/tcg/mips/user/isa/mips64r6/shift/test_mips64r6_srlv.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-05-2019' 
into staging

MIPS queue for March 5th, 2019

# gpg: Signature made Tue 05 Mar 2019 16:06:34 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-mar-05-2019:
  target/mips: Add tests for integer add MSA instruction group
  tests/tcg: target/mips: Add tests for MSA pack instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions
  tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions
  tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions
  tests/tcg: target/mips: Extend functionality of MSA wrapper macros
  tests/tcg: target/mips: Fix test utilities for 128-bit tests
  tests/tcg: target/mips: Add test utilities for 64-bit tests
  tests/tcg: target/mips: Add test utilities for 32-bit tests
  tests/tcg: target/mips: Add wrappers for various MSA instructions
  disas: nanoMIPS: Add graphical description of pool organization
  disas: nanoMIPS: Correct comments to handlers of some DSP instructions

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/a3e3b0a7bd5d...b5b6b2b912bb
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