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[Qemu-commits] [qemu/qemu] 9d090d: target/arm: Fix PC test for LDM (exce


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 9d090d: target/arm: Fix PC test for LDM (exception return)
Date: Tue, 05 Mar 2019 11:23:15 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 9d090d17234058f55c3c439d285db78c94d7d4de
      
https://github.com/qemu/qemu/commit/9d090d17234058f55c3c439d285db78c94d7d4de
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Fix PC test for LDM (exception return)

Found by inspection: Rn is the base register against which the
load began; I is the register within the mask being processed.
The exception return should of course be processed from the loaded PC.

Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 64e40755cd41fbe8cd266cf387e42ddc57a449ef
      
https://github.com/qemu/qemu/commit/64e40755cd41fbe8cd266cf387e42ddc57a449ef
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/cpu.h
    M target/arm/helper.c

  Log Message:
  -----------
  target/arm: Split out arm_sctlr

Minimize the number of places that will need updating when
the virtual host extensions are added.

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9888bd1e20425dfe4dcca5dcd1ca2fac8e90ad19
      
https://github.com/qemu/qemu/commit/9888bd1e20425dfe4dcca5dcd1ca2fac8e90ad19
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M linux-user/elfload.c
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/translate-a64.c
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Implement ARMv8.0-SB

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: cb570bd318beb2ecce83cabf8016dacceb824dce
      
https://github.com/qemu/qemu/commit/cb570bd318beb2ecce83cabf8016dacceb824dce
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper.c

  Log Message:
  -----------
  target/arm: Implement ARMv8.0-PredInv

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ff730e9666a716b669ac4a8ca7c521177d1d2b15
      
https://github.com/qemu/qemu/commit/ff730e9666a716b669ac4a8ca7c521177d1d2b15
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/helper.h
    M target/arm/internals.h
    M target/arm/op_helper.c
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Split helper_msr_i_pstate into 3

The EL0+UMA check is unique to DAIF.  While SPSel had avoided the
check by nature of already checking EL >= 1, the other post v8.0
extensions to MSR (imm) allow EL0 and do not require UMA.  Avoid
the unconditional write to pc and use raise_exception_ra to unwind.

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 22ac3c49641f6eed93dca5b852030b4d3eacf6c4
      
https://github.com/qemu/qemu/commit/22ac3c49641f6eed93dca5b852030b4d3eacf6c4
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/helper.h
    M target/arm/op_helper.c
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/arm/translate.h

  Log Message:
  -----------
  target/arm: Add set/clear_pstate_bits, share gen_ss_advance

We do not need an out-of-line helper for manipulating bits in pstate.
While changing things, share the implementation of gen_ss_advance.

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2fba34f70d9a81bab56e61bb99a4d6632bdfe531
      
https://github.com/qemu/qemu/commit/2fba34f70d9a81bab56e61bb99a4d6632bdfe531
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Rearrange disas_data_proc_reg

This decoding more closely matches the ARMv8.4 Table C4-6,
Encoding table for Data Processing - Register Group.

In particular, op2 == 0 is now more than just Add/sub (with carry).

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b89d9c988a988d5547c73e2bc43f59b0c07420a5
      
https://github.com/qemu/qemu/commit/b89d9c988a988d5547c73e2bc43f59b0c07420a5
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M linux-user/elfload.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Implement ARMv8.4-CondM

Tested-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
[PMM: fixed up block comment style]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5ef84f111483e3f7b57efc690e22081ca8f99544
      
https://github.com/qemu/qemu/commit/5ef84f111483e3f7b57efc690e22081ca8f99544
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Implement ARMv8.5-CondM

Tested-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0e4db23d1fdbfed4fc1ec19b6e59820209600358
      
https://github.com/qemu/qemu/commit/0e4db23d1fdbfed4fc1ec19b6e59820209600358
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Restructure handle_fp_1src_{single, double}

This will allow sharing code that adjusts rmode beyond
the existing users.

Tested-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 6bea25631af92531027d3bf3ef972a4d51d62e7c
      
https://github.com/qemu/qemu/commit/6bea25631af92531027d3bf3ef972a4d51d62e7c
  Author: Richard Henderson <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper.h
    M target/arm/translate-a64.c
    M target/arm/vfp_helper.c

  Log Message:
  -----------
  target/arm: Implement ARMv8.5-FRINT

Tested-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f08ced69d3a668986c30e767d8680b27868c765f
      
https://github.com/qemu/qemu/commit/f08ced69d3a668986c30e767d8680b27868c765f
  Author: Shameer Kolothum <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/boot.c

  Log Message:
  -----------
  hw/arm/boot: introduce fdt_add_memory_node helper

We introduce an helper to create a memory node.

Signed-off-by: Eric Auger <address@hidden>
Signed-off-by: Shameer Kolothum <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: bf424a121643b56b8c017ca484623fd0c254e26c
      
https://github.com/qemu/qemu/commit/bf424a121643b56b8c017ca484623fd0c254e26c
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt: Rename highmem IO regions

In preparation for a split of the memory map into a static
part and a dynamic part floating after the RAM, let's rename the
regions located after the RAM

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 350a9c9e181b1986163e445b27c3a67722ded91b
      
https://github.com/qemu/qemu/commit/350a9c9e181b1986163e445b27c3a67722ded91b
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/virt.c
    M include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt: Split the memory map description

In the prospect to introduce an extended memory map supporting more
RAM, let's split the memory map array into two parts:

- the former a15memmap, renamed base_memmap, contains regions below
  and including the RAM. MemMapEntries initialized in this array
  have a static size and base address.
- extended_memmap, only initialized with entries located after the
  RAM. MemMapEntries initialized in this array only get their size
  initialized. Their base address is dynamically computed depending
  on the the top of the RAM, with same alignment as their size.

Eventually base_memmap entries are copied into the extended_memmap
array. Using two separate arrays however clarifies which entries
are statically allocated and those which are dynamically allocated.

This new split will allow to grow the RAM size without changing the
description of the high IO entries.

We introduce a new virt_set_memmap() helper function which
"freezes" the memory map. We call it in machvirt_init as
memory attributes of the machine are not yet set when
virt_instance_init() gets called.

The memory map is unchanged (the top of the initial RAM still is
256GiB). Then come the high IO regions with same layout as before.

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dc0ca80eb1ea43fb0e65f7607c0c400feb30eeda
      
https://github.com/qemu/qemu/commit/dc0ca80eb1ea43fb0e65f7607c0c400feb30eeda
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M accel/kvm/kvm-all.c
    M hw/ppc/mac_newworld.c
    M hw/ppc/mac_oldworld.c
    M hw/ppc/spapr.c
    M include/hw/boards.h

  Log Message:
  -----------
  hw/boards: Add a MachineState parameter to kvm_type callback

On ARM, the kvm_type will be resolved by querying the KVMState.
Let's add the MachineState handle to the callback so that we
can retrieve the  KVMState handle. in kvm_init, when the callback
is called, the kvm_state variable is not yet set.

Signed-off-by: Eric Auger <address@hidden>
Acked-by: David Gibson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
[ppc parts]
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a27382e2106c12a9761ca0954b4c0fba0e650682
      
https://github.com/qemu/qemu/commit/a27382e2106c12a9761ca0954b4c0fba0e650682
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M target/arm/kvm.c
    M target/arm/kvm_arm.h

  Log Message:
  -----------
  kvm: add kvm_arm_get_max_vm_ipa_size

Add the kvm_arm_get_max_vm_ipa_size() helper that returns the
number of bits in the IPA address space supported by KVM.

This capability needs to be known to create the VM with a
specific IPA max size (kvm_type passed along KVM_CREATE_VM ioctl.

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ee6850110c627d904a11b8d3851257b4f01da20e
      
https://github.com/qemu/qemu/commit/ee6850110c627d904a11b8d3851257b4f01da20e
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M vl.c

  Log Message:
  -----------
  vl: Set machine ram_size, maxram_size and ram_slots earlier

The machine RAM attributes will need to be analyzed during the
configure_accelerator() process. especially kvm_type() arm64
machine callback will use them to know how many IPA/GPA bits are
needed to model the whole RAM range. So let's assign those machine
state fields before calling configure_accelerator.

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 957e32cffa57e2578abbf7c1ec6e84db48921a18
      
https://github.com/qemu/qemu/commit/957e32cffa57e2578abbf7c1ec6e84db48921a18
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/virt.c
    M include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt: Dynamic memory map depending on RAM requirements

Up to now the memory map has been static and the high IO region
base has always been 256GiB.

This patch modifies the virt_set_memmap() function, which freezes
the memory map, so that the high IO range base becomes floating,
located after the initial RAM and the device memory.

The function computes
- the base of the device memory,
- the size of the device memory,
- the high IO region base
- the highest GPA used in the memory map.

Entries of the high IO region are assigned a base address. The
device memory is initialized.

The highest GPA used in the memory map will be used at VM creation
to choose the requested IPA size.

Setting all the existing highmem IO regions beyond the RAM
allows to have a single contiguous RAM region (initial RAM and
possible hotpluggable device memory). That way we do not need
to do invasive changes in the EDK2 FW to support a dynamic
RAM base.

Still the user cannot request an initial RAM size greater than 255GB.

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c9650222b8fda66e5e9e5110a0dc76c3b30eb70a
      
https://github.com/qemu/qemu/commit/c9650222b8fda66e5e9e5110a0dc76c3b30eb70a
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Implement kvm_type function for 4.0 machine

This patch implements the machine class kvm_type() callback.
It returns the number of bits requested to implement the whole GPA
range including the RAM and IO regions located beyond.
The returned value is passed though the KVM_CREATE_VM ioctl and
this allows KVM to set the stage2 tables dynamically.

To compute the highest GPA used in the memory map, kvm_type()
must freeze the memory map by calling virt_set_memmap().

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2ba956ccfa718c68ae95356fe5e7de6208cf97f0
      
https://github.com/qemu/qemu/commit/2ba956ccfa718c68ae95356fe5e7de6208cf97f0
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Check the VCPU PA range in TCG mode

We are about to allow the memory map to grow beyond 1TB and
potentially overshoot the VCPU AA64MMFR0.PARANGE.

In aarch64 mode and when highmem is set, let's check the VCPU
PA range is sufficient to address the highest GPA of the memory
map.

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 50a17297e2f0c4d621c7bb23fee239c0a3fd3128
      
https://github.com/qemu/qemu/commit/50a17297e2f0c4d621c7bb23fee239c0a3fd3128
  Author: Eric Auger <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Bump the 255GB initial RAM limit

Now we have the extended memory map (high IO regions beyond the
scalable RAM) and dynamic IPA range support at KVM/ARM level
we can bump the legacy 255GB initial RAM limit. The actual maximum
RAM size now depends on the physical CPU and host kernel, in
accelerated mode. In TCG mode, it depends on the VCPU
AA64MMFR0.PARANGE.

Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 566528f823d1a2e9eb2d7b2ed839547cb31bfc34
      
https://github.com/qemu/qemu/commit/566528f823d1a2e9eb2d7b2ed839547cb31bfc34
  Author: Michel Heily <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M hw/arm/stellaris.c
    M hw/watchdog/cmsdk-apb-watchdog.c
    M include/hw/watchdog/cmsdk-apb-watchdog.h

  Log Message:
  -----------
  hw/arm/stellaris: Implement watchdog timer

Implement the watchdog timer for the stellaris boards.
This device is a close variant of the CMSDK APB watchdog
device, so we can model it by subclassing that device and
tweaking the behaviour of some of its registers.

Signed-off-by: Michel Heily <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[PMM: rewrote commit message, fixed a few checkpatch nits,
 added comment giving the URL of the spec for the Stellaris
 variant of the watchdog device]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c99b58326d92034a00003c4f2e019f662c3dbee5
      
https://github.com/qemu/qemu/commit/c99b58326d92034a00003c4f2e019f662c3dbee5
  Author: Peter Maydell <address@hidden>
  Date:   2019-03-05 (Tue, 05 Mar 2019)

  Changed paths:
    M accel/kvm/kvm-all.c
    M hw/arm/boot.c
    M hw/arm/stellaris.c
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M hw/ppc/mac_newworld.c
    M hw/ppc/mac_oldworld.c
    M hw/ppc/spapr.c
    M hw/watchdog/cmsdk-apb-watchdog.c
    M include/hw/arm/virt.h
    M include/hw/boards.h
    M include/hw/watchdog/cmsdk-apb-watchdog.h
    M linux-user/elfload.c
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/internals.h
    M target/arm/kvm.c
    M target/arm/kvm_arm.h
    M target/arm/op_helper.c
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/arm/translate.h
    M target/arm/vfp_helper.c
    M vl.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190305' 
into staging

target-arm queue:
 * Fix PC test for LDM (exception return)
 * Implement ARMv8.0-SB
 * Implement ARMv8.0-PredInv
 * Implement ARMv8.4-CondM
 * Implement ARMv8.5-CondM
 * Implement ARMv8.5-FRINT
 * hw/arm/stellaris: Implement watchdog timer
 * virt: support more than 255GB of RAM

# gpg: Signature made Tue 05 Mar 2019 16:49:47 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# gpg:                 aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20190305: (22 commits)
  hw/arm/stellaris: Implement watchdog timer
  hw/arm/virt: Bump the 255GB initial RAM limit
  hw/arm/virt: Check the VCPU PA range in TCG mode
  hw/arm/virt: Implement kvm_type function for 4.0 machine
  hw/arm/virt: Dynamic memory map depending on RAM requirements
  vl: Set machine ram_size, maxram_size and ram_slots earlier
  kvm: add kvm_arm_get_max_vm_ipa_size
  hw/boards: Add a MachineState parameter to kvm_type callback
  hw/arm/virt: Split the memory map description
  hw/arm/virt: Rename highmem IO regions
  hw/arm/boot: introduce fdt_add_memory_node helper
  target/arm: Implement ARMv8.5-FRINT
  target/arm: Restructure handle_fp_1src_{single, double}
  target/arm: Implement ARMv8.5-CondM
  target/arm: Implement ARMv8.4-CondM
  target/arm: Rearrange disas_data_proc_reg
  target/arm: Add set/clear_pstate_bits, share gen_ss_advance
  target/arm: Split helper_msr_i_pstate into 3
  target/arm: Implement ARMv8.0-PredInv
  target/arm: Implement ARMv8.0-SB
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/0984a157c1c0...c99b58326d92



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