[Qemu-commits] [qemu/qemu] b39701: hw/ppc/prep: Drop useless inclusion o

qemu-commits
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] b39701: hw/ppc/prep: Drop useless inclusion o

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] b39701: hw/ppc/prep: Drop useless inclusion of "hw/i386/pc.h"
Date:	Tue, 19 Feb 2019 01:36:38 -0800
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: b39701db1312dcdadf6b9f3c1e38513a42654e39
      
https://github.com/qemu/qemu/commit/b39701db1312dcdadf6b9f3c1e38513a42654e39
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/prep.c

  Log Message:
  -----------
  hw/ppc/prep: Drop useless inclusion of "hw/i386/pc.h"

In 47973a2dbf we split the last generic chipset out of the PC
board, but forgot to remove the include of "hw/i386/pc.h".
Since it is now unused, remove it.

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Hervé Poussineau <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 5c7adcf422d4bd7235e0d2f2f85efcc393795fb2
      
https://github.com/qemu/qemu/commit/5c7adcf422d4bd7235e0d2f2f85efcc393795fb2
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/spapr.c
    M hw/ppc/spapr_events.c
    M hw/ppc/spapr_pci.c
    M hw/ppc/spapr_vio.c
    M include/hw/pci-host/spapr.h
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  spapr: Rename xics to intc in interrupt controller agnostic code

All this code is used with both the XICS and XIVE interrupt controllers.

Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 707c7c2ee1f6fb425a3c78f587feda7cd8501905
      
https://github.com/qemu/qemu/commit/707c7c2ee1f6fb425a3c78f587feda7cd8501905
  Author: Fabiano Rosas <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M target/ppc/cpu-qom.h
    M target/ppc/cpu.h
    M target/ppc/gdbstub.c
    M target/ppc/translate_init.inc.c

  Log Message:
  -----------
  target/ppc: Enable reporting of SPRs to GDB

This allows reading and writing of SPRs via GDB:

(gdb) p/x $srr1
$1 = 0x8000000002803033

(gdb) p/x $pvr
$2 = 0x4b0201
(gdb) set $pvr=0x4b0000
(gdb) p/x $pvr
$3 = 0x4b0000

The `info` command can also be used:
(gdb) info registers spr

For this purpose, GDB needs to be provided with an XML description of
the registers (see the gdb-xml directory for examples) and a set of
callbacks for reading and writing the registers must be defined.

The XML file in this case is created dynamically, based on the SPRs
already defined in the machine. This way we avoid the need for several
XML files to suit each possible ppc machine.

The gdb_{get,set}_spr_reg callbacks take an index based on the order
the registers appear in the XML file. This index does not match the
actual location of the registers in the env->spr array so the
gdb_find_spr_idx function does that conversion.

Note: GDB currently needs to know the guest endianness in order to
properly print the registers values. This is done automatically by GDB
when provided with the ELF file or explicitly with the `set endian
<big|little>` command.

Signed-off-by: Fabiano Rosas <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 27a3ea7eff2af5d8049d911802be4b13145491fc
      
https://github.com/qemu/qemu/commit/27a3ea7eff2af5d8049d911802be4b13145491fc
  Author: BALATON Zoltan <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M target/ppc/translate.c

  Log Message:
  -----------
  target/ppc: Fix msync to do what hardware does

According to BookE docs, invalid bits (while undefined behaviour) should
not raise exception but be ignored. This seems to be implementation
dependent though and QEMU currently does what e500 CPUs do and raise
exception for invalid bits. Unfortunately some versions of libstdc++
(and so all programs compiled with it) have lwsync on PPC440 which is
invalid but on real hardware it's just executed as msync ignoring the
invalid bits (maybe that's why it got undetected) but they fail on QEMU.
This patch changes invalid mask of msync to allow these programs to run
but keep generating exception on e500 cores to follow what hardware does.

Signed-off-by: BALATON Zoltan <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 925969c3e28692b04ad4075022f985702bf62419
      
https://github.com/qemu/qemu/commit/925969c3e28692b04ad4075022f985702bf62419
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/spapr_pci.c

  Log Message:
  -----------
  spapr_pci: Fix interrupt leak in rtas_ibm_change_msi() error path

Now that IRQ allocation has been split in two (first allocate IRQ numbers,
then claim them), if the claiming fails, we must release the IRQs.

Fixes: 4fe75a8ccd80 "spapr: split the IRQ allocation sequence"
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: d6c666ad81f6f771ff40bb9c72dde327e6c87846
      
https://github.com/qemu/qemu/commit/d6c666ad81f6f771ff40bb9c72dde327e6c87846
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/misc/macio/cuda.c

  Log Message:
  -----------
  cuda: decrease time delay before raising VIA SR interrupt and remove fast path

In order to handle a race condition in the MacOS 9 CUDA driver, a
delay was introduced when raising the VIA SR interrupt inspired by
similar code in MacOnLinux.

During original testing of the MacOS 9 patches it was found that the
30us delay used in MacOnLinux did not work reliably within QEMU, and a
value of 300us was required to function correctly.

Recent experiments have shown two things: firstly when booting Linux,
MacOS 9 and MacOS X the fast path which bypasses the delay is never
triggered once the OS kernel is loaded making it effectively
useless. Rather than leave this code in place where a guest could
potentially enable it by accident and break itself, we might as well
just remove it.

Secondly the previous reliability issues are no longer present, and
this value can be reduced down to 20us with no apparent ill
effects. This has the benefit of considerably improving the
responsiveness of the ADB keyboard and mouse within the guest.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 1a511340874e5a9d3b235261447d920fd8be493e
      
https://github.com/qemu/qemu/commit/1a511340874e5a9d3b235261447d920fd8be493e
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/spapr_irq.c

  Log Message:
  -----------
  spapr: Disallow unsupported kernel-irqchip settings

Split mode doesn't make sense on pseries, neither with XICS nor XIVE. But
passing kernel-irqchip=split silently behaves like kernel-irqchip=on.
Other architectures that support kernel-irqchip do terminate QEMU when
split mode is requested but not available though. Do the same with pseries
for consistency.

Similarly, passing kernel-irqchip=on,accel=tcg starts the machine with the
emulated interrupt controller, ie, behaves like kernel-irqchip=off. However,
when passing  kernel-irqchip=on,accel=kvm, if we can't initialize the KVM
XICS for some reason, ie, xics_kvm_init() fails, then QEMU is terminated.
This is inconsistent. Terminate QEMU all the same when requesting the
in-kernel interrupt controller without KVM.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 4479b51e62d025c954a1f01b5c67a51d3a39cab2
      
https://github.com/qemu/qemu/commit/4479b51e62d025c954a1f01b5c67a51d3a39cab2
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/mac_newworld.c

  Log Message:
  -----------
  mac_newworld: change default NIC to sungem for mac99 machine

This model brings out-of-the-box networking for all of Linux, MacOS 9 and OS X
without requiring the installation of additional drivers.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 4c668f4a3d684ec133a52d936314379f6edd672e
      
https://github.com/qemu/qemu/commit/4c668f4a3d684ec133a52d936314379f6edd672e
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M target/ppc/excp_helper.c
    M target/ppc/mmu_helper.c

  Log Message:
  -----------
  target/ppc: Remove some #if 0'ed code

Some debug stuff we don't need to keep there

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: e150ac89fbcf4ea15535f6718d0194310c39280d
      
https://github.com/qemu/qemu/commit/e150ac89fbcf4ea15535f6718d0194310c39280d
  Author: Roman Kapl <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M target/ppc/translate.c

  Log Message:
  -----------
  ppc: fix crash during branch stepping

The PPC BRANCH exception could bubble up, but this is an QEMU internal exception
and QEMU then crased. Instead it should trigger TRACE exception, according to
PPC 2.07 book. It could happen only when using branch stepping, which is not
commonly used.

Change gen_prep_dbgex do do trigger TRACE. The excp, argument is now removed,
since the type of exception can be inferred from the singlestep_enabled flags.
removed the guards around gen_exception, since they are unnecessary.

Fixes: 0e3bf48909 ("ppc: add DBCR based debugging").
Signed-off-by: Roman Kapl <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 0afed8c8195886111dd8ab0d078b189c55949521
      
https://github.com/qemu/qemu/commit/0afed8c8195886111dd8ab0d078b189c55949521
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/intc/spapr_xive.c
    M include/hw/ppc/xive.h

  Log Message:
  -----------
  xive: Only set source type for LSIs

MSI is the default and LSI specific code is guarded by the
xive_source_irq_is_lsi() helper. The xive_source_irq_set()
helper is a nop for MSIs.

Simplify the code by turning xive_source_irq_set() into
xive_source_irq_set_lsi() and only call it for LSIs. The
call to xive_source_irq_set(false) in spapr_xive_irq_free()
is also a nop. Just drop it.

Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 94d1cc5f03a8f7e45925928d0c9a5ee9782e6c85
      
https://github.com/qemu/qemu/commit/94d1cc5f03a8f7e45925928d0c9a5ee9782e6c85
  Author: Michael Roth <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/acpi/pcihp.c
    M hw/acpi/piix4.c
    M hw/char/virtio-serial-bus.c
    M hw/core/bus.c
    M hw/pci/pcie.c
    M hw/pci/shpc.c
    M hw/ppc/spapr_pci.c
    M hw/s390x/css-bridge.c
    M hw/s390x/s390-pci-bus.c
    M hw/scsi/virtio-scsi.c
    M hw/scsi/vmw_pvscsi.c
    M hw/usb/dev-smartcard-reader.c
    M include/hw/qdev-core.h

  Log Message:
  -----------
  qdev: pass an Object * to qbus_set_hotplug_handler()

Certain devices types, like memory/CPU, are now being handled using a
hotplug interface provided by a top-level MachineClass. Hotpluggable
host bridges are another such device where it makes sense to use a
machine-level hotplug handler. However, unlike those devices,
host-bridges have a parent bus (the main system bus), and devices with
a parent bus use a different mechanism for registering their hotplug
handlers: qbus_set_hotplug_handler(). This interface currently expects
a handler to be a subclass of DeviceClass, but this is not the case
for MachineClass, which derives directly from ObjectClass.

Internally, the interface only requires an ObjectClass, so expose that
in qbus_set_hotplug_handler().

Cc: Michael S. Tsirkin <address@hidden>
Cc: Eduardo Habkost <address@hidden>
Signed-off-by: Michael Roth <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Cornelia Huck <address@hidden>
Acked-by: Halil Pasic <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 316aed64827ee51267adcf187e867747f29b9a6e
      
https://github.com/qemu/qemu/commit/316aed64827ee51267adcf187e867747f29b9a6e
  Author: Benjamin Herrenschmidt <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M target/ppc/translate_init.inc.c

  Log Message:
  -----------
  target/ppc: Disable ISA 2.06 PM instructions on POWER9

The ISA 2.06/2.07 Power Management instructions (doze, nap & rvwinkle)
don't exist on POWER9, don't enable them.

Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: cc941111a5bc5f498185fa3824c3b6579c7d45ad
      
https://github.com/qemu/qemu/commit/cc941111a5bc5f498185fa3824c3b6579c7d45ad
  Author: Fabiano Rosas <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: fix out of bounds write in spapr_populate_drmem_v2

buf_len is uint8_t which is not large enough to hold the result of:

  nr_entries * sizeof(struct sPAPRDrconfCellV2) + sizeof(uint32_t);

for a nr_entries greater than 10.

This causes the allocated buffer 'int_buf' to be smaller than expected
and we eventually overwrite some of glibc's control structures (see
"chunk" in https://sourceware.org/glibc/wiki/MallocInternals)

The following error is seen while trying to free int_buf:

  "free(): invalid next size (fast)"

Fixes: a324d6f166 "spapr: Support ibm,dynamic-memory-v2 property"
Signed-off-by: Fabiano Rosas <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 2e66cdb715b2df674a9dd1b2899b958a46a98bdc
      
https://github.com/qemu/qemu/commit/2e66cdb715b2df674a9dd1b2899b958a46a98bdc
  Author: Cédric Le Goater <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/spapr_irq.c
    M include/hw/ppc/spapr_irq.h

  Log Message:
  -----------
  spapr/irq: add an 'nr_irq' parameter to initialize the backend.

When using the 'dual' interrupt mode, the source numbers of both sPAPR
IRQ backends are aligned to share a common IRQ number space and to use
a similar mapping of the machine qemu_irq array which is indexed by
the source number.

The XICS IRQ number range initially being [ 0x1000 - 0x2000 ], this
requires to change the XICS ICSState offset to 0 and to provision for
an extra 4K of source numbers and qemu_irqs which will never be used
by the machine when running under the XICS interrupt mode. This is not
an optimal solution.

Change the init() method to allocate an IRQ number space of the
expected size for the XICS sPAPR IRQ backend. It breaks the interrupt
signaling when under the 'dual' mode because source numbers have
unexpected values but next patch will fix that.

Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 3a0d802c170c74807c1957f076b555daad867a1f
      
https://github.com/qemu/qemu/commit/3a0d802c170c74807c1957f076b555daad867a1f
  Author: Cédric Le Goater <address@hidden>
  Date:   2019-02-17 (Sun, 17 Feb 2019)

  Changed paths:
    M hw/ppc/spapr_irq.c

  Log Message:
  -----------
  spapr/irq: remove the XICS offset adjustment

Now that we have changed the XICS and the XIVE interrupt backend to
have different size for their IRQ number space, we do not need to
align their source numbers anymore. Remove the offset adjustment and
wire the dual 'qirq' handler to the 'qirq' handler of the current
interrupt mode in use.

Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 0e5c7fad9cdc5d431796f899b6a0e860ec93b611
      
https://github.com/qemu/qemu/commit/0e5c7fad9cdc5d431796f899b6a0e860ec93b611
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Explicitely call KVM ICP methods from the common code

The pre_save(), post_load() and synchronize_state() methods of the
ICPStateClass type are really KVM only things. Make that obvious
by dropping the indirections and directly calling the KVM functions
instead.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: d82f397183b41f25e5a2e41c4af887f102de60ef
      
https://github.com/qemu/qemu/commit/d82f397183b41f25e5a2e41c4af887f102de60ef
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Handle KVM ICP reset from the common code

The KVM ICP reset handler simply writes the ICP state to KVM. This
doesn't need the overkill parent_reset logic we have today. Call
icp_set_kvm_state() from the base ICP reset function instead.

Since there are no other users for ICPStateClass::parent_reset, and
it isn't currently expected to change, drop it as well.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 8e6e6efef7af41c4d809b6991927949f354836f7
      
https://github.com/qemu/qemu/commit/8e6e6efef7af41c4d809b6991927949f354836f7
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Handle KVM ICP realize from the common code

The realization of KVM ICP currently follows the parent_realize logic,
which is a bit overkill here. Also we want to get rid of the KVM ICP
class. Explicitely call icp_kvm_realize() from the base ICP realize
function.

Note that ICPStateClass::parent_realize is retained because powernv
needs it.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 56af66566dc728d951cba9b9d6b9772259d43d8d
      
https://github.com/qemu/qemu/commit/56af66566dc728d951cba9b9d6b9772259d43d8d
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/ppc/spapr_irq.c
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  spapr/irq: Use the base ICP class for KVM

The base ICP class knows how to interact with KVM. Adapt sPAPR to use it
instead of the ICP KVM class.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 8c1ced677dd0d7ebe96abb634d7398cd64236b11
      
https://github.com/qemu/qemu/commit/8c1ced677dd0d7ebe96abb634d7398cd64236b11
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics_kvm.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Drop the KVM ICP class

The KVM ICP class isn't used anymore. Drop it.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: d80b2ccfa741dd689634ce6c2b2a703d7d449319
      
https://github.com/qemu/qemu/commit/d80b2ccfa741dd689634ce6c2b2a703d7d449319
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Explicitely call KVM ICS methods from the common code

The pre_save(), post_load() and synchronize_state() methods of the
ICSStateClass type are really KVM only things. Make that obvious
by dropping the indirections and directly calling the KVM functions
instead.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: f1f5b701b8978f7d783c3582252a3475c762800d
      
https://github.com/qemu/qemu/commit/f1f5b701b8978f7d783c3582252a3475c762800d
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c

  Log Message:
  -----------
  xics: Handle KVM ICS reset from the "simple" ICS code

The KVM ICS reset handler simply writes the ICS state to KVM. This
doesn't need the overkill parent_reset logic we have today. Also
we want to use the same ICS type for the KVM and non-KVM case with
pseries.

Call icp_set_kvm_state() from the "simple" ICS reset function.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 557b4567298a6952de347a4fb7676ff44775f495
      
https://github.com/qemu/qemu/commit/557b4567298a6952de347a4fb7676ff44775f495
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c
    M hw/ppc/spapr_irq.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Handle KVM interrupt presentation from "simple" ICS code

We want to use the "simple" ICS type in both KVM and non-KVM setups.
Teach the "simple" ICS how to present interrupts to KVM and adapt
sPAPR accordingly.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 444d6ca301d97de141a502851940943b09a9ebee
      
https://github.com/qemu/qemu/commit/444d6ca301d97de141a502851940943b09a9ebee
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/ppc/spapr_irq.c

  Log Message:
  -----------
  spapr/irq: Use the "simple" ICS class for KVM

The "simple" ICS class knows how to interract with KVM. Adapt sPAPR to use
it instead of the ICS KVM class.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 3272752a8b51cd91d8633048bf6f844117a4879c
      
https://github.com/qemu/qemu/commit/3272752a8b51cd91d8633048bf6f844117a4879c
  Author: Greg Kurz <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/intc/xics_kvm.c
    M hw/ppc/spapr_irq.c
    M include/hw/ppc/xics.h

  Log Message:
  -----------
  xics: Drop the KVM ICS class

The KVM ICS class isn't used anymore. Drop it.

Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 50d24aedb3ecd872a0bcb8ac3a644721b593f6df
      
https://github.com/qemu/qemu/commit/50d24aedb3ecd872a0bcb8ac3a644721b593f6df
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/translate.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert VMX logical instructions to use vector operations

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 3e942a1a8025f694ff0e78b947c3bd57ec06d655
      
https://github.com/qemu/qemu/commit/3e942a1a8025f694ff0e78b947c3bd57ec06d655
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector 
operations

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 471ff3d0257135b938d0a5f2181f22cd753d50de
      
https://github.com/qemu/qemu/commit/471ff3d0257135b938d0a5f2181f22cd753d50de
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert vspltis[bhw] to use vector operations

Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 0f6a6d5db853c0cbe438c1831c70710bfb6530ee
      
https://github.com/qemu/qemu/commit/0f6a6d5db853c0cbe438c1831c70710bfb6530ee
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert vsplt[bhw] to use vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 7b8fe477e12b164dda97f79e27b55b805d90384f
      
https://github.com/qemu/qemu/commit/7b8fe477e12b164dda97f79e27b55b805d90384f
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/translate/vsx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert VSX logical operations to vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: cf95e701fe14478ad25fe7a71da0199a602c6af1
      
https://github.com/qemu/qemu/commit/cf95e701fe14478ad25fe7a71da0199a602c6af1
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/translate/vsx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert xxspltib to vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 9bb0048ec6f8f3bcc144b2c5769d9301e824f946
      
https://github.com/qemu/qemu/commit/9bb0048ec6f8f3bcc144b2c5769d9301e824f946
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/translate/vsx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert xxspltw to vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 03dce230db4b66a4c4fa4173a46d40f182d59b18
      
https://github.com/qemu/qemu/commit/03dce230db4b66a4c4fa4173a46d40f182d59b18
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/translate/vsx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert xxsel to vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: dedfaac74e239c66646bd9851e05fc07380b20b7
      
https://github.com/qemu/qemu/commit/dedfaac74e239c66646bd9851e05fc07380b20b7
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: Pass integer to helper_mtvscr

We can re-use this helper elsewhere if we're not passing
in an entire vector register.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: c5ba06a391127647d4b5d40f8261bad070a80821
      
https://github.com/qemu/qemu/commit/c5ba06a391127647d4b5d40f8261bad070a80821
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/translate_init.inc.c

  Log Message:
  -----------
  target/ppc: Use helper_mtvscr for reset and gdb

Not setting flush_to_zero from gdb_set_avr_reg was a bug.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: be13d3026abe5a0dcd12c9639658a87a3b417769
      
https://github.com/qemu/qemu/commit/be13d3026abe5a0dcd12c9639658a87a3b417769
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/cpu.h

  Log Message:
  -----------
  target/ppc: Remove vscr_nj and vscr_sat

These macros are no longer used.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: cc2b90d7251c1aa4ace5a3058a7529c9887ab1e5
      
https://github.com/qemu/qemu/commit/cc2b90d7251c1aa4ace5a3058a7529c9887ab1e5
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/arch_dump.c
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c
    M target/ppc/translate_init.inc.c

  Log Message:
  -----------
  target/ppc: Add helper_mfvscr

This is required before changing the representation of the register.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 596fff20d02b349820b30024fd15dd3efd61d164
      
https://github.com/qemu/qemu/commit/596fff20d02b349820b30024fd15dd3efd61d164
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/machine.c

  Log Message:
  -----------
  target/ppc: Use mtvscr/mfvscr for vmstate

This is required before changing the representation of the register.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 6175f5a058eb077fb4dd94c79e8ef961bb4dba69
      
https://github.com/qemu/qemu/commit/6175f5a058eb077fb4dd94c79e8ef961bb4dba69
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/int_helper.c

  Log Message:
  -----------
  target/ppc: Add set_vscr_sat

This is required before changing the representation of the register.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 9b5b74da0a07a89ef71c7f7da0b36560a3bac521
      
https://github.com/qemu/qemu/commit/9b5b74da0a07a89ef71c7f7da0b36560a3bac521
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/cpu.h
    M target/ppc/int_helper.c

  Log Message:
  -----------
  target/ppc: Split out VSCR_SAT to a vector field

Change the representation of VSCR_SAT such that it is easy
to set from vector code.

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: fb11ae7daae19e022f37f0508cae0e106304d167
      
https://github.com/qemu/qemu/commit/fb11ae7daae19e022f37f0508cae0e106304d167
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert vadd*s and vsub*s to vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 73e14c6a9cdefb94c01ea488f04e7fba7ac0dc5b
      
https://github.com/qemu/qemu/commit/73e14c6a9cdefb94c01ea488f04e7fba7ac0dc5b
  Author: Richard Henderson <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate/vmx-impl.inc.c

  Log Message:
  -----------
  target/ppc: convert vmin* and vmax* to vector operations

Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 2e68b8620637a4ee8c79b5724144b726af1e261b
      
https://github.com/qemu/qemu/commit/2e68b8620637a4ee8c79b5724144b726af1e261b
  Author: Peter Maydell <address@hidden>
  Date:   2019-02-18 (Mon, 18 Feb 2019)

  Changed paths:
    M hw/acpi/pcihp.c
    M hw/acpi/piix4.c
    M hw/char/virtio-serial-bus.c
    M hw/core/bus.c
    M hw/intc/spapr_xive.c
    M hw/intc/xics.c
    M hw/intc/xics_kvm.c
    M hw/misc/macio/cuda.c
    M hw/pci/pcie.c
    M hw/pci/shpc.c
    M hw/ppc/mac_newworld.c
    M hw/ppc/prep.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_events.c
    M hw/ppc/spapr_irq.c
    M hw/ppc/spapr_pci.c
    M hw/ppc/spapr_vio.c
    M hw/s390x/css-bridge.c
    M hw/s390x/s390-pci-bus.c
    M hw/scsi/virtio-scsi.c
    M hw/scsi/vmw_pvscsi.c
    M hw/usb/dev-smartcard-reader.c
    M include/hw/pci-host/spapr.h
    M include/hw/ppc/spapr.h
    M include/hw/ppc/spapr_irq.h
    M include/hw/ppc/xics.h
    M include/hw/ppc/xive.h
    M include/hw/qdev-core.h
    M target/ppc/arch_dump.c
    M target/ppc/cpu-qom.h
    M target/ppc/cpu.h
    M target/ppc/excp_helper.c
    M target/ppc/gdbstub.c
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/machine.c
    M target/ppc/mmu_helper.c
    M target/ppc/translate.c
    M target/ppc/translate/vmx-impl.inc.c
    M target/ppc/translate/vsx-impl.inc.c
    M target/ppc/translate_init.inc.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190219' into 
staging

ppc patch queue 2019-02-19

Here's the next batch of ppc and spapr patches.  Higlights are:

 * A bunch of improvements to TCG handling of vector instructions from
   Richard Henderson and Marc Cave-Ayland

 * Cleanup to the XICS interrupt controller from Greg Kurz, removing
   the special KVM subclasses which were a bad idea

 * Some refinements to the XIVE interrupt controller from Cédric Le
   Goater

 * Fix from Fabiano Rosas for a really dumb buffer overflow in the
   device tree code for memory hotplug

 * Code for allowing access to SPRs from the gdb stub from Fabiano
   Rosas

 * Assorted minor fixes and cleanups

# gpg: Signature made Mon 18 Feb 2019 13:47:54 GMT
# gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <address@hidden>" [full]
# gpg:                 aka "David Gibson (Red Hat) <address@hidden>" [full]
# gpg:                 aka "David Gibson (ozlabs.org) <address@hidden>" [full]
# gpg:                 aka "David Gibson (kernel.org) <address@hidden>" 
[unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-4.0-20190219: (43 commits)
  target/ppc: convert vmin* and vmax* to vector operations
  target/ppc: convert vadd*s and vsub*s to vector operations
  target/ppc: Split out VSCR_SAT to a vector field
  target/ppc: Add set_vscr_sat
  target/ppc: Use mtvscr/mfvscr for vmstate
  target/ppc: Add helper_mfvscr
  target/ppc: Remove vscr_nj and vscr_sat
  target/ppc: Use helper_mtvscr for reset and gdb
  target/ppc: Pass integer to helper_mtvscr
  target/ppc: convert xxsel to vector operations
  target/ppc: convert xxspltw to vector operations
  target/ppc: convert xxspltib to vector operations
  target/ppc: convert VSX logical operations to vector operations
  target/ppc: convert vsplt[bhw] to use vector operations
  target/ppc: convert vspltis[bhw] to use vector operations
  target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector 
operations
  target/ppc: convert VMX logical instructions to use vector operations
  xics: Drop the KVM ICS class
  spapr/irq: Use the "simple" ICS class for KVM
  xics: Handle KVM interrupt presentation from "simple" ICS code
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/a0430dd8abb8...2e68b8620637
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-commits] [qemu/qemu] b39701: hw/ppc/prep: Drop useless inclusion of "hw/i386/pc.h", Peter Maydell <=
Prev by Date: [Qemu-commits] [qemu/qemu] ce32bf: qapi: Belatedly document modular code generation
Next by Date: [Qemu-commits] [qemu/qemu] 56090d: usb: rearrange usb_ep_get()
Previous by thread: [Qemu-commits] [qemu/qemu] ce32bf: qapi: Belatedly document modular code generation
Next by thread: [Qemu-commits] [qemu/qemu] 56090d: usb: rearrange usb_ep_get()
Index(es):
- Date
- Thread