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[Qemu-commits] [qemu/qemu] 00a014: riscv: spike: Fix memory leak in the


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 00a014: riscv: spike: Fix memory leak in the board init
Date: Fri, 09 Nov 2018 02:52:39 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 00a014ac01feac875468d38c376f7e06f050f992
      
https://github.com/qemu/qemu/commit/00a014ac01feac875468d38c376f7e06f050f992
  Author: Alistair Francis <address@hidden>
  Date:   2018-11-08 (Thu, 08 Nov 2018)

  Changed paths:
    M hw/riscv/spike.c

  Log Message:
  -----------
  riscv: spike: Fix memory leak in the board init

Coverity caught a malloc() call that was never freed. This patch ensures
that we free the memory but also updates the allocation to use
g_strdup_printf() instead of malloc().

Signed-off-by: Alistair Francis <address@hidden>
Suggested-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Palmer Dabbelt <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>


  Commit: d3c2bbb166f8cd840a3f4efec31d55485f1360ed
      
https://github.com/qemu/qemu/commit/d3c2bbb166f8cd840a3f4efec31d55485f1360ed
  Author: Peter Maydell <address@hidden>
  Date:   2018-11-08 (Thu, 08 Nov 2018)

  Changed paths:
    M hw/riscv/spike.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-rc1' 
into staging

A Single RISC-V Patch for 3.1-rc1

This tag contains a single patch that I'd like to target for rc1: a fix
for a memory leak that was detected by static code analysis.

There are still three patch sets that I'd like to try to get up for 3.1:

* The patch set Basian just published that contains fixes for a pair of
  issues he found when converting our port to decodetree.
* An as-of-yet-unwritten fix to the third issue that Basian pointed out.
* A fix to our fflags bug, which is currently coupled to some CSR
  refactoring that I don't think is OK for 3.1.

I'm at Plumbers next week (and I think Alistair is there too?), but I'll
try to find a way to squeeze in as much as possible.

# gpg: Signature made Thu 08 Nov 2018 16:50:27 GMT
# gpg:                using RSA key EF4CA1502CCBAB41
# gpg: Good signature from "Palmer Dabbelt <address@hidden>"
# gpg:                 aka "Palmer Dabbelt <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41

* remotes/riscv/tags/riscv-for-master-3.1-rc1:
  riscv: spike: Fix memory leak in the board init

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/a7ce790a029b...d3c2bbb166f8
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