qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 2becc8: target/xtensa: fix gdbstub register c


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 2becc8: target/xtensa: fix gdbstub register counts
Date: Tue, 25 Sep 2018 03:37:15 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 2becc8fd7e6cbb69015ab7a2cbd21bba5a5ffbb9
      
https://github.com/qemu/qemu/commit/2becc8fd7e6cbb69015ab7a2cbd21bba5a5ffbb9
  Author: Max Filippov <address@hidden>
  Date:   2018-08-19 (Sun, 19 Aug 2018)

  Changed paths:
    M target/xtensa/helper.c

  Log Message:
  -----------
  target/xtensa: fix gdbstub register counts

This fixes communication with gdb in the presence of type-5 (TIE state
mapped on user registers) and type-7 (special case of masked registers)
registers in the xtensa core config.

Cc: address@hidden
Signed-off-by: Max Filippov <address@hidden>


  Commit: a7ac06fd416cc5569c121e537fd12d210744687a
      
https://github.com/qemu/qemu/commit/a7ac06fd416cc5569c121e537fd12d210744687a
  Author: Max Filippov <address@hidden>
  Date:   2018-08-19 (Sun, 19 Aug 2018)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/gdbstub.c
    M target/xtensa/helper.c

  Log Message:
  -----------
  target/xtensa: clean up gdbstub register handling

- move register counting to xtensa/gdbstub.c
- add symbolic names for register types and flags from GDB and use them
  in register counting and access functions.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 9a124b69279de00fc36662a5bad00159fc682965
      
https://github.com/qemu/qemu/commit/9a124b69279de00fc36662a5bad00159fc682965
  Author: Max Filippov <address@hidden>
  Date:   2018-08-19 (Sun, 19 Aug 2018)

  Changed paths:
    M target/xtensa/Makefile.objs
    A target/xtensa/core-test_kc705_be.c
    A target/xtensa/core-test_kc705_be/core-isa.h
    A target/xtensa/core-test_kc705_be/gdb-config.inc.c
    A target/xtensa/core-test_kc705_be/xtensa-modules.inc.c

  Log Message:
  -----------
  target/xtensa: add test_kc705_be core

This is big-endian core with HiFi2 instructions.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 76b7dd641fad4ab8c35f647cffe0fd47c4302b72
      
https://github.com/qemu/qemu/commit/76b7dd641fad4ab8c35f647cffe0fd47c4302b72
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/helper.c
    M target/xtensa/op_helper.c

  Log Message:
  -----------
  target/xtensa: convert to do_transaction_failed

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Max Filippov <address@hidden>


  Commit: 3ee01413be6cd99a6014f49f06de709597fedf25
      
https://github.com/qemu/qemu/commit/3ee01413be6cd99a6014f49f06de709597fedf25
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M tests/tcg/xtensa/Makefile
    A tests/tcg/xtensa/test_phys_mem.S

  Log Message:
  -----------
  tests/tcg/xtensa: add test for failed memory transactions

Failed memory transactions should raise exceptions 14 (for fetch) or 15
(for load/store) with XEA2.

Memory accesses that result in TLB miss followed by an attempt to load
PTE from physical memory which fails should raise InstTLBMiss or
LoadStoreTLBMiss with XEA2.

Signed-off-by: Max Filippov <address@hidden>


  Commit: e8e05fd472cbe77650353eaa50d5a9703a91c1db
      
https://github.com/qemu/qemu/commit/e8e05fd472cbe77650353eaa50d5a9703a91c1db
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: fix FPU2000 bugs

- FPU2000 defines rfr and wfr opcodes, not rfr.s and wfr.s;
- movcond.s uses incorrect operand in tcg_gen_movcond: in case the
  condition is not satisfied it must not change its argument 0.

Fixes: c04e1692e3aa ("target/xtensa: extract FPU2000 opcode
translators")
Cc: address@hidden
Signed-off-by: Max Filippov <address@hidden>


  Commit: f81aa02e0d63dbc0b7ad864e48fd5e245b0021e0
      
https://github.com/qemu/qemu/commit/f81aa02e0d63dbc0b7ad864e48fd5e245b0021e0
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M tests/tcg/xtensa/linker.ld.S

  Log Message:
  -----------
  tests/tcg/xtensa: move exception handlers to separate section

Not all CPU configurations may have enough space for handler code
between exception/interrupt vectors. Leave jumps to the handlers at the
vectors, but move all handlers past the vectors area.

Signed-off-by: Max Filippov <address@hidden>


  Commit: f68774ccd8174dc80208dcb3b24924c7c1c726f9
      
https://github.com/qemu/qemu/commit/f68774ccd8174dc80208dcb3b24924c7c1c726f9
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M tests/tcg/xtensa/vectors.S

  Log Message:
  -----------
  tests/tcg/xtensa: only generate defined exception handlers

Don't generate handlers for IRQ levels that are not defined for the CPU
or for window overflow/underflow exceptions for configs w/o windowed
registers.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 7a54cfbcee8dd7aa87ce655a321b622107556326
      
https://github.com/qemu/qemu/commit/7a54cfbcee8dd7aa87ce655a321b622107556326
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: fix s32c1i TCGMemOp flags

s32c1i must load and store value with target endianness, not host.
This results in an infinite loop in atomic cmpxchg sequences when target
endianness doesn't match host endianness.

Fixes: 9fb40342d4b3 ("target/xtensa: support MTTCG")
Cc: address@hidden
Signed-off-by: Max Filippov <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: 5aa37f488fa22c07495edbc04aa63812fbcdb79c
      
https://github.com/qemu/qemu/commit/5aa37f488fa22c07495edbc04aa63812fbcdb79c
  Author: Max Filippov <address@hidden>
  Date:   2018-09-17 (Mon, 17 Sep 2018)

  Changed paths:
    M target/xtensa/xtensa-semi.c

  Log Message:
  -----------
  target/xtensa: support input from chardev console

Complete xtensa-semi chardev console implementation: allow reading input
characters from file descriptor 0 and call sys_select_one simcall on it.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 8ca19bd882997b69cd9c37adabbfe8360a0a83ee
      
https://github.com/qemu/qemu/commit/8ca19bd882997b69cd9c37adabbfe8360a0a83ee
  Author: Peter Maydell <address@hidden>
  Date:   2018-09-25 (Tue, 25 Sep 2018)

  Changed paths:
    M target/xtensa/Makefile.objs
    A target/xtensa/core-test_kc705_be.c
    A target/xtensa/core-test_kc705_be/core-isa.h
    A target/xtensa/core-test_kc705_be/gdb-config.inc.c
    A target/xtensa/core-test_kc705_be/xtensa-modules.inc.c
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/gdbstub.c
    M target/xtensa/helper.c
    M target/xtensa/op_helper.c
    M target/xtensa/translate.c
    M target/xtensa/xtensa-semi.c
    M tests/tcg/xtensa/Makefile
    M tests/tcg/xtensa/linker.ld.S
    A tests/tcg/xtensa/test_phys_mem.S
    M tests/tcg/xtensa/vectors.S

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/xtensa/tags/20180918-xtensa' into 
staging

target/xtensa updates:

- fix gdbstub register counts;
- add big-endian core test_kc705_be;
- convert to do_transaction_failed and add test for failed memory
  transactions;
- fix couple FPU2000 bugs;
- fix s32c1i implementation;
- clean up exception handlers generation in xtensa tests;
- add support for semihosting console input through a chardev.

# gpg: Signature made Tue 18 Sep 2018 18:35:50 BST
# gpg:                using RSA key 51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <address@hidden>"
# gpg:                 aka "Max Filippov <address@hidden>"
# gpg:                 aka "Max Filippov <address@hidden>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20180918-xtensa:
  target/xtensa: support input from chardev console
  target/xtensa: fix s32c1i TCGMemOp flags
  tests/tcg/xtensa: only generate defined exception handlers
  tests/tcg/xtensa: move exception handlers to separate section
  target/xtensa: fix FPU2000 bugs
  tests/tcg/xtensa: add test for failed memory transactions
  target/xtensa: convert to do_transaction_failed
  target/xtensa: add test_kc705_be core
  target/xtensa: clean up gdbstub register handling
  target/xtensa: fix gdbstub register counts

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/5b9000b52fba...8ca19bd88299
      **NOTE:** This service has been marked for deprecation: 
https://developer.github.com/changes/2018-04-25-github-services-deprecation/

      Functionality will be removed from GitHub.com on January 31st, 2019.

reply via email to

[Prev in Thread] Current Thread [Next in Thread]