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[Qemu-commits] [qemu/qemu] a9f27e: i386: Clean up cache CPUID code


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] a9f27e: i386: Clean up cache CPUID code
Date: Tue, 12 Jun 2018 02:39:36 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: a9f27ea9adc8c695197bd08f2e938ef7b4183f07
      
https://github.com/qemu/qemu/commit/a9f27ea9adc8c695197bd08f2e938ef7b4183f07
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-06-08 (Fri, 08 Jun 2018)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  i386: Clean up cache CPUID code

Always initialize CPUCaches structs with cache information, even
if legacy_cache=true.  Use different CPUCaches struct for
CPUID[2], CPUID[4], and the AMD CPUID leaves.

This will simplify a lot the logic inside cpu_x86_cpuid().

Signed-off-by: Eduardo Habkost <address@hidden>
Signed-off-by: Babu Moger <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 8f4202fb1080f86958782b1fca0bf0279f67d136
      
https://github.com/qemu/qemu/commit/8f4202fb1080f86958782b1fca0bf0279f67d136
  Author: Babu Moger <address@hidden>
  Date:   2018-06-08 (Fri, 08 Jun 2018)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/kvm.c

  Log Message:
  -----------
  i386: Populate AMD Processor Cache Information for cpuid 0x8000001D

Add information for cpuid 0x8000001D leaf. Populate cache topology information
for different cache types (Data Cache, Instruction Cache, L2 and L3) supported
by 0x8000001D leaf. Please refer to the Processor Programming Reference (PPR)
for AMD Family 17h Model for more details.

Signed-off-by: Babu Moger <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 1fb6752ecf87fb132035d3c03b0b9ca012265492
      
https://github.com/qemu/qemu/commit/1fb6752ecf87fb132035d3c03b0b9ca012265492
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-06-10 (Sun, 10 Jun 2018)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c

  Log Message:
  -----------
  pc: Remove PC_COMPAT_2_12 from 3.0 machine-types

commit f548222c added PC_COMPAT_2_12 to the 3.0 PC machine-types.
I believe this happened during manual conflict resolution when
applying the patch.

Cc: Xiao Guangrong <address@hidden>
Cc: Juan Quintela <address@hidden>
Fixes: f548222c24342ca74689de7794f9006b43f86a54
Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Marcel Apfelbaum<address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: a48f7644f812f451e1f5fef044a530c6dfa99a15
      
https://github.com/qemu/qemu/commit/a48f7644f812f451e1f5fef044a530c6dfa99a15
  Author: Peter Maydell <address@hidden>
  Date:   2018-06-11 (Mon, 11 Jun 2018)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/i386/kvm.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' 
into staging

x86 queue, 2018-06-11

* Support for CPUID[0x8000001D] (AMD Cache Topology Information)
* pc bug fix: Remove PC_COMPAT_2_12 from 3.0 machine-types

# gpg: Signature made Mon 11 Jun 2018 18:22:48 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <address@hidden>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  pc: Remove PC_COMPAT_2_12 from 3.0 machine-types
  i386: Populate AMD Processor Cache Information for cpuid 0x8000001D
  i386: Clean up cache CPUID code

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/2afc4e3df80d...a48f7644f812
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