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[Qemu-commits] [qemu/qemu] 2cfbf3: target/arm: Honour FPCR.FZ in FRECPX
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[Qemu-commits] [qemu/qemu] 2cfbf3: target/arm: Honour FPCR.FZ in FRECPX |
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Date: |
Thu, 31 May 2018 10:08:21 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 2cfbf36ec07f7cac1aabb3b86f1c95c8a55424ba
https://github.com/qemu/qemu/commit/2cfbf36ec07f7cac1aabb3b86f1c95c8a55424ba
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M target/arm/helper-a64.c
Log Message:
-----------
target/arm: Honour FPCR.FZ in FRECPX
The FRECPX instructions should (like most other floating point operations)
honour the FPCR.FZ bit which specifies whether input denormals should
be flushed to zero (or FZ16 for the half-precision version).
We forgot to implement this, which doesn't affect the results (since
the calculation doesn't actually care about the mantissa bits) but did
mean we were failing to set the FPSR.IDC bit.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 0d4a7551d9f14b8ad50adb412cbd9e88dbfa20d0
https://github.com/qemu/qemu/commit/0d4a7551d9f14b8ad50adb412cbd9e88dbfa20d0
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add entries for newer MPS2 boards and devices
Add entries to MAINTAINERS to cover the newer MPS2 boards and
the new devices they use.
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Commit: 887aae10f6150dfdc71c45d7588e8efe6c144019
https://github.com/qemu/qemu/commit/887aae10f6150dfdc71c45d7588e8efe6c144019
Author: Jan Kiszka <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M hw/intc/arm_gicv3_cpuif.c
Log Message:
-----------
hw/intc/arm_gicv3: Fix APxR<n> register dispatching
There was a nasty flip in identifying which register group an access is
targeting. The issue caused spuriously raised priorities of the guest
when handing CPUs over in the Jailhouse hypervisor.
Cc: address@hidden
Signed-off-by: Jan Kiszka <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 34ffacae085914fce54590ea84bae9c6ad95e2a4
https://github.com/qemu/qemu/commit/34ffacae085914fce54590ea84bae9c6ad95e2a4
Author: Shannon Zhao <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M hw/intc/arm_gicv3_kvm.c
Log Message:
-----------
arm_gicv3_kvm: increase clroffset accordingly
It forgot to increase clroffset during the loop. So it only clear the
first 4 bytes.
Fixes: 367b9f527becdd20ddf116e17a3c0c2bbc486920
Cc: address@hidden
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 6c2be133a7478e443c99757b833d0f265c48e0a6
https://github.com/qemu/qemu/commit/6c2be133a7478e443c99757b833d0f265c48e0a6
Author: Richard Henderson <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M include/exec/helper-head.h
M target/arm/helper-a64.c
M target/arm/helper.c
Log Message:
-----------
tcg: Fix helper function vs host abi for float16
Depending on the host abi, float16, aka uint16_t, values are
passed and returned either zero-extended in the host register
or with garbage at the top of the host register.
The tcg code generator has so far been assuming garbage, as that
matches the x86 abi, but this is incorrect for other host abis.
Further, target/arm has so far been assuming zero-extended results,
so that it may store the 16-bit value into a 32-bit slot with the
high 16-bits already clear.
Rectify both problems by mapping "f16" in the helper definition
to uint32_t instead of (a typedef for) uint16_t. This forces
the host compiler to assume garbage in the upper 16 bits on input
and to zero-extend the result on output.
Cc: address@hidden
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 60b8fe49cca0cca360adcf9e58fbe5d1612df36d
https://github.com/qemu/qemu/commit/60b8fe49cca0cca360adcf9e58fbe5d1612df36d
Author: Igor Mammedov <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M hw/arm/boot.c
Log Message:
-----------
arm: fix qemu crash on startup with -bios option
When QEMU is started with following CLI
-machine virt,gic-version=3,accel=kvm -cpu host -bios AAVMF_CODE.fd
it crashes with abort at
accel/kvm/kvm-all.c:2164:
KVM_SET_DEVICE_ATTR failed: Group 6 attr 0x000000000000c665: Invalid argument
Which is caused by implicit dependency of kvm_arm_gicv3_reset() on
arm_gicv3_icc_reset() where the later is called by CPU reset
reset callback.
However commit:
3b77f6c arm/boot: split load_dtb() from arm_load_kernel()
broke CPU reset callback registration in case
arm_load_kernel()
...
if (!info->kernel_filename || info->firmware_loaded)
branch is taken, i.e. it's sufficient to provide a firmware
or do not provide kernel on CLI to skip cpu reset callback
registration, where before offending commit the callback
has been registered unconditionally.
Fix it by registering the callback right at the beginning of
arm_load_kernel() unconditionally instead of doing it at the end.
NOTE:
we probably should eliminate that dependency anyways as well as
separate arch CPU reset parts from arm_load_kernel() into CPU
itself, but that refactoring that I probably would have to do
anyways later for CPU hotplug to work.
Reported-by: Auger Eric <address@hidden>
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Tested-by: Eric Auger <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 7e3ef27c7c1ccbac589ad0a67c40b5df57e2af71
https://github.com/qemu/qemu/commit/7e3ef27c7c1ccbac589ad0a67c40b5df57e2af71
Author: Paolo Bonzini <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M target/arm/gdbstub.c
Log Message:
-----------
arm: fix malloc type mismatch
cpregs_keys is an uint32_t* so the allocation should use uint32_t.
g_new is even better because it is type-safe.
Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: a13b6d8eeca5cb786e934ad73f8b3b7e01c20121
https://github.com/qemu/qemu/commit/a13b6d8eeca5cb786e934ad73f8b3b7e01c20121
Author: Francisco Iglesias <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M hw/dma/xlnx-zdma.c
Log Message:
-----------
xlnx-zdma: Correct mem leaks and memset to zero on desc unaligned errors
Coverity found that the string return by 'object_get_canonical_path' was not
being freed at two locations in the model (CID 1391294 and CID 1391293) and
also that a memset was being called with a value greater than the max of a byte
on the second argument (CID 1391286). This patch corrects this by adding the
freeing of the strings and also changing to memset to zero instead on
descriptor unaligned errors.
Signed-off-by: Francisco Iglesias <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 5deac39cd94e11d72b6ca8663fbf369691a33dc8
https://github.com/qemu/qemu/commit/5deac39cd94e11d72b6ca8663fbf369691a33dc8
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
Correct CPACR reset value for v7 cores
In commit f0aff255700 we made cpacr_write() enforce that some CPACR
bits are RAZ/WI and some are RAO/WI for ARMv7 cores. Unfortunately
we forgot to also update the register's reset value. The effect
was that (a) a guest that read CPACR on reset would not see ones in
the RAO bits, and (b) if you did a migration before the guest did
a write to the CPACR then the migration would fail because the
destination would enforce the RAO bits and then complain that they
didn't match the zero value from the source.
Implement reset for the CPACR using a custom reset function
that just calls cpacr_write(), to avoid having to duplicate
the logic for which bits are RAO.
This bug would affect migration for TCG CPUs which are ARMv7
with VFP but without one of Neon or VFPv3.
Reported-by: Cédric Le Goater <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Tested-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Commit: 2ce931d01290d450a9c9b5fa00d1347535230b4c
https://github.com/qemu/qemu/commit/2ce931d01290d450a9c9b5fa00d1347535230b4c
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M include/exec/memory.h
Log Message:
-----------
memory.h: Improve IOMMU related documentation
Add more detail to the documentation for memory_region_init_iommu()
and other IOMMU-related functions and data structures.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Commit: c874dc4f5e8ffae46ddaf2a0f223269f23f3a00d
https://github.com/qemu/qemu/commit/c874dc4f5e8ffae46ddaf2a0f223269f23f3a00d
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M accel/tcg/translate-all.c
M exec.c
M include/exec/exec-all.h
M target/xtensa/op_helper.c
Log Message:
-----------
Make tb_invalidate_phys_addr() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to tb_invalidate_phys_addr().
Its callers either have an attrs value to hand, or don't care
and can use MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: bc6b1cec84618bf977a451eac30ed1ee4c735963
https://github.com/qemu/qemu/commit/bc6b1cec84618bf977a451eac30ed1ee4c735963
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M accel/tcg/translate-all.c
M exec.c
M hw/vfio/common.c
M include/exec/memory.h
M memory_ldst.inc.c
M target/arm/kvm.c
M target/riscv/helper.c
Log Message:
-----------
Make address_space_translate{, _cached}() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to address_space_translate()
and address_space_translate_cached(). Callers either have an
attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: f26404fbeef33ac8798d2541839f7873bbae91fd
https://github.com/qemu/qemu/commit/f26404fbeef33ac8798d2541839f7873bbae91fd
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
M include/exec/memory.h
M include/sysemu/dma.h
M target/ppc/mmu-hash64.c
Log Message:
-----------
Make address_space_map() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to address_space_map().
Its callers either have an attrs value to hand, or don't care
and can use MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: fddffa426894e3dae339d113c98a2979026bb6d3
https://github.com/qemu/qemu/commit/fddffa426894e3dae339d113c98a2979026bb6d3
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
M include/exec/memory.h
M include/sysemu/dma.h
M target/s390x/diag.c
M target/s390x/excp_helper.c
M target/s390x/mmu_helper.c
M target/s390x/sigp.c
Log Message:
-----------
Make address_space_access_valid() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to address_space_access_valid().
Its callers either have an attrs value to hand, or don't care
and can use MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 53d0790dfefdf3e226dd50a581477c5721786a76
https://github.com/qemu/qemu/commit/53d0790dfefdf3e226dd50a581477c5721786a76
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
Log Message:
-----------
Make flatview_extend_translation() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to flatview_extend_translation().
Its callers either have an attrs value to hand, or don't care
and can use MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 6d7b9a6c3bd21bba95203abd1ed9a572688822ae
https://github.com/qemu/qemu/commit/6d7b9a6c3bd21bba95203abd1ed9a572688822ae
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
M hw/s390x/s390-pci-inst.c
M include/exec/memory-internal.h
M memory.c
Log Message:
-----------
Make memory_region_access_valid() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to memory_region_access_valid().
Its callers either have an attrs value to hand, or don't care
and can use MEMTXATTRS_UNSPECIFIED.
The callsite in flatview_access_valid() is part of a recursive
loop flatview_access_valid() -> memory_region_access_valid() ->
subpage_accepts() -> flatview_access_valid(); we make it pass
MEMTXATTRS_UNSPECIFIED for now, until the next several commits
have plumbed an attrs parameter through the rest of the loop
and we can add an attrs parameter to flatview_access_valid().
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 8372d383279f772a8727ca7ee5f288cecb175c7b
https://github.com/qemu/qemu/commit/8372d383279f772a8727ca7ee5f288cecb175c7b
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
M hw/hppa/dino.c
M hw/nvram/fw_cfg.c
M hw/scsi/esp.c
M hw/xen/xen_pt_msi.c
M include/exec/memory.h
M memory.c
Log Message:
-----------
Make MemoryRegion valid.accepts callback take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to the MemoryRegion valid.accepts
callback. We'll need this for subpage_accepts().
We could take the approach we used with the read and write
callbacks and add new a new _with_attrs version, but since there
are so few implementations of the accepts hook we just change
them all.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: eace72b7a6d01d2e8fb69611c7ca028c8832f7aa
https://github.com/qemu/qemu/commit/eace72b7a6d01d2e8fb69611c7ca028c8832f7aa
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
Log Message:
-----------
Make flatview_access_valid() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to flatview_access_valid().
Its callers now all have an attrs value to hand, so we can
correct our earlier temporary use of MEMTXATTRS_UNSPECIFIED.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: efa99a2ff8edf39f48777326c2debdb196f07c41
https://github.com/qemu/qemu/commit/efa99a2ff8edf39f48777326c2debdb196f07c41
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
M include/exec/memory.h
Log Message:
-----------
Make flatview_translate() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to flatview_translate(); all its
callers now have attrs available.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 7446eb07c1da660c38bf075555f2d69b84caf481
https://github.com/qemu/qemu/commit/7446eb07c1da660c38bf075555f2d69b84caf481
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
M hw/virtio/vhost.c
M include/exec/memory.h
Log Message:
-----------
Make address_space_get_iotlb_entry() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to address_space_get_iotlb_entry().
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 49e14aa827d5e85a5e9196d9d747e3c353c57b5c
https://github.com/qemu/qemu/commit/49e14aa827d5e85a5e9196d9d747e3c353c57b5c
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
Log Message:
-----------
Make flatview_do_translate() take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to flatview_do_translate().
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: 2f7b009c2e791e1321dd762e16ce3b0a611ac009
https://github.com/qemu/qemu/commit/2f7b009c2e791e1321dd762e16ce3b0a611ac009
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M exec.c
Log Message:
-----------
Make address_space_translate_iommu take a MemTxAttrs argument
As part of plumbing MemTxAttrs down to the IOMMU translate method,
add MemTxAttrs as an argument to address_space_translate_iommu().
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Commit: e0a37e266084fb26951465e08515af46807c312c
https://github.com/qemu/qemu/commit/e0a37e266084fb26951465e08515af46807c312c
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M include/migration/vmstate.h
Log Message:
-----------
vmstate.h: Provide VMSTATE_BOOL_SUB_ARRAY
Provide a VMSTATE_BOOL_SUB_ARRAY to go with VMSTATE_UINT8_SUB_ARRAY
and friends.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 6e3e723966197463117642d8a5fd7b4f6446e510
https://github.com/qemu/qemu/commit/6e3e723966197463117642d8a5fd7b4f6446e510
Author: Shannon Zhao <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M hw/arm/virt-acpi-build.c
Log Message:
-----------
ARM: ACPI: Fix use-after-free due to memory realloc
acpi_data_push uses g_array_set_size to resize the memory size. If there
is no enough contiguous memory, the address will be changed. So previous
pointer could not be used any more. It must update the pointer and use
the new one.
Also, previous codes wrongly use le32 conversion of iort->node_offset
for subsequent computations that will result incorrect value if host is
not litlle endian. So use the non-converted one instead.
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 2f15b79280cf71b7991dfd3f0312a1797630e376
https://github.com/qemu/qemu/commit/2f15b79280cf71b7991dfd3f0312a1797630e376
Author: Shannon Zhao <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M hw/intc/arm_gic_kvm.c
M hw/intc/arm_gicv3_kvm.c
Log Message:
-----------
KVM: GIC: Fix memory leak due to calling kvm_init_irq_routing twice
kvm_irqchip_create called by kvm_init will call kvm_init_irq_routing to
initialize global capability variables. If we call kvm_init_irq_routing in
GIC realize function, previous allocated memory will leak.
Fix this by deleting the unnecessary call.
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: c181ddaa176856b3cd2dfd12bbcf25fa9c884a97
https://github.com/qemu/qemu/commit/c181ddaa176856b3cd2dfd12bbcf25fa9c884a97
Author: Peter Maydell <address@hidden>
Date: 2018-05-31 (Thu, 31 May 2018)
Changed paths:
M MAINTAINERS
M accel/tcg/translate-all.c
M exec.c
M hw/arm/boot.c
M hw/arm/virt-acpi-build.c
M hw/dma/xlnx-zdma.c
M hw/hppa/dino.c
M hw/intc/arm_gic_kvm.c
M hw/intc/arm_gicv3_cpuif.c
M hw/intc/arm_gicv3_kvm.c
M hw/nvram/fw_cfg.c
M hw/s390x/s390-pci-inst.c
M hw/scsi/esp.c
M hw/vfio/common.c
M hw/virtio/vhost.c
M hw/xen/xen_pt_msi.c
M include/exec/exec-all.h
M include/exec/helper-head.h
M include/exec/memory-internal.h
M include/exec/memory.h
M include/migration/vmstate.h
M include/sysemu/dma.h
M memory.c
M memory_ldst.inc.c
M target/arm/gdbstub.c
M target/arm/helper-a64.c
M target/arm/helper.c
M target/arm/kvm.c
M target/ppc/mmu-hash64.c
M target/riscv/helper.c
M target/s390x/diag.c
M target/s390x/excp_helper.c
M target/s390x/mmu_helper.c
M target/s390x/sigp.c
M target/xtensa/op_helper.c
Log Message:
-----------
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20180531-1' into staging
target-arm queue:
* target/arm: Honour FPCR.FZ in FRECPX
* MAINTAINERS: Add entries for newer MPS2 boards and devices
* hw/intc/arm_gicv3: Fix APxR<n> register dispatching
* arm_gicv3_kvm: fix bug in writing zero bits back to the in-kernel
GIC state
* tcg: Fix helper function vs host abi for float16
* arm: fix qemu crash on startup with -bios option
* arm: fix malloc type mismatch
* xlnx-zdma: Correct mem leaks and memset to zero on desc unaligned errors
* Correct CPACR reset value for v7 cores
* memory.h: Improve IOMMU related documentation
* exec: Plumb transaction attributes through various functions in
preparation for allowing IOMMUs to see them
* vmstate.h: Provide VMSTATE_BOOL_SUB_ARRAY
* ARM: ACPI: Fix use-after-free due to memory realloc
* KVM: GIC: Fix memory leak due to calling kvm_init_irq_routing twice
# gpg: Signature made Thu 31 May 2018 16:54:40 BST
# gpg: using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg: aka "Peter Maydell <address@hidden>"
# gpg: aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20180531-1: (25 commits)
KVM: GIC: Fix memory leak due to calling kvm_init_irq_routing twice
ARM: ACPI: Fix use-after-free due to memory realloc
vmstate.h: Provide VMSTATE_BOOL_SUB_ARRAY
Make address_space_translate_iommu take a MemTxAttrs argument
Make flatview_do_translate() take a MemTxAttrs argument
Make address_space_get_iotlb_entry() take a MemTxAttrs argument
Make flatview_translate() take a MemTxAttrs argument
Make flatview_access_valid() take a MemTxAttrs argument
Make MemoryRegion valid.accepts callback take a MemTxAttrs argument
Make memory_region_access_valid() take a MemTxAttrs argument
Make flatview_extend_translation() take a MemTxAttrs argument
Make address_space_access_valid() take a MemTxAttrs argument
Make address_space_map() take a MemTxAttrs argument
Make address_space_translate{, _cached}() take a MemTxAttrs argument
Make tb_invalidate_phys_addr() take a MemTxAttrs argument
memory.h: Improve IOMMU related documentation
Correct CPACR reset value for v7 cores
xlnx-zdma: Correct mem leaks and memset to zero on desc unaligned errors
arm: fix malloc type mismatch
arm: fix qemu crash on startup with -bios option
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/a3ac12fba028...c181ddaa1768
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