qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] d19d1f: i386: define the 'ssbd' CPUID feature


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] d19d1f: i386: define the 'ssbd' CPUID feature bit (CVE-201...
Date: Tue, 22 May 2018 02:58:52 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: d19d1f965904a533998739698020ff4ee8a103da
      
https://github.com/qemu/qemu/commit/d19d1f965904a533998739698020ff4ee8a103da
  Author: Daniel P. Berrangé <address@hidden>
  Date:   2018-05-21 (Mon, 21 May 2018)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)

New microcode introduces the "Speculative Store Bypass Disable"
CPUID feature bit. This needs to be exposed to guest OS to allow
them to protect against CVE-2018-3639.

Signed-off-by: Daniel P. Berrangé <address@hidden>
Reviewed-by: Konrad Rzeszutek Wilk <address@hidden>
Signed-off-by: Konrad Rzeszutek Wilk <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: cfeea0c021db6234c154dbc723730e81553924ff
      
https://github.com/qemu/qemu/commit/cfeea0c021db6234c154dbc723730e81553924ff
  Author: Konrad Rzeszutek Wilk <address@hidden>
  Date:   2018-05-21 (Mon, 21 May 2018)

  Changed paths:
    M target/i386/cpu.h
    M target/i386/kvm.c
    M target/i386/machine.c

  Log Message:
  -----------
  i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)

"Some AMD processors only support a non-architectural means of enabling
speculative store bypass disable (SSBD).  To allow a simplified view of
this to a guest, an architectural definition has been created through a new
CPUID bit, 0x80000008_EBX[25], and a new MSR, 0xc001011f.  With this, a
hypervisor can virtualize the existence of this definition and provide an
architectural method for using SSBD to a guest.

Add the new CPUID feature, the new MSR and update the existing SSBD
support to use this MSR when present." (from x86/speculation: Add virtualized
speculative store bypass disable support in Linux).

Signed-off-by: Konrad Rzeszutek Wilk <address@hidden>
Reviewed-by: Daniel P. Berrangé <address@hidden>
Signed-off-by: Daniel P. Berrangé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 403503b162ffc33fb64cfefdf7b880acf41772cd
      
https://github.com/qemu/qemu/commit/403503b162ffc33fb64cfefdf7b880acf41772cd
  Author: Konrad Rzeszutek Wilk <address@hidden>
  Date:   2018-05-21 (Mon, 21 May 2018)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)

AMD Zen expose the Intel equivalant to Speculative Store Bypass Disable
via the 0x80000008_EBX[25] CPUID feature bit.

This needs to be exposed to guest OS to allow them to protect
against CVE-2018-3639.

Signed-off-by: Konrad Rzeszutek Wilk <address@hidden>
Reviewed-by: Daniel P. Berrangé <address@hidden>
Signed-off-by: Daniel P. Berrangé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 4f50c1673a89b07f376ce5c42d22d79a79cd466d
      
https://github.com/qemu/qemu/commit/4f50c1673a89b07f376ce5c42d22d79a79cd466d
  Author: Peter Maydell <address@hidden>
  Date:   2018-05-22 (Tue, 22 May 2018)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/i386/kvm.c
    M target/i386/machine.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' 
into staging

Speculative store buffer bypass mitigation (CVE-2018-3639)

# gpg: Signature made Mon 21 May 2018 23:00:46 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <address@hidden>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)
  i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)
  i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/9802316ed6c1...4f50c1673a89
      **NOTE:** This service been marked for deprecation: 
https://developer.github.com/changes/2018-04-25-github-services-deprecation/

      Functionality will be removed from GitHub.com on January 31st, 2019.

reply via email to

[Prev in Thread] Current Thread [Next in Thread]