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[Qemu-commits] [qemu/qemu] 7a3538: hw/arm/iotkit.c: fix minor memory lea


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 7a3538: hw/arm/iotkit.c: fix minor memory leak
Date: Mon, 14 May 2018 01:44:31 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 7a35383afd66458ff11fa5c72a1599f3a24f3073
      
https://github.com/qemu/qemu/commit/7a35383afd66458ff11fa5c72a1599f3a24f3073
  Author: Peter Maydell <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M hw/arm/iotkit.c

  Log Message:
  -----------
  hw/arm/iotkit.c: fix minor memory leak

Coverity (CID1390573) spots that we forgot to free the
gpioname strings in a loop in the iotkit realize function.
Correct the error.

This isn't a significant leak, because this function
only ever runs once.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Message-id: address@hidden


  Commit: 1839189bbf89889076aadf0c793c1b57977b28d7
      
https://github.com/qemu/qemu/commit/1839189bbf89889076aadf0c793c1b57977b28d7
  Author: Peter Maydell <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M fpu/softfloat.c

  Log Message:
  -----------
  softfloat: Handle default NaN mode after pickNaNMulAdd, not before

It is implementation defined whether a multiply-add of
(0,inf,qnan) or (inf,0,qnan) raises InvalidaOperation or
not, so we let the target-specific pickNaNMulAdd function
handle this. This means that we must do the "return the
default NaN in default NaN mode" check after the call,
not before. Correct the ordering, and restore the comment
from the old propagateFloat64MulAddNaN() that warned about
this corner case.

This fixes a regression from 2.11 for Arm guests where we would
incorrectly fail to set the Invalid flag for these cases.

Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Tested-by: Alex Bennée <address@hidden>
Message-id: address@hidden


  Commit: 38aefb578dcf918359249ae5b29183255db809c2
      
https://github.com/qemu/qemu/commit/38aefb578dcf918359249ae5b29183255db809c2
  Author: Igor Mammedov <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M hw/i386/pc.c
    M include/hw/i386/pc.h

  Log Message:
  -----------
  pc: simplify MachineClass::get_hotplug_handler handling

By default MachineClass::get_hotplug_handler is NULL and concrete board
should set it to it's own handler.
Considering there isn't any default handler, drop saving empty
MachineClass::get_hotplug_handler in child class and make PC code
consistent with spapr/s390x boards.

We can bring this back when actual usecase surfaces and do it
consistently across boards that use get_hotplug_handler().

Suggested-by: David Gibson <address@hidden>
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a3fc8396352e945f9d14cac0237ebf9d91745969
      
https://github.com/qemu/qemu/commit/a3fc8396352e945f9d14cac0237ebf9d91745969
  Author: Igor Mammedov <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M hw/arm/sysbus-fdt.c
    M hw/arm/virt.c
    M hw/core/platform-bus.c
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c
    M include/hw/arm/virt.h
    M include/hw/platform-bus.h

  Log Message:
  -----------
  platform-bus-device: use device plug callback instead of machine_done notifier

platform-bus were using machine_done notifier to get and map
(assign irq/mmio resources) dynamically added sysbus devices
after all '-device' options had been processed.
That however creates non obvious dependencies on ordering of
machine_done notifiers and requires carefull line juggling
to keep it working. For example see comment above
create_platform_bus() and 'straitforward' arm_load_kernel()
had to converted to machine_done notifier and that lead to
yet another machine_done notifier to keep it working
arm_register_platform_bus_fdt_creator().

Instead of hiding resource assignment in platform-bus-device
to magically initialize sysbus devices, use device plug
callback and assign resources explicitly at board level
at the moment each -device option is being processed.

That adds a bunch of machine declaration boiler plate to
e500plat board, similar to ARM/x86 but gets rid of hidden
machine_done notifier and would allow to remove the dependent
notifiers in ARM code simplifying it and making code flow
easier to follow.

Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3b77f6c353a4bb8a66dab8a46668a7ccccc9de03
      
https://github.com/qemu/qemu/commit/3b77f6c353a4bb8a66dab8a46668a7ccccc9de03
  Author: Igor Mammedov <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M hw/arm/boot.c
    M hw/arm/sysbus-fdt.c
    M hw/arm/virt.c
    M include/hw/arm/arm.h
    M include/hw/arm/sysbus-fdt.h

  Log Message:
  -----------
  arm/boot: split load_dtb() from arm_load_kernel()

load_dtb() depends on arm_load_kernel() to figure out place
in RAM where it should be loaded, but it's not required for
arm_load_kernel() to work. Sometimes it's neccesary for
devices added with -device/device_add to be enumerated in
DTB as well, which's lead to [1] and surrounding commits to
add 2 more machine_done notifiers with non obvious ordering
to make dynamic sysbus devices initialization happen in
the right order.

However instead of moving whole arm_load_kernel() in to
machine_done, it's sufficient to move only load_dtb() into
virt_machine_done() notifier and remove ArmLoadKernelNotifier/
/PlatformBusFDTNotifierParams notifiers, which saves us ~90LOC
and simplifies code flow quite a bit.
Later would allow to consolidate DTB generation within one
function for 'mach-virt' board and make it reentrant so it
could generate updated DTB in device hotplug secenarios.

While at it rename load_dtb() to arm_load_dtb() since it's
public now.

Add additional field skip_dtb_autoload to struct arm_boot_info
to allow manual DTB load later in mach-virt and to avoid touching
all other boards to explicitly call arm_load_dtb().

 1) (ac9d32e hw/arm/boot: arm_load_kernel implemented as a machine init done 
notifier)

Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: debbdc00182eb83db5d8acc241feb37c81bc63ec
      
https://github.com/qemu/qemu/commit/debbdc00182eb83db5d8acc241feb37c81bc63ec
  Author: Igor Mammedov <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M hw/arm/virt.c
    M hw/i386/pc.c
    M hw/ppc/e500plat.c
    M hw/ppc/spapr.c
    M hw/s390x/s390-virtio-ccw.c

  Log Message:
  -----------
  make sure that we aren't overwriting mc->get_hotplug_handler by accident

Suggested-by: Eduardo Habkost <address@hidden>
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: cd95fc28fb6d8afced0d70ce52c294d0761a9daa
      
https://github.com/qemu/qemu/commit/cd95fc28fb6d8afced0d70ce52c294d0761a9daa
  Author: Peter Maydell <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M include/qemu/atomic.h

  Log Message:
  -----------
  atomic.h: Work around gcc spurious "unused value" warning

Some versions of gcc produce a spurious warning if the result of
__atomic_compare_echange_n() is not used and the type involved
is a signed 8 bit value:
  error: value computed is not used [-Werror=unused-value]
This has been seen on at least
 gcc (Ubuntu 5.4.0-6ubuntu1~16.04.9) 5.4.0 20160609

Work around this by using an explicit cast to void to indicate
that we don't care about the return value.

We don't currently use our atomic_cmpxchg() macro on any signed
8 bit types, but the upcoming support for the Arm v8.1-Atomics
will require it.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>


  Commit: b87fb8cd9f9a0ba599ff79e7bf03222da02e5724
      
https://github.com/qemu/qemu/commit/b87fb8cd9f9a0ba599ff79e7bf03222da02e5724
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M tcg/tcg-op.c
    M tcg/tcg-op.h

  Log Message:
  -----------
  tcg: Introduce helpers for integer min/max

These operations are re-invented by several targets so far.
Several supported hosts have insns for these, so place the
expanders out-of-line for a future introduction of tcg opcodes.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ecb8ab8d71aab770555a6972428b711400a27248
      
https://github.com/qemu/qemu/commit/ecb8ab8d71aab770555a6972428b711400a27248
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Use new min/max expanders

The generic expanders replace nearly identical code in the translator.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 426afc3bd94a2c06b06652010d0802d84809b53b
      
https://github.com/qemu/qemu/commit/426afc3bd94a2c06b06652010d0802d84809b53b
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: Use new min/max expanders

The generic expanders replace nearly identical code in the translator.

Acked-by: Max Filippov <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5507c2bf35aa6b4705939349184e71afd5e058b2
      
https://github.com/qemu/qemu/commit/5507c2bf35aa6b4705939349184e71afd5e058b2
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/tcg-runtime.h
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Introduce atomic helpers for integer min/max

Given that this atomic operation will be used by both risc-v
and aarch64, let's not duplicate code across the two targets.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 58edf9eef9d0e99dc051367c5a446a62223ec6e4
      
https://github.com/qemu/qemu/commit/58edf9eef9d0e99dc051367c5a446a62223ec6e4
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M accel/tcg/atomic_template.h

  Log Message:
  -----------
  tcg: Use GEN_ATOMIC_HELPER_FN for opposite endian atomic add

Suggested-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3e281df1e1d17773cc212fa8cd7794957cee1a7d
      
https://github.com/qemu/qemu/commit/3e281df1e1d17773cc212fa8cd7794957cee1a7d
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/riscv/translate.c

  Log Message:
  -----------
  target/riscv: Use new atomic min/max expanders

Reviewed-by: Michael Clark <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 68412d2ecedbab5a43b0d346cddb27e00d724aff
      
https://github.com/qemu/qemu/commit/68412d2ecedbab5a43b0d346cddb27e00d724aff
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M linux-user/elfload.c
    M target/arm/cpu.h
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode

The insns in the ARMv8.1-Atomics are added to the existing
load/store exclusive and load/store reg opcode spaces.
Rearrange the top-level decoders for these to accomodate.
The Atomics insns themselves still generate Unallocated.

Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
[PMM: Drop the ARM_FEATURE_V8_1 feature flag]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 74608ea45434c9b07055b21885e093528c5ed98c
      
https://github.com/qemu/qemu/commit/74608ea45434c9b07055b21885e093528c5ed98c
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Fill in disas_ldst_atomic

This implements all of the v8.1-Atomics instructions except
for compare-and-swap, which is decoded elsewhere.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 44ac14b06fa33f60982923b6b8a3bf8dd2fea61d
      
https://github.com/qemu/qemu/commit/44ac14b06fa33f60982923b6b8a3bf8dd2fea61d
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Implement CAS and CASP

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ec7f05fae36637d11de272da82ad1e6c233e77d7
      
https://github.com/qemu/qemu/commit/ec7f05fae36637d11de272da82ad1e6c233e77d7
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/cpu64.c

  Log Message:
  -----------
  target/arm: Enable ARM_FEATURE_V8_ATOMICS for user-only

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a6117fae4576edfe7a5a5b802a742c33112c0993
      
https://github.com/qemu/qemu/commit/a6117fae4576edfe7a5a5b802a742c33112c0993
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Implement vector shifted SCVF/UCVF for fp16

While we have some of the scalar paths for *CVF for fp16,
we failed to decode the fp16 version of these instructions.

Cc: address@hidden
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d0ba8e74acd299b092786ffc30b306638d395a9e
      
https://github.com/qemu/qemu/commit/d0ba8e74acd299b092786ffc30b306638d395a9e
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Implement vector shifted FCVT for fp16

While we have some of the scalar paths for FCVT for fp16,
we failed to decode the fp16 version of these instructions.

Cc: address@hidden
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 88808a022c06f98d81cd3f2d105a5734c5614839
      
https://github.com/qemu/qemu/commit/88808a022c06f98d81cd3f2d105a5734c5614839
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Fix float16 to/from int16

The instruction "ucvtf v0.4h, v04h, #2", with input 0x8000u,
overflows the intermediate float16 to infinity before we have a
chance to scale the output.  Use float64 as the intermediate type
so that no input argument (uint32_t in this case) can overflow
or round before scaling.  Given the declared argument, the signed
int32_t function has the same problem.

When converting from float16 to integer, using u/int32_t instead
of u/int16_t means that the bounding is incorrect.

Cc: address@hidden
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9a9f1f59521f46e8ff4527d9a2b52f83577e2aa3
      
https://github.com/qemu/qemu/commit/9a9f1f59521f46e8ff4527d9a2b52f83577e2aa3
  Author: Richard Henderson <address@hidden>
  Date:   2018-05-10 (Thu, 10 May 2018)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Clear SVE high bits for FMOV

Use write_fp_dreg and clear_vec_high to zero the bits
that need zeroing for these cases.

Cc: address@hidden
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f5583c527f0e1ed2496ee49bcff25ca1b481139f
      
https://github.com/qemu/qemu/commit/f5583c527f0e1ed2496ee49bcff25ca1b481139f
  Author: Peter Maydell <address@hidden>
  Date:   2018-05-11 (Fri, 11 May 2018)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/tcg-runtime.h
    M fpu/softfloat.c
    M hw/arm/boot.c
    M hw/arm/iotkit.c
    M hw/arm/sysbus-fdt.c
    M hw/arm/virt.c
    M hw/core/platform-bus.c
    M hw/i386/pc.c
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c
    M hw/ppc/spapr.c
    M hw/s390x/s390-virtio-ccw.c
    M include/hw/arm/arm.h
    M include/hw/arm/sysbus-fdt.h
    M include/hw/arm/virt.h
    M include/hw/i386/pc.h
    M include/hw/platform-bus.h
    M include/qemu/atomic.h
    M linux-user/elfload.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/translate-a64.c
    M target/riscv/translate.c
    M target/xtensa/translate.c
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180510' 
into staging

target-arm queue:
 * hw/arm/iotkit.c: fix minor memory leak
 * softfloat: fix wrong-exception-flags bug for multiply-add corner case
 * arm: isolate and clean up DTB generation
 * implement Arm v8.1-Atomics extension
 * Fix some bugs and missing instructions in the v8.2-FP16 extension

# gpg: Signature made Thu 10 May 2018 18:44:34 BST
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180510: (21 commits)
  target/arm: Clear SVE high bits for FMOV
  target/arm: Fix float16 to/from int16
  target/arm: Implement vector shifted FCVT for fp16
  target/arm: Implement vector shifted SCVF/UCVF for fp16
  target/arm: Enable ARM_FEATURE_V8_ATOMICS for user-only
  target/arm: Implement CAS and CASP
  target/arm: Fill in disas_ldst_atomic
  target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode
  target/riscv: Use new atomic min/max expanders
  tcg: Use GEN_ATOMIC_HELPER_FN for opposite endian atomic add
  tcg: Introduce atomic helpers for integer min/max
  target/xtensa: Use new min/max expanders
  target/arm: Use new min/max expanders
  tcg: Introduce helpers for integer min/max
  atomic.h: Work around gcc spurious "unused value" warning
  make sure that we aren't overwriting mc->get_hotplug_handler by accident
  arm/boot: split load_dtb() from arm_load_kernel()
  platform-bus-device: use device plug callback instead of machine_done notifier
  pc: simplify MachineClass::get_hotplug_handler handling
  softfloat: Handle default NaN mode after pickNaNMulAdd, not before
  ...

Signed-off-by: Peter Maydell <address@hidden>

# Conflicts:
#       target/riscv/translate.c


Compare: https://github.com/qemu/qemu/compare/c74e62ee3e2d...f5583c527f0e
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