qemu-commits
[Top][All Lists]
Advanced
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 39e3e1: target/m68k: fix TCG variable double

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 39e3e1: target/m68k: fix TCG variable double free
Date: Fri, 26 Jan 2018 03:29:30 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 39e3e113bdb27b4144d697fbd6678a9c24740103
      
https://github.com/qemu/qemu/commit/39e3e113bdb27b4144d697fbd6678a9c24740103
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: fix TCG variable double free

t64 is also unconditionally freed after the switch () { ... }

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 98670d47cd8d63a529ff230fd39ddaa186156f8c
      
https://github.com/qemu/qemu/commit/98670d47cd8d63a529ff230fd39ddaa186156f8c
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/softmmu_template.h
    M accel/tcg/user-exec.c
    M include/exec/exec-all.h
    M include/qom/cpu.h
    M target/alpha/cpu.h
    M target/alpha/helper.c
    M target/alpha/mem_helper.c
    M target/arm/cpu.c
    M target/arm/op_helper.c
    M target/cris/cpu.h
    M target/cris/helper.c
    M target/cris/op_helper.c
    M target/hppa/cpu.h
    M target/hppa/helper.c
    M target/hppa/op_helper.c
    M target/i386/cpu.h
    M target/i386/excp_helper.c
    M target/i386/mem_helper.c
    M target/lm32/cpu.h
    M target/lm32/helper.c
    M target/lm32/op_helper.c
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/op_helper.c
    M target/microblaze/cpu.h
    M target/microblaze/helper.c
    M target/microblaze/op_helper.c
    M target/mips/helper.c
    M target/mips/internal.h
    M target/mips/op_helper.c
    M target/moxie/cpu.h
    M target/moxie/helper.c
    M target/nios2/cpu.h
    M target/nios2/helper.c
    M target/nios2/mmu.c
    M target/openrisc/cpu.h
    M target/openrisc/mmu.c
    M target/openrisc/mmu_helper.c
    M target/ppc/cpu.h
    M target/ppc/mmu_helper.c
    M target/ppc/user_only_helper.c
    M target/s390x/excp_helper.c
    M target/s390x/internal.h
    M target/s390x/mem_helper.c
    M target/sh4/cpu.h
    M target/sh4/helper.c
    M target/sh4/op_helper.c
    M target/sparc/cpu.h
    M target/sparc/ldst_helper.c
    M target/sparc/mmu_helper.c
    M target/tilegx/cpu.c
    M target/tricore/op_helper.c
    M target/unicore32/cpu.h
    M target/unicore32/helper.c
    M target/unicore32/op_helper.c
    M target/unicore32/softmmu.c
    M target/xtensa/op_helper.c

  Log Message:
  -----------
  accel/tcg: add size paremeter in tlb_fill()

The MC68040 MMU provides the size of the access that
triggers the page fault.

This size is set in the Special Status Word which
is written in the stack frame of the access fault
exception.

So we need the size in m68k_cpu_unassigned_access() and
m68k_cpu_handle_mmu_fault().

To be able to do that, this patch modifies the prototype of
handle_mmu_fault handler, tlb_fill() and probe_write().
do_unassigned_access() already includes a size parameter.

This patch also updates handle_mmu_fault handlers and
tlb_fill() of all targets (only parameter, no code change).

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 88b2fef6c3c3b45ac0dc2196ace7248a09c8e41d
      
https://github.com/qemu/qemu/commit/88b2fef6c3c3b45ac0dc2196ace7248a09c8e41d
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/monitor.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add MC68040 MMU

Only add MC68040 MMU page table processing and related
registers (Special Status Word, Translation Control Register,
User Root Pointer and Supervisor Root Pointer).

Transparent Translation Registers, DFC/SFC and pflush/ptest
will be added later.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: c05c73b0838fc1b3fea87bc0ffa7b80b0556a2cb
      
https://github.com/qemu/qemu/commit/c05c73b0838fc1b3fea87bc0ffa7b80b0556a2cb
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/monitor.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add Transparent Translation

Add ittr0, ittr1, dttr0, dttr1 and manage Transparent Translations

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 54e1e0b5b5ce4fc76335b1fbbf09cb8fdd5ab89d
      
https://github.com/qemu/qemu/commit/54e1e0b5b5ce4fc76335b1fbbf09cb8fdd5ab89d
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add index parameter to gen_load()/gen_store() and Co.

The instruction "moves" can select source and destination
address space (user or kernel). This patch modifies
all the load/store functions to be able to provide
the address space the caller wants to use instead
of using the current one. All the callers are modified
to provide the default address space to these functions.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 5fa9f1f28321f7268e68e58cff8c61a2ab817f91
      
https://github.com/qemu/qemu/commit/5fa9f1f28321f7268e68e58cff8c61a2ab817f91
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/monitor.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add moves

and introduce SFC and DFC control registers.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: e55886c3340c3a3f1267a3a3d42082008bb255fb
      
https://github.com/qemu/qemu/commit/e55886c3340c3a3f1267a3a3d42082008bb255fb
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/helper.h
    M target/m68k/monitor.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add pflush/ptest

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 2097dca6d3a30b80ac5a6232f518548d5ae644a9
      
https://github.com/qemu/qemu/commit/2097dca6d3a30b80ac5a6232f518548d5ae644a9
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M hmp-commands-info.hx
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/monitor.c

  Log Message:
  -----------
  target/m68k: add HMP command "info tlb"

Dump MMU state and address mappings.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: fca3dad533741ef90650a949cb0cab7ba8437c5e
      
https://github.com/qemu/qemu/commit/fca3dad533741ef90650a949cb0cab7ba8437c5e
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-26 (Fri, 26 Jan 2018)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/softmmu_template.h
    M accel/tcg/user-exec.c
    M hmp-commands-info.hx
    M include/exec/exec-all.h
    M include/qom/cpu.h
    M target/alpha/cpu.h
    M target/alpha/helper.c
    M target/alpha/mem_helper.c
    M target/arm/cpu.c
    M target/arm/op_helper.c
    M target/cris/cpu.h
    M target/cris/helper.c
    M target/cris/op_helper.c
    M target/hppa/cpu.h
    M target/hppa/helper.c
    M target/hppa/op_helper.c
    M target/i386/cpu.h
    M target/i386/excp_helper.c
    M target/i386/mem_helper.c
    M target/lm32/cpu.h
    M target/lm32/helper.c
    M target/lm32/op_helper.c
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/helper.h
    M target/m68k/monitor.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c
    M target/microblaze/cpu.h
    M target/microblaze/helper.c
    M target/microblaze/op_helper.c
    M target/mips/helper.c
    M target/mips/internal.h
    M target/mips/op_helper.c
    M target/moxie/cpu.h
    M target/moxie/helper.c
    M target/nios2/cpu.h
    M target/nios2/helper.c
    M target/nios2/mmu.c
    M target/openrisc/cpu.h
    M target/openrisc/mmu.c
    M target/openrisc/mmu_helper.c
    M target/ppc/cpu.h
    M target/ppc/mmu_helper.c
    M target/ppc/user_only_helper.c
    M target/s390x/excp_helper.c
    M target/s390x/internal.h
    M target/s390x/mem_helper.c
    M target/sh4/cpu.h
    M target/sh4/helper.c
    M target/sh4/op_helper.c
    M target/sparc/cpu.h
    M target/sparc/ldst_helper.c
    M target/sparc/mmu_helper.c
    M target/tilegx/cpu.c
    M target/tricore/op_helper.c
    M target/unicore32/cpu.h
    M target/unicore32/helper.c
    M target/unicore32/op_helper.c
    M target/unicore32/softmmu.c
    M target/xtensa/op_helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.12-pull-request' 
into staging

# gpg: Signature made Thu 25 Jan 2018 15:15:03 GMT
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <address@hidden>"
# gpg:                 aka "Laurent Vivier <address@hidden>"
# gpg:                 aka "Laurent Vivier (Red Hat) <address@hidden>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-2.12-pull-request:
  target/m68k: add HMP command "info tlb"
  target/m68k: add pflush/ptest
  target/m68k: add moves
  target/m68k: add index parameter to gen_load()/gen_store() and Co.
  target/m68k: add Transparent Translation
  target/m68k: add MC68040 MMU
  accel/tcg: add size paremeter in tlb_fill()
  target/m68k: fix TCG variable double free

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/d2bc6e1f6224...fca3dad53374
reply via email to
[Prev in Thread] Current Thread [Next in Thread]