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[Qemu-commits] [qemu/qemu] 05b9ec: sparc/leon3 irqmp: fix IRQ software a

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 05b9ec: sparc/leon3 irqmp: fix IRQ software ack
Date: Thu, 25 Jan 2018 09:04:17 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 05b9ec96c1ae87fa2a61b2dcd62ee1263255c9e5
      
https://github.com/qemu/qemu/commit/05b9ec96c1ae87fa2a61b2dcd62ee1263255c9e5
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/intc/grlib_irqmp.c

  Log Message:
  -----------
  sparc/leon3 irqmp: fix IRQ software ack

With the LEON3 IRQ controller IRQs can be acknowledged 2 ways:
* Explicitly by software writing to the CLEAR_OFFSET register
* Implicitly when the procesor is done running the trap handler attached
  to the IRQ.

The actual IRQMP code only allows the implicit processor triggered IRQ ack.
If software write explicitly to the CLEAR_OFFSET register, this will clear
the pending bit in the register value but this will not lower the ongoing
raised IRQ with the processor. The IRQ will be kept raised to the LEON
processor until the related trap handler is run and the processor implicitly
ack the interrupt. So with the actual IRQMP code trap handler have to be run
even if the software has already done its job by clearing the pending bit.

This feature has been tested on another LEON3 simulator (tsim_leon3 from
Gaisler) and it turns out that the Qemu implementation is not equivalent to
the tsim one. In tsim, if software does clear a pending interrupt before
the related interrupt handler is triggered the said interrupt handler will
not be called.

This patch brings the Qemu IRQMP implementation in line with the tsim
implementation by allowing IRQ to be acknowledged by software only.

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Fabien Chouteau <address@hidden>
Signed-off-by: Mark Cave-Ayland <address@hidden>


  Commit: ffd9589ee2c5e8020da1d4249fee107d97923c8b
      
https://github.com/qemu/qemu/commit/ffd9589ee2c5e8020da1d4249fee107d97923c8b
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M default-configs/sparc64-softmmu.mak
    M hw/pci-bridge/Makefile.objs
    A hw/pci-bridge/simba.c
    M hw/pci-host/apb.c
    A include/hw/pci-bridge/simba.h
    M include/hw/pci-host/apb.h

  Log Message:
  -----------
  apb: split simba PCI bridge into hw/pci-bridge/simba.c

Move the QOM type and macros into a new include/hw/pci-bridge/simba.h
file, and add a new CONFIG_SIMBA Makefile.objs variable which is enabled
for sparc64-softmmu builds only.

Signed-off-by: Mark Cave-Ayland <address@hidden>
CC: Michael S. Tsirkin <address@hidden>
CC: Marcel Apfelbaum <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: 90302adaba9d46c7631dacdd39eb1d920b17720a
      
https://github.com/qemu/qemu/commit/90302adaba9d46c7631dacdd39eb1d920b17720a
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/pci-bridge/simba.c
    M hw/pci-host/apb.c
    M include/hw/pci-bridge/simba.h

  Log Message:
  -----------
  simba: rename PBMPCIBridge and QOM types to reflect simba naming

Here we rename PBMPCIBridge to SimbaPCIBridge and the QOM type from
TYPE_PBM_PCI_BRIDGE to TYPE_SIMBA_PCI_BRIDGE in improve the clarity
of the device name.

Also touch up the relevant spots in apb.c and various other function
names as appropriate.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: fe984c7d0c26e0519e7cce85f1ad61c1dae5bc6a
      
https://github.com/qemu/qemu/commit/fe984c7d0c26e0519e7cce85f1ad61c1dae5bc6a
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/pci-host/apb.c
    M include/hw/pci-host/apb.h

  Log Message:
  -----------
  apb: rename APB functions to use sabre prefix

As hinted in the comment at the top of the file, the naming convention for the
APB types/QOM functions isn't correct. As a starting point we can at least
rename the APB type and related functions to improve the readability of apb.c.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: 5560c58a5048d08e063e74574835a3adb08b8724
      
https://github.com/qemu/qemu/commit/5560c58a5048d08e063e74574835a3adb08b8724
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/pci-host/apb.c

  Log Message:
  -----------
  apb: change pbm_pci_host prefix functions to use sabre_pci prefix

This is the proper name for the PBM host bridge as referenced in the Sun
documentation.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: 8fb28035aad120fc9f23fd0722cd051f484d7c66
      
https://github.com/qemu/qemu/commit/8fb28035aad120fc9f23fd0722cd051f484d7c66
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/pci-host/apb.c
    M include/hw/pci-host/apb.h

  Log Message:
  -----------
  apb: QOMify sabre PCI host bridge

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: b14dcaf4a0fc4a2837530a100b250e66333b2844
      
https://github.com/qemu/qemu/commit/b14dcaf4a0fc4a2837530a100b250e66333b2844
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/pci-host/apb.c
    M hw/sparc64/sun4u.c
    M include/hw/pci-host/apb.h

  Log Message:
  -----------
  apb: rename QOM type from TYPE_APB to TYPE_SABRE

Similarly rename the corresponding APBState typedef to SabreState.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: 5795162a9fb764ddf6ff8e62f9150a400d59f3f2
      
https://github.com/qemu/qemu/commit/5795162a9fb764ddf6ff8e62f9150a400d59f3f2
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M hw/sparc64/sun4u.c

  Log Message:
  -----------
  sun4u: rename apb variables and constants

In order to reflect the previous change of TYPE_APB to TYPE_SABRE, update
the corresponding variable names to keep the terminology consistent.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: 9b30179460e5f6f8fc732a6c0e91f9d954310fe4
      
https://github.com/qemu/qemu/commit/9b30179460e5f6f8fc732a6c0e91f9d954310fe4
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M default-configs/sparc64-softmmu.mak
    M hw/pci-host/Makefile.objs
    R hw/pci-host/apb.c
    A hw/pci-host/sabre.c
    M hw/sparc64/sun4u.c
    R include/hw/pci-host/apb.h
    A include/hw/pci-host/sabre.h

  Log Message:
  -----------
  apb: rename apb.c to sabre.c

This is the final stage in correcting the naming convention with respect to
sabre, APB and PBM. It is effectively a file rename from apb.c to sabre.c
along with touching up a few constants to remove the remaining references
to APB.

Note that as part of the rename process the configuration variable
CONFIG_PCI_APB is changed to CONFIG_PCI_SABRE.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: bfec08b51c7432706dd377d9535cb11dd30635ef
      
https://github.com/qemu/qemu/commit/bfec08b51c7432706dd377d9535cb11dd30635ef
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-24 (Wed, 24 Jan 2018)

  Changed paths:
    M Makefile.objs
    M hw/pci-host/sabre.c
    A hw/pci-host/trace-events

  Log Message:
  -----------
  sabre: convert from SABRE_DPRINTF macro to trace-events

Signed-off-by: Mark Cave-Ayland <address@hidden>
CC: Michael S. Tsirkin <address@hidden>
CC: Marcel Apfelbaum <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>
[for addition of trace-events to hw/pci-host]
Acked-by: Michael S. Tsirkin <address@hidden>


  Commit: be75bbe2d779bd9d4958057fd35172c7eef42258
      
https://github.com/qemu/qemu/commit/be75bbe2d779bd9d4958057fd35172c7eef42258
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M hw/sparc64/sparc64.c
    M hw/sparc64/trace-events

  Log Message:
  -----------
  sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Artyom Tarasenko <address@hidden>


  Commit: 25c5d5acfbaa148b2da64b1f2c1401f87ebb0bb4
      
https://github.com/qemu/qemu/commit/25c5d5acfbaa148b2da64b1f2c1401f87ebb0bb4
  Author: Mark Cave-Ayland <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M hw/sparc64/sun4u.c

  Log Message:
  -----------
  sun4u: implement power device

This inbuilt device contains a single 4-byte register, of which bit 24 is used
to power down the machine on a real Ultra 5.

The power device exists at offset 0x724000 on a real machine, but due to the
current configuration of the BARs in QEMU it must be located lower in PCI IO
space.

For the moment we place the power device at offset 0x7240 as a reminder of its
original location and raise the base PCI IO address from 0x4000 to 0x8000.

Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Artyom Tarasenko <address@hidden>


  Commit: a3f9362af5c7071036fafb66665b85fda1e49bcc
      
https://github.com/qemu/qemu/commit/a3f9362af5c7071036fafb66665b85fda1e49bcc
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-25 (Thu, 25 Jan 2018)

  Changed paths:
    M Makefile.objs
    M default-configs/sparc64-softmmu.mak
    M hw/intc/grlib_irqmp.c
    M hw/pci-bridge/Makefile.objs
    A hw/pci-bridge/simba.c
    M hw/pci-host/Makefile.objs
    R hw/pci-host/apb.c
    A hw/pci-host/sabre.c
    A hw/pci-host/trace-events
    M hw/sparc64/sparc64.c
    M hw/sparc64/sun4u.c
    M hw/sparc64/trace-events
    A include/hw/pci-bridge/simba.h
    R include/hw/pci-host/apb.h
    A include/hw/pci-host/sabre.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into 
staging

qemu-sparc update

# gpg: Signature made Thu 25 Jan 2018 13:44:58 GMT
# gpg:                using RSA key 0x5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <address@hidden>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-signed:
  sun4u: implement power device
  sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events
  sabre: convert from SABRE_DPRINTF macro to trace-events
  apb: rename apb.c to sabre.c
  sun4u: rename apb variables and constants
  apb: rename QOM type from TYPE_APB to TYPE_SABRE
  apb: QOMify sabre PCI host bridge
  apb: change pbm_pci_host prefix functions to use sabre_pci prefix
  apb: rename APB functions to use sabre prefix
  simba: rename PBMPCIBridge and QOM types to reflect simba naming
  apb: split simba PCI bridge into hw/pci-bridge/simba.c
  sparc/leon3 irqmp: fix IRQ software ack

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/b3bbe959b5dc...a3f9362af5c7
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