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[Qemu-commits] [qemu/qemu] 2eb967: target/xtensa: pass actual frame size

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 2eb967: target/xtensa: pass actual frame size to the entry...
Date: Thu, 11 Jan 2018 01:53:34 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 2eb967c4e9898d688a75be43955bbbc2107f29f7
      
https://github.com/qemu/qemu/commit/2eb967c4e9898d688a75be43955bbbc2107f29f7
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/op_helper.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: pass actual frame size to the entry helper

Currently 'entry' opcode helper accepts frame size divided by 8, as it
is encoded in the opcode. Make it more natural and accept actual frame
size instead.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 7f709ce739d46ecd6df98921a20e9dce1dcc421b
      
https://github.com/qemu/qemu/commit/7f709ce739d46ecd6df98921a20e9dce1dcc421b
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    A include/hw/xtensa/xtensa-isa.h
    M target/xtensa/Makefile.objs
    A target/xtensa/xtensa-isa-internal.h
    A target/xtensa/xtensa-isa.c
    A target/xtensa/xtensa-isa.h

  Log Message:
  -----------
  target/xtensa: import libisa source

The canonical way of dealing with Xtensa instructions decoding and
encoding is through the libisa. Libisa is a configuration-independent
library with a stable interface plus generated configuration-specific
xtensa-modules.c file with implementations of decoding and encoding
functions. Libisa is MIT-licensed and originally disributed
xtensa-modules.c files are also MIT-licensed and are available as a
part of xtensa configuration overlay.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 168c12b024704400c3398d22e762c9018b6f33be
      
https://github.com/qemu/qemu/commit/168c12b024704400c3398d22e762c9018b6f33be
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: extract core opcode translators

Move implementations of core opcodes into separate translation
functions. Introduce data structures for mapping opcode name to
translator function. Make an array of core opcode/translator structures.

Signed-off-by: Max Filippov <address@hidden>


  Commit: c04e1692e3aace74018f77f1975fb7fd0bb0eb49
      
https://github.com/qemu/qemu/commit/c04e1692e3aace74018f77f1975fb7fd0bb0eb49
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: extract FPU2000 opcode translators

FPU2000 implements basic single-precision floating point operations and
can be replaced with a different implementation, like DFPU or HiFi. Move
FPU2000 opcode translators into separate functions and list them in a
separate array.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 2557c3adf07ffcf12316afdbdecedfd260c77853
      
https://github.com/qemu/qemu/commit/2557c3adf07ffcf12316afdbdecedfd260c77853
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/import_core.sh

  Log Message:
  -----------
  target/xtensa: update import_core.sh script for libisa

Extract xtensa-modules.c from the overlay, fix up known issues, include
it into the core-$NAME.c.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 845a2f5a9f6cfa5375879611b8646e1872fb8d45
      
https://github.com/qemu/qemu/commit/845a2f5a9f6cfa5375879611b8646e1872fb8d45
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/core-dc232b.c
    A target/xtensa/core-dc232b/xtensa-modules.c

  Log Message:
  -----------
  target/xtensa: switch dc232b to libisa

Autogenerated xtensa-modules.c is added by the import_core.sh script.

Signed-off-by: Max Filippov <address@hidden>


  Commit: e763684f82d6997554642bab9067e2041315f9d3
      
https://github.com/qemu/qemu/commit/e763684f82d6997554642bab9067e2041315f9d3
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/core-dc233c.c
    A target/xtensa/core-dc233c/xtensa-modules.c

  Log Message:
  -----------
  target/xtensa: switch dc233c to libisa

Autogenerated xtensa-modules.c is added by the import_core.sh script.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 502d0f361b690df7d5b19ed8869d7f465fd51ed1
      
https://github.com/qemu/qemu/commit/502d0f361b690df7d5b19ed8869d7f465fd51ed1
  Author: Max Filippov <address@hidden>
  Date:   2017-12-18 (Mon, 18 Dec 2017)

  Changed paths:
    M target/xtensa/core-fsf.c
    A target/xtensa/core-fsf/xtensa-modules.c

  Log Message:
  -----------
  target/xtensa: switch fsf to libisa

Autogenerated xtensa-modules.c is added by the import_core.sh script.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 33071f6888913ef2c6600e827bf63bbb86e249a8
      
https://github.com/qemu/qemu/commit/33071f6888913ef2c6600e827bf63bbb86e249a8
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/helper.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: use libisa for instruction decoding

Replace manual opcode analysis with libisa-based code. This makes it
possible to support variable-encoding instructions of the core ISA, like
const16, and will allow to support advanced Xtensa features, like FLIX
and TIE.

Signed-off-by: Max Filippov <address@hidden>


  Commit: e55239e2b65dbef085917e2dcc7336276877dfed
      
https://github.com/qemu/qemu/commit/e55239e2b65dbef085917e2dcc7336276877dfed
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M tests/tcg/xtensa/test_sr.S

  Log Message:
  -----------
  target/xtensa: tests: fix memctl SR test

memctl SR is not available on dc232b, as it was introduced in more
recent hardware release. Now that this information is available through
the libisa the test fails. Fix the test.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 5b9b27639e4af3e957da1959ad51f94e53c2e6f1
      
https://github.com/qemu/qemu/commit/5b9b27639e4af3e957da1959ad51f94e53c2e6f1
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: drop DisasContext::litbase

It doesn't help much, always-set bit 0 of the LITBASE SR is easy to
compensate with decrement of the l32r immediate argument.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 13f6a7cd3a736b40e14b28d7e4df45ec9333f155
      
https://github.com/qemu/qemu/commit/13f6a7cd3a736b40e14b28d7e4df45ec9333f155
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: add internal/noop SRs and opcodes

Add two special registers: MMID and DDR:
- MMID is write-only and the only side effect of writing to it is output
  to the trace port, which is not emulated;
- DDR is only accessible in debug mode, which is not emulated.

Add two debug-mode-only opcodes:
- rfdd and rfdo do return from the debug mode, which is not emulated.

Add three internal opcodes for full MMU:
- hwwdtlba and hwwitlba are the internal opcodes that write a value into
  autoupdate DTLB or ITLB entry.
- ldpte is internal opcode that loads PTE entry that covers the most
  recent page fault address.
None of these three opcodes may appear in a valid instruction.

Signed-off-by: Max Filippov <address@hidden>


  Commit: d1e9b0068ac9544297042f1c4bbbf1a31a3eee3b
      
https://github.com/qemu/qemu/commit/d1e9b0068ac9544297042f1c4bbbf1a31a3eee3b
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: implement salt/saltu

SALT/SALTU are recent additions to the core Xtensa ISA that do
signed/unsigned setcond.

Signed-off-by: Max Filippov <address@hidden>


  Commit: e98727417aa639024af9d17650f8811dc408885c
      
https://github.com/qemu/qemu/commit/e98727417aa639024af9d17650f8811dc408885c
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: implement GPIO32

GPIO32 is not in the core ISA, but it was widely used in Diamond Cores.
This implementation doesn't do actual I/O and doesn't handle the case of
GPIO32 state being a part of coprocessor.

Signed-off-by: Max Filippov <address@hidden>


  Commit: c5ac936e5e8356cf6bba8e39519a273ab0fc6fed
      
https://github.com/qemu/qemu/commit/c5ac936e5e8356cf6bba8e39519a273ab0fc6fed
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: implement const16

const16 is an opcode that shifts 16 lower bits of an address register
to the 16 upper bits and puts its immediate operand into the lower 16
bits. It is not controlled by an Xtensa option and doesn't have a fixed
opcode.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 5a6539e627faf9251e1db78238b9f9b870610518
      
https://github.com/qemu/qemu/commit/5a6539e627faf9251e1db78238b9f9b870610518
  Author: Max Filippov <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M MAINTAINERS
    M disas/Makefile.objs
    A disas/xtensa.c
    M include/disas/bfd.h
    M target/xtensa/cpu.c

  Log Message:
  -----------
  target/xtensa: implement disassembler

Add disas/xtensa.c and use libisa for instruction decoding/opcode name
lookup.

Signed-off-by: Max Filippov <address@hidden>


  Commit: 76302a95e759c7090396b0ca85cef3412e323130
      
https://github.com/qemu/qemu/commit/76302a95e759c7090396b0ca85cef3412e323130
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-09 (Tue, 09 Jan 2018)

  Changed paths:
    M MAINTAINERS
    M disas/Makefile.objs
    A disas/xtensa.c
    M include/disas/bfd.h
    A include/hw/xtensa/xtensa-isa.h
    M target/xtensa/Makefile.objs
    M target/xtensa/core-dc232b.c
    A target/xtensa/core-dc232b/xtensa-modules.c
    M target/xtensa/core-dc233c.c
    A target/xtensa/core-dc233c/xtensa-modules.c
    M target/xtensa/core-fsf.c
    A target/xtensa/core-fsf/xtensa-modules.c
    M target/xtensa/cpu.c
    M target/xtensa/cpu.h
    M target/xtensa/helper.c
    M target/xtensa/import_core.sh
    M target/xtensa/op_helper.c
    M target/xtensa/translate.c
    A target/xtensa/xtensa-isa-internal.h
    A target/xtensa/xtensa-isa.c
    A target/xtensa/xtensa-isa.h
    M tests/tcg/xtensa/test_sr.S

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/xtensa/tags/20180109-xtensa' into 
staging

target/xtensa updates:

- add libisa to the xtensa target;
- change xtensa instruction translator to use it;
- switch existing xtensa cores to use it;
- add support for a number of instructions: salt/saltu, const16,
  GPIO32 group, debug mode and MMU-related;
- add disassembler for Xtensa.

# gpg: Signature made Tue 09 Jan 2018 18:11:02 GMT
# gpg:                using RSA key 0x51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <address@hidden>"
# gpg:                 aka "Max Filippov <address@hidden>"
# gpg:                 aka "Max Filippov <address@hidden>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20180109-xtensa:
  target/xtensa: implement disassembler
  target/xtensa: implement const16
  target/xtensa: implement GPIO32
  target/xtensa: implement salt/saltu
  target/xtensa: add internal/noop SRs and opcodes
  target/xtensa: drop DisasContext::litbase
  target/xtensa: tests: fix memctl SR test
  target/xtensa: use libisa for instruction decoding
  target/xtensa: switch fsf to libisa
  target/xtensa: switch dc233c to libisa
  target/xtensa: switch dc232b to libisa
  target/xtensa: update import_core.sh script for libisa
  target/xtensa: extract FPU2000 opcode translators
  target/xtensa: extract core opcode translators
  target/xtensa: import libisa source
  target/xtensa: pass actual frame size to the entry helper

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/3cee4db661ab...76302a95e759
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