[Qemu-commits] [qemu/qemu] 5b2d26: arm: implement cache/shareability attribute bits f...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 5b2d261d60caf9d988d91ca1e02392d6fc8ea104
      
https://github.com/qemu/qemu/commit/5b2d261d60caf9d988d91ca1e02392d6fc8ea104
  Author: Andrew Baumann <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M target/arm/helper.c

  Log Message:
  -----------
  arm: implement cache/shareability attribute bits for PAR registers

On a successful address translation instruction, PAR is supposed to
contain cacheability and shareability attributes determined by the
translation. We previously returned 0 for these bits (in line with the
general strategy of ignoring caches and memory attributes), but some
guest OSes may depend on them.

This patch collects the attribute bits in the page-table walk, and
updates PAR with the correct attributes for all LPAE translations.
Short descriptor formats still return 0 for these bits, as in the
prior implementation.

Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 70fbd3c4bf9850fce733eea2c910c397905fb9a3
      
https://github.com/qemu/qemu/commit/70fbd3c4bf9850fce733eea2c910c397905fb9a3
  Author: Thomas Huth <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M hw/arm/fsl-imx6.c

  Log Message:
  -----------
  hw/arm: Mark the "fsl,imx6" device with user_creatable = false

This device causes QEMU to abort if the user tries to instantiate it:

$ qemu-system-aarch64 -M sabrelite -smp 1,maxcpus=2 -device fsl,,imx6
Unexpected error in qemu_chr_fe_init() at chardev/char-fe.c:222:
qemu-system-aarch64: -device fsl,,imx6: Device 'serial0' is in use
Aborted (core dumped)

The device uses serial_hds[] directly in its realize function, so it
can not be instantiated again by the user.

Signed-off-by: Thomas Huth <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5e0c7044b9149fb39f13494d4baaedbe7ae7bed9
      
https://github.com/qemu/qemu/commit/5e0c7044b9149fb39f13494d4baaedbe7ae7bed9
  Author: Thomas Huth <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M hw/arm/fsl-imx25.c

  Log Message:
  -----------
  hw/arm: Mark the "fsl,imx25" device with user_creatable = false

QEMU currently crashes when the user tries to instantiate the fsl,imx25
device manually:

$ aarch64-softmmu/qemu-system-aarch64 -S -M imx25-pdk -device fsl,,imx25
**
ERROR:/home/thuth/devel/qemu/tcg/tcg.c:538:tcg_register_thread:
 assertion failed: (n < max_cpus)

The imx25-pdk board (which is the one that uses this CPU type) only
supports one CPU, and the realize function of the "fsl,imx25" device
also uses serial_hds[] directly, so this device clearly can not be
instantiated twice and thus we should mark it with user_creatable = 0.

Signed-off-by: Thomas Huth <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e4e05b7b3e28970bcb9c0032dc46e30950e75f18
      
https://github.com/qemu/qemu/commit/e4e05b7b3e28970bcb9c0032dc46e30950e75f18
  Author: Thomas Huth <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M hw/arm/fsl-imx31.c

  Log Message:
  -----------
  hw/arm: Mark the "fsl,imx31" device with user_creatable = false

QEMU currently crashes when the user tries to instantiate the fsl,imx31
device manually:

$ aarch64-softmmu/qemu-system-aarch64 -M kzm -device fsl,,imx31
**
ERROR:/home/thuth/devel/qemu/tcg/tcg.c:538:tcg_register_thread:
 assertion failed: (n < max_cpus)
Aborted (core dumped)

The kzm board (which is the one that uses this CPU type) only supports
one CPU, and the realize function of the "fsl,imx31" device also uses
serial_hds[] directly, so this device clearly can not be instantiated
twice and thus we should mark it with user_creatable = false.

Signed-off-by: Thomas Huth <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3448d47b3172015006b79197eb5a69826c6a7b6d
      
https://github.com/qemu/qemu/commit/3448d47b3172015006b79197eb5a69826c6a7b6d
  Author: Peter Maydell <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD

For AArch32 LDREXD and STREXD, architecturally the 32-bit word at the
lowest address is always Rt and the one at addr+4 is Rt2, even if the
CPU is big-endian. Our implementation does these with a single
64-bit store, so if we're big-endian then we need to put the two
32-bit halves together in the opposite order to little-endian,
so that they end up in the right places. We were trying to do
this with the gen_aa32_frob64() function, but that is not correct
for the usermode emulator, because there there is a distinction
between "load a 64 bit value" (which does a BE 64-bit access
and doesn't need swapping) and "load two 32 bit values as one
64 bit access" (where we still need to do the swapping, like
system mode BE32).

Fixes: https://bugs.launchpad.net/qemu/+bug/1725267
Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden


  Commit: 3a575cd2c2411f139a95ace4b2523bc1dfd21755
      
https://github.com/qemu/qemu/commit/3a575cd2c2411f139a95ace4b2523bc1dfd21755
  Author: Shanker Donthineni <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M hw/intc/arm_gicv3_its_kvm.c

  Log Message:
  -----------
  hw/intc/arm_gicv3_its: Fix the VM termination in vm_change_state_handler()

The commit cddafd8f353d ("hw/intc/arm_gicv3_its: Implement state save
/restore") breaks the backward compatibility with the older kernels
where vITS save/restore support is not available. The vmstate function
vm_change_state_handler() should not be registered if the running kernel
doesn't support ITS save/restore feature. Otherwise VM instance will be
killed whenever vmstate callback function is invoked.

Observed a virtual machine shutdown with QEMU-2.10+linux-4.11 when testing
the reboot command "virsh reboot <domain> --mode acpi" instead of reboot.

KVM Error: 'KVM_SET_DEVICE_ATTR failed: Group 4 attr 0x00000000000001'

Signed-off-by: Shanker Donthineni <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 8a7348b5d62d7ea16807e6bea54b448a0184bb0f
      
https://github.com/qemu/qemu/commit/8a7348b5d62d7ea16807e6bea54b448a0184bb0f
  Author: Eric Auger <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M hw/intc/arm_gicv3_its_kvm.c

  Log Message:
  -----------
  hw/intc/arm_gicv3_its: Don't abort on table save failure

The ITS is not fully properly reset at the moment. Caches are
not emptied.

After a reset, in case we attempt to save the state before
the bound devices have registered their MSIs and after the
1st level table has been allocated by the ITS driver
(device BASER is valid), the first level entries are still
invalid. If the device cache is not empty (devices registered
before the reset), vgic_its_save_device_tables fails with -EINVAL.
This causes a QEMU abort().

Cc: address@hidden
Signed-off-by: Eric Auger <address@hidden>
Reported-by: wanghaibin <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a4f0537db0cd68fa2da097995f6ec00747ca453c
      
https://github.com/qemu/qemu/commit/a4f0537db0cd68fa2da097995f6ec00747ca453c
  Author: Peter Maydell <address@hidden>
  Date:   2017-11-07 (Tue, 07 Nov 2017)

  Changed paths:
    M hw/arm/fsl-imx25.c
    M hw/arm/fsl-imx31.c
    M hw/arm/fsl-imx6.c
    M hw/intc/arm_gicv3_its_kvm.c
    M target/arm/helper.c
    M target/arm/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20171107' 
into staging

target-arm queue:
 * arm_gicv3_its: Don't abort on table save failure
 * arm_gicv3_its: Fix the VM termination in vm_change_state_handler()
 * translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD
 * hw/arm: Mark the "fsl,imx31/25/6" devices with user_creatable = false
 * arm: implement cache/shareability attribute bits for PAR registers

# gpg: Signature made Tue 07 Nov 2017 13:33:58 GMT
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20171107:
  hw/intc/arm_gicv3_its: Don't abort on table save failure
  hw/intc/arm_gicv3_its: Fix the VM termination in vm_change_state_handler()
  translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD
  hw/arm: Mark the "fsl,imx31" device with user_creatable = false
  hw/arm: Mark the "fsl,imx25" device with user_creatable = false
  hw/arm: Mark the "fsl,imx6" device with user_creatable = false
  arm: implement cache/shareability attribute bits for PAR registers

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/5853e9220719...a4f0537db0cd