[Qemu-commits] [qemu/qemu] 955fd0: target/arm: Correct exclusive store cmpxchg memop ...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 955fd0ad5d610f62ba2f4ce46a872bf50434dcf8
      
https://github.com/qemu/qemu/commit/955fd0ad5d610f62ba2f4ce46a872bf50434dcf8
  Author: Alistair Francis <address@hidden>
  Date:   2017-08-15 (Tue, 15 Aug 2017)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Correct exclusive store cmpxchg memop mask

When we perform the atomic_cmpxchg operation we want to perform the
operation on a pair of 32-bit registers. Previously we were just passing
the register size in which was set to MO_32. This would result in the
high register to be ignored. To fix this issue we hardcode the size to
be 64-bits long when operating on 32-bit pairs.

Reviewed-by: Edgar E. Iglesias <address@hidden>
Tested-by: Portia Stephens <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 19514cde3b92938df750acaecf2caaa85e1d36a6
      
https://github.com/qemu/qemu/commit/19514cde3b92938df750acaecf2caaa85e1d36a6
  Author: Richard Henderson <address@hidden>
  Date:   2017-08-15 (Tue, 15 Aug 2017)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Correct load exclusive pair atomicity

We are not providing the required single-copy atomic semantics for
the 64-bit operation that is the 32-bit paired load.

At the same time, leave the entire 64-bit value in cpu_exclusive_val
and stop writing to cpu_exclusive_high.  This means that we do not
have to re-assemble the 64-bit quantity when it comes time to store.

At the same time, drop a redundant temporary and perform all loads
directly into the cpu_exclusive_* globals.

Tested-by: Alistair Francis <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4a2fdb78e794c1ad93aa9e160235d6a61a2125de
      
https://github.com/qemu/qemu/commit/4a2fdb78e794c1ad93aa9e160235d6a61a2125de
  Author: Alistair Francis <address@hidden>
  Date:   2017-08-15 (Tue, 15 Aug 2017)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Require alignment for load exclusive

According to the ARM ARM exclusive loads require the same alignment as
exclusive stores. Let's update the memops used for the load to match
that of the store. This adds the alignment requirement to the memops.

Reviewed-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
[rth: Require 16-byte alignment for 64-bit LDXP.]
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 72b384f4a7d1d120a2591fc2019cec6ae50d7998
      
https://github.com/qemu/qemu/commit/72b384f4a7d1d120a2591fc2019cec6ae50d7998
  Author: Peter Maydell <address@hidden>
  Date:   2017-08-15 (Tue, 15 Aug 2017)

  Changed paths:
    M hw/misc/mmio_interface.c

  Log Message:
  -----------
  mmio-interface: Mark as not user creatable

The mmio-interface device is not something we want to allow
users to create on the command line:
 * it is intended as an implementation detail of the memory
   subsystem, which gets created and deleted by that
   subsystem on demand; it makes no sense to create it
   by hand on the command line
 * it uses a pointer property 'host_ptr' which can't be
   set on the command line

Mark the device as not user_creatable to avoid confusion.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Reviewed-by: Thomas Huth <address@hidden>


Compare: https://github.com/qemu/qemu/compare/47025a0193f1...72b384f4a7d1