[Qemu-commits] [qemu/qemu] 1f5c00: qom/cpu: move tlb_flush to cpu_common_reset

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 1f5c00cfdb8114c1e3a13426588ceb64f82c9ddb
      
https://github.com/qemu/qemu/commit/1f5c00cfdb8114c1e3a13426588ceb64f82c9ddb
  Author: Alex Bennée <address@hidden>
  Date:   2017-01-13 (Fri, 13 Jan 2017)

  Changed paths:
    M qom/cpu.c
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/cris/cpu.c
    M target/cris/cpu.h
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/lm32/cpu.c
    M target/lm32/cpu.h
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/mips/cpu.c
    M target/mips/cpu.h
    M target/moxie/cpu.c
    M target/moxie/cpu.h
    M target/openrisc/cpu.c
    M target/openrisc/cpu.h
    M target/ppc/translate_init.c
    M target/s390x/cpu.c
    M target/s390x/cpu.h
    M target/sh4/cpu.c
    M target/sh4/cpu.h
    M target/sparc/cpu.c
    M target/sparc/cpu.h
    M target/tilegx/cpu.c
    M target/tilegx/cpu.h
    M target/tricore/cpu.c

  Log Message:
  -----------
  qom/cpu: move tlb_flush to cpu_common_reset

It is a common thing amongst the various cpu reset functions want to
flush the SoftMMU's TLB entries. This is done either by calling
tlb_flush directly or by way of a general memset of the CPU
structure (sometimes both).

This moves the tlb_flush call to the common reset function and
additionally ensures it is only done for the CONFIG_SOFTMMU case and
when tcg is enabled.

In some target cases we add an empty end_of_reset_fields structure to the
target vCPU structure so have a clear end point for any memset which
is resetting value in the structure before CPU_COMMON (where the TLB
structures are).

While this is a nice clean-up in general it is also a precursor for
changes coming to cputlb for MTTCG where the clearing of entries
can't be done arbitrarily across vCPUs. Currently the cpu_reset
function is usually called from the context of another vCPU as the
architectural power up sequence is run. By using the cputlb API
functions we can ensure the right behaviour in the future.

Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: David Gibson <address@hidden>


  Commit: ba7d3d1858c257e39b47f7f12fa2016ffd960b11
      
https://github.com/qemu/qemu/commit/ba7d3d1858c257e39b47f7f12fa2016ffd960b11
  Author: Alex Bennée <address@hidden>
  Date:   2017-01-13 (Fri, 13 Jan 2017)

  Changed paths:
    M qom/cpu.c

  Log Message:
  -----------
  cpu_common_reset: wrap TCG specific code in tcg_enabled()

Both the cpu->tb_jmp_cache and SoftMMU TLB structures are only used
when running TCG code so we might as well skip them for anything else.

Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>


  Commit: d10eb08f5d8389c814b554d01aa2882ac58221bf
      
https://github.com/qemu/qemu/commit/d10eb08f5d8389c814b554d01aa2882ac58221bf
  Author: Alex Bennée <address@hidden>
  Date:   2017-01-13 (Fri, 13 Jan 2017)

  Changed paths:
    M cputlb.c
    M exec.c
    M hw/sh4/sh7750.c
    M include/exec/exec-all.h
    M target/alpha/cpu.c
    M target/alpha/sys_helper.c
    M target/arm/helper.c
    M target/i386/fpu_helper.c
    M target/i386/helper.c
    M target/i386/machine.c
    M target/i386/misc_helper.c
    M target/i386/svm_helper.c
    M target/microblaze/mmu.c
    M target/mips/cpu.h
    M target/mips/helper.c
    M target/mips/op_helper.c
    M target/openrisc/interrupt.c
    M target/openrisc/interrupt_helper.c
    M target/openrisc/sys_helper.c
    M target/ppc/helper_regs.h
    M target/ppc/misc_helper.c
    M target/ppc/mmu_helper.c
    M target/s390x/gdbstub.c
    M target/s390x/mem_helper.c
    M target/sh4/helper.c
    M target/sparc/ldst_helper.c
    M target/unicore32/cpu.c
    M target/unicore32/helper.c
    M target/xtensa/op_helper.c

  Log Message:
  -----------
  cputlb: drop flush_global flag from tlb_flush

We have never has the concept of global TLB entries which would avoid
the flush so we never actually use this flag. Drop it and make clear
that tlb_flush is the sledge-hammer it has always been.

Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
[DG: ppc portions]
Acked-by: David Gibson <address@hidden>


  Commit: a8c611e1133f97c979922f41103f79309339dc27
      
https://github.com/qemu/qemu/commit/a8c611e1133f97c979922f41103f79309339dc27
  Author: Peter Maydell <address@hidden>
  Date:   2017-01-16 (Mon, 16 Jan 2017)

  Changed paths:
    M cputlb.c
    M exec.c
    M hw/sh4/sh7750.c
    M include/exec/exec-all.h
    M qom/cpu.c
    M target/alpha/cpu.c
    M target/alpha/sys_helper.c
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/helper.c
    M target/cris/cpu.c
    M target/cris/cpu.h
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/i386/fpu_helper.c
    M target/i386/helper.c
    M target/i386/machine.c
    M target/i386/misc_helper.c
    M target/i386/svm_helper.c
    M target/lm32/cpu.c
    M target/lm32/cpu.h
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/microblaze/cpu.c
    M target/microblaze/cpu.h
    M target/microblaze/mmu.c
    M target/mips/cpu.c
    M target/mips/cpu.h
    M target/mips/helper.c
    M target/mips/op_helper.c
    M target/moxie/cpu.c
    M target/moxie/cpu.h
    M target/openrisc/cpu.c
    M target/openrisc/cpu.h
    M target/openrisc/interrupt.c
    M target/openrisc/interrupt_helper.c
    M target/openrisc/sys_helper.c
    M target/ppc/helper_regs.h
    M target/ppc/misc_helper.c
    M target/ppc/mmu_helper.c
    M target/ppc/translate_init.c
    M target/s390x/cpu.c
    M target/s390x/cpu.h
    M target/s390x/gdbstub.c
    M target/s390x/mem_helper.c
    M target/sh4/cpu.c
    M target/sh4/cpu.h
    M target/sh4/helper.c
    M target/sparc/cpu.c
    M target/sparc/cpu.h
    M target/sparc/ldst_helper.c
    M target/tilegx/cpu.c
    M target/tilegx/cpu.h
    M target/tricore/cpu.c
    M target/unicore32/cpu.c
    M target/unicore32/helper.c
    M target/xtensa/op_helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1' into staging

This is the same as the v3 posted except a re-base and a few extra signoffs

# gpg: Signature made Fri 13 Jan 2017 14:26:46 GMT
# gpg:                using RSA key 0xFBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <address@hidden>"
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1:
  cputlb: drop flush_global flag from tlb_flush
  cpu_common_reset: wrap TCG specific code in tcg_enabled()
  qom/cpu: move tlb_flush to cpu_common_reset

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/2ccede18bd24...a8c611e1133f