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[Qemu-commits] [qemu/qemu] ac815f: target-m68k: Implement bitfield ops f

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] ac815f: target-m68k: Implement bitfield ops for registers
Date: Mon, 16 Jan 2017 05:30:05 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: ac815f46a325b5dabe2ebd6561e4244767c0a603
      
https://github.com/qemu/qemu/commit/ac815f46a325b5dabe2ebd6561e4244767c0a603
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: Implement bitfield ops for registers

Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>


  Commit: f2224f2c9a9ed63edaed77ae21ffb1e501d7f247
      
https://github.com/qemu/qemu/commit/f2224f2c9a9ed63edaed77ae21ffb1e501d7f247
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/helper.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: Implement bitfield ops for memory

Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>


  Commit: a45f1763cc501861ea4f5eed06e6f58aa681a082
      
https://github.com/qemu/qemu/commit/a45f1763cc501861ea4f5eed06e6f58aa681a082
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/helper.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: Implement bfffo

Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>


  Commit: 7b6de33e3032f33a9097665adf336c5c3a9eaea7
      
https://github.com/qemu/qemu/commit/7b6de33e3032f33a9097665adf336c5c3a9eaea7
  Author: Thomas Huth <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M default-configs/m68k-softmmu.mak

  Log Message:
  -----------
  m68k: Remove PCI and USB from config file

None of the ColdFire boards that we currently support has a PCI or
USB bus (and AFAIK the upcoming q800 machine does not support PCI
and USB either), so we do not need these settings the config file.

Signed-off-by: Thomas Huth <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>


  Commit: fe53c2be8c12da345bd788b949e0b2360e4b3db3
      
https://github.com/qemu/qemu/commit/fe53c2be8c12da345bd788b949e0b2360e4b3db3
  Author: Laurent Vivier <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: fix bit operation with immediate value

M680x0 bit operations with an immediate value use 9 bits of the 16bit
value, while coldfire ones use only 8 bits.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 695576db2daaf2bdc63e7f6d36038b61caed622a
      
https://github.com/qemu/qemu/commit/695576db2daaf2bdc63e7f6d36038b61caed622a
  Author: Laurent Vivier <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: fix gen_flush_flags()

gen_flush_flags() is setting unconditionally cc_op_synced to 1
and s->cc_op to CC_OP_FLAGS, whereas env->cc_op can be set
to something else by a previous tcg fragment.

We fix that by not setting cc_op_synced to 1
(except for gen_helper_flush_flags() that updates env->cc_op)

FIX: https://github.com/vivier/qemu-m68k/issues/19

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 308feb935249ad745ef763707e1db69bc10ba789
      
https://github.com/qemu/qemu/commit/308feb935249ad745ef763707e1db69bc10ba789
  Author: Laurent Vivier <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: manage pre-dec et post-inc in CAS

In these cases we must update the address register after
the operation.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: b19578f42872aefef891e5804359af8d935a5487
      
https://github.com/qemu/qemu/commit/b19578f42872aefef891e5804359af8d935a5487
  Author: Laurent Vivier <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: CAS doesn't need aligned access

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 727d937b59f1f722f983e20f9cd23b0e7ef60165
      
https://github.com/qemu/qemu/commit/727d937b59f1f722f983e20f9cd23b0e7ef60165
  Author: Laurent Vivier <address@hidden>
  Date:   2017-01-14 (Sat, 14 Jan 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: increment/decrement with SP

On 680x0 family only.

Address Register indirect With postincrement:

When using the stack pointer (A7) with byte size data, the register
is incremented by two.

Address Register indirect With predecrement:

When using the stack pointer (A7) with byte size data, the register
is decremented by two.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 2ccede18bd24fce5db83fef3674563a1f256717b
      
https://github.com/qemu/qemu/commit/2ccede18bd24fce5db83fef3674563a1f256717b
  Author: Peter Maydell <address@hidden>
  Date:   2017-01-16 (Mon, 16 Jan 2017)

  Changed paths:
    M default-configs/m68k-softmmu.mak
    M target/m68k/cpu.h
    M target/m68k/helper.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.9-pull-request' 
into staging

# gpg: Signature made Sat 14 Jan 2017 09:06:31 GMT
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <address@hidden>"
# gpg:                 aka "Laurent Vivier <address@hidden>"
# gpg:                 aka "Laurent Vivier (Red Hat) <address@hidden>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-2.9-pull-request:
  target-m68k: increment/decrement with SP
  target-m68k: CAS doesn't need aligned access
  target-m68k: manage pre-dec et post-inc in CAS
  target-m68k: fix gen_flush_flags()
  target-m68k: fix bit operation with immediate value
  m68k: Remove PCI and USB from config file
  target-m68k: Implement bfffo
  target-m68k: Implement bitfield ops for memory
  target-m68k: Implement bitfield ops for registers

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/02f50ca0ded9...2ccede18bd24
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