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[Qemu-commits] [qemu/qemu] 7ec8ba: tcg: Add field extraction primitives


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 7ec8ba: tcg: Add field extraction primitives
Date: Thu, 12 Jan 2017 08:00:04 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 7ec8bab3deae643b1ce579c2d65a244f30708330
      
https://github.com/qemu/qemu/commit/7ec8bab3deae643b1ce579c2d65a244f30708330
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ia64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Add field extraction primitives

Adds tcg_gen_extract_* and tcg_gen_sextract_* for extraction of
fixed position bitfields, much like we already have for deposit.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0d0d309df0d945e481134f9ef061641f88a2e998
      
https://github.com/qemu/qemu/commit/0d0d309df0d945e481134f9ef061641f88a2e998
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Minor adjustments to deposit expanders

Assert that len is not 0.

Since we have asserted that ofs + len <= N, a later
check for len == N implies that ofs == 0.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 07cc68d52852bf47dea7c402b46ddd28248d4212
      
https://github.com/qemu/qemu/commit/07cc68d52852bf47dea7c402b46ddd28248d4212
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/tcg-op.c
    M tcg/tcg-op.h

  Log Message:
  -----------
  tcg: Add deposit_z expander

While we don't require a new opcode, it is handy to have an expander
that knows the first source is zero.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: e2179f94a17bf0933df29ce1b4f6bc93cbe7dbd3
      
https://github.com/qemu/qemu/commit/e2179f94a17bf0933df29ce1b4f6bc93cbe7dbd3
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/aarch64/tcg-target.inc.c

  Log Message:
  -----------
  tcg/aarch64: Implement field extraction opcodes

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 40b2ccb156534f5d5f1d110a6ce008d87ee10af1
      
https://github.com/qemu/qemu/commit/40b2ccb156534f5d5f1d110a6ce008d87ee10af1
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/arm/tcg-target.h
    M tcg/arm/tcg-target.inc.c

  Log Message:
  -----------
  tcg/arm: Move isa detection to tcg-target.h

This allows us to use this detection within the TCG_TARGET_HAS_*
macros, instead of requiring a function call into tcg-target.inc.c.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ec903af18418e0870af84f6036d7aca1e6a5dc0a
      
https://github.com/qemu/qemu/commit/ec903af18418e0870af84f6036d7aca1e6a5dc0a
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/arm/tcg-target.h
    M tcg/arm/tcg-target.inc.c

  Log Message:
  -----------
  tcg/arm: Implement field extraction opcodes

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 78fdbfb94616f0391834d2eccabd16ea29e37da5
      
https://github.com/qemu/qemu/commit/78fdbfb94616f0391834d2eccabd16ea29e37da5
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Implement field extraction opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: befbb3ced5869003ee2e806c4f36e306918d2374
      
https://github.com/qemu/qemu/commit/befbb3ced5869003ee2e806c4f36e306918d2374
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg/mips: Implement field extraction opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: c05021c3c8d6c976e4677d3010b9ef01488a4434
      
https://github.com/qemu/qemu/commit/c05021c3c8d6c976e4677d3010b9ef01488a4434
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c

  Log Message:
  -----------
  tcg/ppc: Implement field extraction opcodes

Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: b2c98d9d392c87c9b9e975d30f79924719d9cbbe
      
https://github.com/qemu/qemu/commit/b2c98d9d392c87c9b9e975d30f79924719d9cbbe
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/s390/tcg-target.h
    M tcg/s390/tcg-target.inc.c

  Log Message:
  -----------
  tcg/s390: Expose host facilities to tcg-target.h

This lets us expose facilities to TCG_TARGET_HAS_* defines
directly, rather than hiding behind function calls.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: b0bf5fe82df93c180f69d439af59f1f546632f13
      
https://github.com/qemu/qemu/commit/b0bf5fe82df93c180f69d439af59f1f546632f13
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/s390/tcg-target.h
    M tcg/s390/tcg-target.inc.c

  Log Message:
  -----------
  tcg/s390: Implement field extraction opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 752b1be94757de906b9c24ebc8f5e6aa54b96b23
      
https://github.com/qemu/qemu/commit/752b1be94757de906b9c24ebc8f5e6aa54b96b23
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/s390/tcg-target.inc.c

  Log Message:
  -----------
  tcg/s390: Support deposit into zero

Since we can no longer use matching constraints, this does
mean we must handle that data movement by hand.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: f49f1ae73be521f6118ea6c2c2ac3ab5e6c5918f
      
https://github.com/qemu/qemu/commit/f49f1ae73be521f6118ea6c2c2ac3ab5e6c5918f
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/alpha/translate.c

  Log Message:
  -----------
  target-alpha: Use deposit and extract ops

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 59a71b4c5b4ef2ef6425b9e21c972dd5bf450275
      
https://github.com/qemu/qemu/commit/59a71b4c5b4ef2ef6425b9e21c972dd5bf450275
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/arm/translate-a64.c
    M target/arm/translate.c

  Log Message:
  -----------
  target-arm: Use new deposit and extract ops

Use the new primitives for UBFX and SBFX.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 04fc2f1c8fc030a11e08e81bb926392c0991282a
      
https://github.com/qemu/qemu/commit/04fc2f1c8fc030a11e08e81bb926392c0991282a
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/i386/translate.c

  Log Message:
  -----------
  target-i386: Use new deposit and extract ops

A couple of places where it was easy to identify a right-shift
followed by an extract or and-with-immediate, and the obvious
sign-extract from a high byte register.

Acked-by: Eduardo Habkost <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6eebb7a438236fcf3fdadb013921ac597aaea911
      
https://github.com/qemu/qemu/commit/6eebb7a438236fcf3fdadb013921ac597aaea911
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target-mips: Use the new extract op

Use extract for EXT and DEXT.

Reviewed-by: Yongbok Kim <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7b4d326f479fd94869eb4b81715691ce68a6b110
      
https://github.com/qemu/qemu/commit/7b4d326f479fd94869eb4b81715691ce68a6b110
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/ppc/translate.c

  Log Message:
  -----------
  target-ppc: Use the new deposit and extract ops

Use the new primitives for RDWINM and RLDICL.

Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f6156b8fb01177c7c8e82999e0b1ab6de8385179
      
https://github.com/qemu/qemu/commit/f6156b8fb01177c7c8e82999e0b1ab6de8385179
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/s390x/translate.c

  Log Message:
  -----------
  target-s390x: Use the new deposit and extract ops

Use the new primitives for RISBG.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 333b21b809fc80ce67c8f6a7d1c7cc66437d9791
      
https://github.com/qemu/qemu/commit/333b21b809fc80ce67c8f6a7d1c7cc66437d9791
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/optimize.c

  Log Message:
  -----------
  tcg/optimize: Fold movcond 0/1 into setcond

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 82790a870992bd87d5fd9e607f40859dcf4f82ac
      
https://github.com/qemu/qemu/commit/82790a870992bd87d5fd9e607f40859dcf4f82ac
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Add markup for output requires new register

This is the same concept as, and same markup as, the
early clobber markup in gcc.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f69d277ece43c42c7ab0144c2ff05ba740f6706b
      
https://github.com/qemu/qemu/commit/f69d277ece43c42c7ab0144c2ff05ba740f6706b
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/aarch64/tcg-target.inc.c
    M tcg/arm/tcg-target.inc.c
    M tcg/i386/tcg-target.inc.c
    M tcg/ia64/tcg-target.inc.c
    M tcg/mips/tcg-target.inc.c
    M tcg/ppc/tcg-target.inc.c
    M tcg/s390/tcg-target.inc.c
    M tcg/sparc/tcg-target.inc.c
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.inc.c

  Log Message:
  -----------
  tcg: Transition flat op_defs array to a target callback

This will allow the target to tailor the constraints to the
auto-detected ISA extensions.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 069ea736b50b75fdec99c9b8cc603b97bd98419e
      
https://github.com/qemu/qemu/commit/069ea736b50b75fdec99c9b8cc603b97bd98419e
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/aarch64/tcg-target.inc.c
    M tcg/arm/tcg-target.inc.c
    M tcg/i386/tcg-target.inc.c
    M tcg/ia64/tcg-target.inc.c
    M tcg/mips/tcg-target.inc.c
    M tcg/ppc/tcg-target.inc.c
    M tcg/s390/tcg-target.inc.c
    M tcg/sparc/tcg-target.inc.c
    M tcg/tcg.c
    M tcg/tci/tcg-target.inc.c

  Log Message:
  -----------
  tcg: Pass the opcode width to target_parse_constraint

This will let us choose how to interpret a given constraint
depending on whether the opcode is 32- or 64-bit.  Which will
let us share more constraint combinations between opcodes.

At the same time, change the interface to return the advanced
pointer instead of passing it in/out by reference.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 17280ff4a5f264e01e55ae514ee6d3586f9577b2
      
https://github.com/qemu/qemu/commit/17280ff4a5f264e01e55ae514ee6d3586f9577b2
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/README
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Allow an operand to be matching or a constant

This allows an output operand to match an input operand
only when the input operand needs a register.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0e28d0063bbd9e59a981ea2d20f82f30c5d956a8
      
https://github.com/qemu/qemu/commit/0e28d0063bbd9e59a981ea2d20f82f30c5d956a8
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg-runtime.c
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ia64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg-runtime.h
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Add clz and ctz opcodes

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f7749a3317fe02be9c57f4413d185c2ff643d634
      
https://github.com/qemu/qemu/commit/f7749a3317fe02be9c57f4413d185c2ff643d634
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M disas/i386.c

  Log Message:
  -----------
  disas/i386.c: Handle tzcnt

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8d8dd793da13ab052890150fbcae9f506d0077f3
      
https://github.com/qemu/qemu/commit/8d8dd793da13ab052890150fbcae9f506d0077f3
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M disas/ppc.c

  Log Message:
  -----------
  disas/ppc: Handle popcnt and cnttz

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 881549da4b58ed1b703823a435b9028c4a8b41d3
      
https://github.com/qemu/qemu/commit/881549da4b58ed1b703823a435b9028c4a8b41d3
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/alpha/helper.h
    M target/alpha/int_helper.c
    M target/alpha/translate.c

  Log Message:
  -----------
  target-alpha: Use the ctz and clz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 272694a29dc3ed2ed675e03194d33485a2902f0a
      
https://github.com/qemu/qemu/commit/272694a29dc3ed2ed675e03194d33485a2902f0a
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/cris/helper.h
    M target/cris/op_helper.c
    M target/cris/translate.c

  Log Message:
  -----------
  target-cris: Use clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 5318420c62b6f6ce0bb7cfcf115fc21055015f90
      
https://github.com/qemu/qemu/commit/5318420c62b6f6ce0bb7cfcf115fc21055015f90
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/microblaze/helper.h
    M target/microblaze/op_helper.c
    M target/microblaze/translate.c

  Log Message:
  -----------
  target-microblaze: Use clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 1a0196c5c7f197fad7b079074d587b3204bcfb0f
      
https://github.com/qemu/qemu/commit/1a0196c5c7f197fad7b079074d587b3204bcfb0f
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/mips/helper.h
    M target/mips/op_helper.c
    M target/mips/translate.c

  Log Message:
  -----------
  target-mips: Use clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 555baef8d0369fea9d0849ef420841665639c209
      
https://github.com/qemu/qemu/commit/555baef8d0369fea9d0849ef420841665639c209
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/openrisc/helper.h
    M target/openrisc/int_helper.c
    M target/openrisc/translate.c

  Log Message:
  -----------
  target-openrisc: Use clz and ctz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 9b8514e56efa59549ad642a494ba69e2b0ca4daf
      
https://github.com/qemu/qemu/commit/9b8514e56efa59549ad642a494ba69e2b0ca4daf
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate.c

  Log Message:
  -----------
  target-ppc: Use clz and ctz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0f9712b117cae2d8f01475faea662c3e1b57d5f7
      
https://github.com/qemu/qemu/commit/0f9712b117cae2d8f01475faea662c3e1b57d5f7
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/s390x/helper.h
    M target/s390x/int_helper.c
    M target/s390x/translate.c

  Log Message:
  -----------
  target-s390x: Use clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: c3aa369e5d895b4a48339fd3dbb3f72228a8ecc9
      
https://github.com/qemu/qemu/commit/c3aa369e5d895b4a48339fd3dbb3f72228a8ecc9
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/tilegx/helper.c
    M target/tilegx/helper.h
    M target/tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Use clz and ctz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0efa8208544e3e5984d7089ec751d3fbcfd43156
      
https://github.com/qemu/qemu/commit/0efa8208544e3e5984d7089ec751d3fbcfd43156
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/tricore/helper.h
    M target/tricore/op_helper.c
    M target/tricore/translate.c

  Log Message:
  -----------
  target-tricore: Use clz opcode

Tested-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Bastian Koppelmann <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 03a733dc62de8bcf85bba59ac2776ed3d4adcbf1
      
https://github.com/qemu/qemu/commit/03a733dc62de8bcf85bba59ac2776ed3d4adcbf1
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/unicore32/helper.c
    M target/unicore32/helper.h
    M target/unicore32/translate.c

  Log Message:
  -----------
  target-unicore32: Use clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: b79ea941d6be8b64bdfa53bd4a1c09e72fd505a8
      
https://github.com/qemu/qemu/commit/b79ea941d6be8b64bdfa53bd4a1c09e72fd505a8
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/xtensa/helper.h
    M target/xtensa/op_helper.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  target-xtensa: Use clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7539a012f614b724426ac9360238f3281d928a3f
      
https://github.com/qemu/qemu/commit/7539a012f614b724426ac9360238f3281d928a3f
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/translate-a64.c
    M target/arm/translate.c

  Log Message:
  -----------
  target-arm: Use clz opcode

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e5143c90883cd32a432eb793cdcce6bee747834a
      
https://github.com/qemu/qemu/commit/e5143c90883cd32a432eb793cdcce6bee747834a
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/i386/helper.h
    M target/i386/int_helper.c
    M target/i386/translate.c

  Log Message:
  -----------
  target-i386: Use clz and ctz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: d0b07481fabb4dc4ed05d56d09718758f5f7a136
      
https://github.com/qemu/qemu/commit/d0b07481fabb4dc4ed05d56d09718758f5f7a136
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c

  Log Message:
  -----------
  tcg/ppc: Handle ctz and clz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 53c76c19904983d2c81e4f5e77027c241918a479
      
https://github.com/qemu/qemu/commit/53c76c19904983d2c81e4f5e77027c241918a479
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/aarch64/tcg-target.inc.c

  Log Message:
  -----------
  tcg/aarch64: Handle ctz and clz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: cc0fec8a4d2a8546fe236a09bfd80150af9cbe6b
      
https://github.com/qemu/qemu/commit/cc0fec8a4d2a8546fe236a09bfd80150af9cbe6b
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/arm/tcg-target.h
    M tcg/arm/tcg-target.inc.c

  Log Message:
  -----------
  tcg/arm: Handle ctz and clz opcodes

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2a1d9d41aedd722d674b2a94d9b7dbea61469cac
      
https://github.com/qemu/qemu/commit/2a1d9d41aedd722d674b2a94d9b7dbea61469cac
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg/mips: Handle clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: ce411066f4886cf3a4981fc0a070042a221a5fc8
      
https://github.com/qemu/qemu/commit/ce411066f4886cf3a4981fc0a070042a221a5fc8
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/s390/tcg-target.h
    M tcg/s390/tcg-target.inc.c

  Log Message:
  -----------
  tcg/s390: Handle clz opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: cd26449a505f808e479af4fdd539e05767e09c06
      
https://github.com/qemu/qemu/commit/cd26449a505f808e479af4fdd539e05767e09c06
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Fuly convert tcg_target_op_def

Use a switch instead of searching a table.  Share constraints between
32-bit and 64-bit, when at all possible.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 42d5b514928a8a0d2f55a4c243d1333f9675815b
      
https://github.com/qemu/qemu/commit/42d5b514928a8a0d2f55a4c243d1333f9675815b
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Hoist common arguments in tcg_out_op

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6a5aed4bdc7078838a8098336588d56c9ce09d1d
      
https://github.com/qemu/qemu/commit/6a5aed4bdc7078838a8098336588d56c9ce09d1d
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Allow bmi2 shiftx to have non-matching operands

Previously we could not have different constraints for different ISA levels,
which prevented us from eliding the matching constraint for shifts.

We do now have to make sure that the operands match for constant shifts.
We can also handle some small left shifts via lea.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: bbf25f90ba802a286fd72be9175a860ae5fec726
      
https://github.com/qemu/qemu/commit/bbf25f90ba802a286fd72be9175a860ae5fec726
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Handle ctz and clz opcodes

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 4ac76910734209dab83ddd3795f08fc7889ef463
      
https://github.com/qemu/qemu/commit/4ac76910734209dab83ddd3795f08fc7889ef463
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR

The ISA manual documents the output is undefined if the input was zero.

However, we document in target-i386 that the behavior of real silicon
is to preserve the contents of the output register.  We also mention
that there are real applications that depend on this.  That this is
baked into silicon is mentioned as a potential cause for some false
sharing behaviour wrt lzcnt/tzcnt.

Taking advantage of this allows us to save 2 insns in the normal case,
and 4 insns for i686 emulating a 64-bit clz.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 086920c2c8008f125fd38781072fa25c3ad158ea
      
https://github.com/qemu/qemu/commit/086920c2c8008f125fd38781072fa25c3ad158ea
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg-runtime.c
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg-runtime.h

  Log Message:
  -----------
  tcg: Add helpers for clrsb

The number of actual invocations does not warrent an opcode,
and the backends generating it.  But at least we can eliminate
redundant helpers.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: bc21dbcc1203ae6bb536f832c46a3b5e22a73451
      
https://github.com/qemu/qemu/commit/bc21dbcc1203ae6bb536f832c46a3b5e22a73451
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target-arm: Use clrsb helper

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 16256947eb30b3433839b536bd689be1d2bea5d8
      
https://github.com/qemu/qemu/commit/16256947eb30b3433839b536bd689be1d2bea5d8
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/tricore/helper.h
    M target/tricore/op_helper.c
    M target/tricore/translate.c

  Log Message:
  -----------
  target-tricore: Use clrsb helper

Tested-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Bastian Koppelmann <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3946c6aa3d402614140f2c6a044abcdfb439217a
      
https://github.com/qemu/qemu/commit/3946c6aa3d402614140f2c6a044abcdfb439217a
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target-xtensa: Use clrsb helper

Signed-off-by: Richard Henderson <address@hidden>


  Commit: a768e4e99247911f00c5c0267c12d4e207d5f6cc
      
https://github.com/qemu/qemu/commit/a768e4e99247911f00c5c0267c12d4e207d5f6cc
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg-runtime.c
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/ia64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/s390/tcg-target.h
    M tcg/sparc/tcg-target.h
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg-runtime.h
    M tcg/tcg.h
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Add opcode for ctpop

The number of actual invocations of ctpop itself does not warrent
an opcode, but it is very helpful for POWER7 to use in generating
an expansion for ctz.

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: de26a584d23b983f4db192a078827abe6dc894ac
      
https://github.com/qemu/qemu/commit/de26a584d23b983f4db192a078827abe6dc894ac
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/alpha/helper.h
    M target/alpha/int_helper.c
    M target/alpha/translate.c

  Log Message:
  -----------
  target-alpha: Use ctpop helper

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 79770002207ed0579c47c72cecf97c5d5915b185
      
https://github.com/qemu/qemu/commit/79770002207ed0579c47c72cecf97c5d5915b185
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate.c

  Log Message:
  -----------
  target-ppc: Use ctpop helper

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 250a87d5561a7212fe43357b084f69992eced75a
      
https://github.com/qemu/qemu/commit/250a87d5561a7212fe43357b084f69992eced75a
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/s390x/int_helper.c

  Log Message:
  -----------
  target-s390x: Avoid a loop for popcnt

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 08da3180dca8d41881b321d43944d97a838792fa
      
https://github.com/qemu/qemu/commit/08da3180dca8d41881b321d43944d97a838792fa
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/sparc/helper.c
    M target/sparc/helper.h
    M target/sparc/translate.c

  Log Message:
  -----------
  target-sparc: Use ctpop helper

Acked-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3253cddd21ab288fa94cb6c8b9ec9fe9a7fcb3e5
      
https://github.com/qemu/qemu/commit/3253cddd21ab288fa94cb6c8b9ec9fe9a7fcb3e5
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/tilegx/helper.c
    M target/tilegx/helper.h
    M target/tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Use ctpop helper

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 4885c3c49531995d67e54907d01d5aa1350faaaf
      
https://github.com/qemu/qemu/commit/4885c3c49531995d67e54907d01d5aa1350faaaf
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M target/i386/cc_helper.c
    M target/i386/cpu.h
    M target/i386/ops_sse.h
    M target/i386/ops_sse_header.h
    M target/i386/translate.c

  Log Message:
  -----------
  target-i386: Use ctpop helper

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7bdcecb7b2d79c292d1256f7d6cf0f1da50d381f
      
https://github.com/qemu/qemu/commit/7bdcecb7b2d79c292d1256f7d6cf0f1da50d381f
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M include/qemu/host-utils.h

  Log Message:
  -----------
  qemu/host-utils.h: Reduce the operation count in the fallback ctpop

Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c3f8962f320d58fcd28bd8722334f6221edf7738
      
https://github.com/qemu/qemu/commit/c3f8962f320d58fcd28bd8722334f6221edf7738
  Author: Alex Bennée <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tests/.gitignore
    M tests/Makefile.include
    A tests/test-bitcnt.c

  Log Message:
  -----------
  tests: New test-bitcnt

Add some unit tests for bit count functions (currently only ctpop). As
the routines are based on the Hackers Delight optimisations I based
the test patterns on their tests.

Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 14e99210f6c6cede461a54b2e0f9b4cd55175f00
      
https://github.com/qemu/qemu/commit/14e99210f6c6cede461a54b2e0f9b4cd55175f00
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Use ctpop to generate ctz if needed

Particularly when andc is also available, this is two insns
shorter than using clz to compute ctz.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 33e75fb9c8cc44165c8dad9093762ba728cc7596
      
https://github.com/qemu/qemu/commit/33e75fb9c8cc44165c8dad9093762ba728cc7596
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c

  Log Message:
  -----------
  tcg/ppc: Handle ctpop opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 993508e43e6d180e9ba9b747a9657eac69aec5bb
      
https://github.com/qemu/qemu/commit/993508e43e6d180e9ba9b747a9657eac69aec5bb
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-10 (Tue, 10 Jan 2017)

  Changed paths:
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c

  Log Message:
  -----------
  tcg/i386: Handle ctpop opcode

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0f2d17c1a59c9f11e7a874fb56fee3714b101705
      
https://github.com/qemu/qemu/commit/0f2d17c1a59c9f11e7a874fb56fee3714b101705
  Author: Peter Maydell <address@hidden>
  Date:   2017-01-12 (Thu, 12 Jan 2017)

  Changed paths:
    M disas/i386.c
    M disas/ppc.c
    M include/qemu/host-utils.h
    M target/alpha/helper.h
    M target/alpha/int_helper.c
    M target/alpha/translate.c
    M target/arm/helper-a64.c
    M target/arm/helper-a64.h
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/cris/helper.h
    M target/cris/op_helper.c
    M target/cris/translate.c
    M target/i386/cc_helper.c
    M target/i386/cpu.h
    M target/i386/helper.h
    M target/i386/int_helper.c
    M target/i386/ops_sse.h
    M target/i386/ops_sse_header.h
    M target/i386/translate.c
    M target/microblaze/helper.h
    M target/microblaze/op_helper.c
    M target/microblaze/translate.c
    M target/mips/helper.h
    M target/mips/op_helper.c
    M target/mips/translate.c
    M target/openrisc/helper.h
    M target/openrisc/int_helper.c
    M target/openrisc/translate.c
    M target/ppc/helper.h
    M target/ppc/int_helper.c
    M target/ppc/translate.c
    M target/s390x/helper.h
    M target/s390x/int_helper.c
    M target/s390x/translate.c
    M target/sparc/helper.c
    M target/sparc/helper.h
    M target/sparc/translate.c
    M target/tilegx/helper.c
    M target/tilegx/helper.h
    M target/tilegx/translate.c
    M target/tricore/helper.h
    M target/tricore/op_helper.c
    M target/tricore/translate.c
    M target/unicore32/helper.c
    M target/unicore32/helper.h
    M target/unicore32/translate.c
    M target/xtensa/helper.h
    M target/xtensa/op_helper.c
    M target/xtensa/translate.c
    M tcg-runtime.c
    M tcg/README
    M tcg/aarch64/tcg-target.h
    M tcg/aarch64/tcg-target.inc.c
    M tcg/arm/tcg-target.h
    M tcg/arm/tcg-target.inc.c
    M tcg/i386/tcg-target.h
    M tcg/i386/tcg-target.inc.c
    M tcg/ia64/tcg-target.h
    M tcg/ia64/tcg-target.inc.c
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c
    M tcg/optimize.c
    M tcg/ppc/tcg-target.h
    M tcg/ppc/tcg-target.inc.c
    M tcg/s390/tcg-target.h
    M tcg/s390/tcg-target.inc.c
    M tcg/sparc/tcg-target.h
    M tcg/sparc/tcg-target.inc.c
    M tcg/tcg-op.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg-runtime.h
    M tcg/tcg.c
    M tcg/tcg.h
    M tcg/tci/tcg-target.h
    M tcg/tci/tcg-target.inc.c
    M tests/.gitignore
    M tests/Makefile.include
    A tests/test-bitcnt.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170110' into staging

TCG opcodes for extract, clz, ctz, ctpop

# gpg: Signature made Wed 11 Jan 2017 02:12:41 GMT
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-tcg-20170110: (65 commits)
  tcg/i386: Handle ctpop opcode
  tcg/ppc: Handle ctpop opcode
  tcg: Use ctpop to generate ctz if needed
  tests: New test-bitcnt
  qemu/host-utils.h: Reduce the operation count in the fallback ctpop
  target-i386: Use ctpop helper
  target-tilegx: Use ctpop helper
  target-sparc: Use ctpop helper
  target-s390x: Avoid a loop for popcnt
  target-ppc: Use ctpop helper
  target-alpha: Use ctpop helper
  tcg: Add opcode for ctpop
  target-xtensa: Use clrsb helper
  target-tricore: Use clrsb helper
  target-arm: Use clrsb helper
  tcg: Add helpers for clrsb
  tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR
  tcg/i386: Handle ctz and clz opcodes
  tcg/i386: Allow bmi2 shiftx to have non-matching operands
  tcg/i386: Hoist common arguments in tcg_out_op
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/204febd17f9e...0f2d17c1a59c

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