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[Qemu-commits] [qemu/qemu] bb08af: tcg-mips: Move bswap code to a subrou

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] bb08af: tcg-mips: Move bswap code to a subroutine
Date: Tue, 10 Jan 2017 03:00:04 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: bb08afe9f0aee1a3f5c23508e2511b882ca31e1b
      
https://github.com/qemu/qemu/commit/bb08afe9f0aee1a3f5c23508e2511b882ca31e1b
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Move bswap code to a subroutine

Without the mips32r2 instructions to perform swapping, bswap is quite large,
dominating the size of each reverse-endian qemu_ld/qemu_st operation.

Create a subroutine in the prologue block.  The subroutine requires extra
reserved registers (TCG_TMP[2, 3]).  Using these within qemu_ld means that
we need not place additional restrictions on the qemu_ld outputs.

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 57a701fc2b34902310d4dbd1411088055616938a
      
https://github.com/qemu/qemu/commit/57a701fc2b34902310d4dbd1411088055616938a
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Add mips64 opcodes

Since the mips manual tables are in octal, reorg all of the opcodes
into that format for clarity.  Note that the 64-bit opcodes are as
yet unused.

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 0119b1927d531f3fac22b9b4da01dafc23644973
      
https://github.com/qemu/qemu/commit/0119b1927d531f3fac22b9b4da01dafc23644973
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Support 64-bit opcodes

Bulk patch adding 64-bit opcodes into tcg_out_op.  Note that
mips64 is as yet neither complete nor enabled.

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 7f54eaa3b78d71cb57e45a719980f9b5ff06d21c
      
https://github.com/qemu/qemu/commit/7f54eaa3b78d71cb57e45a719980f9b5ff06d21c
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Add bswap32u and bswap64

Without the mips32r2 instructions to perform swapping, bswap is quite large,
dominating the size of each reverse-endian qemu_ld/qemu_st operation.

Create two subroutines in the prologue block.  The subroutines require extra
reserved registers (TCG_TMP[2, 3]).  Using these within qemu_ld means that
we need not place additional restrictions on the qemu_ld outputs.

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 2294d05dab503d11664e73712c7f250fd0bf9e3b
      
https://github.com/qemu/qemu/commit/2294d05dab503d11664e73712c7f250fd0bf9e3b
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Adjust move functions for mips64

tcg_out_mov: using OPC_OR as most mips assemblers do;
tcg_out_movi: extended to 64-bit immediate.

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 32b69707df3365aadaad1d058044a7704397ec62
      
https://github.com/qemu/qemu/commit/32b69707df3365aadaad1d058044a7704397ec62
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Adjust load/store functions for mips64

tcg_out_ldst: using a generic ALIAS_PADD to avoid ifdefs
tcg_out_ld: generates LD or LW
tcg_out_st: generates SD or SW

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 0973b1cff8b66f3561befb1f467b2ab4d1a7d55a
      
https://github.com/qemu/qemu/commit/0973b1cff8b66f3561befb1f467b2ab4d1a7d55a
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Adjust prologue for mips64

Take stack frame parameters out from the function body.

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 98d690761a97da268fa279e544c86c88683a304f
      
https://github.com/qemu/qemu/commit/98d690761a97da268fa279e544c86c88683a304f
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Add tcg unwind info

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: 999b941633cabf2487d9bc77ce382b3fde3cd66d
      
https://github.com/qemu/qemu/commit/999b941633cabf2487d9bc77ce382b3fde3cd66d
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Adjust calling conventions for mips64

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: f0d703314ecb0415d51425727ed73ad2c6e3238a
      
https://github.com/qemu/qemu/commit/f0d703314ecb0415d51425727ed73ad2c6e3238a
  Author: Jin Guojie <address@hidden>
  Date:   2017-01-06 (Fri, 06 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg-mips: Adjust qemu_ld/st for mips64

Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>


  Commit: f68808c7494b38764e1895a9852b994638b86536
      
https://github.com/qemu/qemu/commit/f68808c7494b38764e1895a9852b994638b86536
  Author: Richard Henderson <address@hidden>
  Date:   2017-01-08 (Sun, 08 Jan 2017)

  Changed paths:
    M translate-all.c

  Log Message:
  -----------
  translate-all: Avoid -Werror=switch-bool

gcc 5.3.0 diagnoses

translate-all.c: In function ‘alloc_code_gen_buffer’:
translate-all.c:756:17: error: switch condition has boolean value
   switch (buf2 != MAP_FAILED) {
           ^

Signed-off-by: Richard Henderson <address@hidden>


  Commit: f634151b02ce5c80605383894f1f63f2c12e0033
      
https://github.com/qemu/qemu/commit/f634151b02ce5c80605383894f1f63f2c12e0033
  Author: Peter Maydell <address@hidden>
  Date:   2017-01-09 (Mon, 09 Jan 2017)

  Changed paths:
    M tcg/mips/tcg-target.h
    M tcg/mips/tcg-target.inc.c
    M translate-all.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170108' into staging

TCG host support for mips64

# gpg: Signature made Sun 08 Jan 2017 17:52:17 GMT
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-tcg-20170108:
  translate-all: Avoid -Werror=switch-bool
  tcg-mips: Adjust qemu_ld/st for mips64
  tcg-mips: Adjust calling conventions for mips64
  tcg-mips: Add tcg unwind info
  tcg-mips: Adjust prologue for mips64
  tcg-mips: Adjust load/store functions for mips64
  tcg-mips: Adjust move functions for mips64
  tcg-mips: Add bswap32u and bswap64
  tcg-mips: Support 64-bit opcodes
  tcg-mips: Add mips64 opcodes
  tcg-mips: Move bswap code to a subroutine

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/77424a452abe...f634151b02ce
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