[Qemu-commits] [qemu/qemu] f58b39: virtio-mmio: format transport base address in BusC...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f58b39d2d5b6dea1a757e1dc7d67a44eac1c4f9c
      
https://github.com/qemu/qemu/commit/f58b39d2d5b6dea1a757e1dc7d67a44eac1c4f9c
  Author: Laszlo Ersek <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/virtio/virtio-mmio.c
    M include/hw/compat.h

  Log Message:
  -----------
  virtio-mmio: format transport base address in BusClass.get_dev_path

At the moment the following QEMU command line triggers an assertion
failure (minimal reproducer by Cole):

  qemu-system-aarch64 \
    -machine virt-2.6,accel=tcg \
    -nodefaults \
    -no-user-config \
    -nographic -monitor stdio \
    -device virtio-scsi-device,id=scsi0 \
    -device virtio-scsi-device,id=scsi1 \
    -drive file=foo.img,format=raw,if=none,id=d0 \
    -device scsi-hd,bus=scsi0.0,drive=d0 \
    -drive file=foo.img,format=raw,if=none,id=d1 \
    -device scsi-hd,bus=scsi1.0,drive=d1

  qemu-system-aarch64: migration/savevm.c:615:
  vmstate_register_with_alias_id:
  Assertion `!se->compat || se->instance_id == 0' failed.

The reason is that the vmstate sections for the two scsi-hd devices are
not uniquely identifiable by name.

The direct parent buses of the scsi-hd devices -- scsi0.0 and scsi1.0 --
support the BusClass.get_dev_path member function. scsibus_get_dev_path()
formats a device path prefix with the help of its topologically parent
bus, and then appends the chan:id:lun triplet to it. For both scsi-hd
devices, this triplet is 0:0:0.

(Here we use "device path" in the QEMU migration sense, for vmstate
section identification, not in the OFW or UEFI device path senses.)

The virtio-scsi HBA is plugged into the virtio-mmio bus (implemented by
the internal VirtIOMMIOProxy device). This bus class
(TYPE_VIRTIO_MMIO_BUS) inherits, as its get_dev_path() member function,
the virtio_bus_get_dev_path() method from its parent class
(TYPE_VIRTIO_BUS).

virtio_bus_get_dev_path() does not format any kind of device address on
its own; "virtio addresses" are transport-specific. Therefore
virtio_bus_get_dev_path() asks the topologically parent bus of the proxy
object (implementing the specific virtio transport) to format the address
of the proxy object.

(For virtio-pci devices (where the proxy is an instance of VirtIOPCIProxy,
plugged into a PCI bus), this ends up in pcibus_get_dev_path().)

However, VirtIOMMIOProxy is usually (in practice: always) plugged into
"main-system-bus", the singleton TYPE_SYSTEM_BUS object. This BusClass
does not support formatting QEMU vmstate device paths at all (as
SysBusDevice objects can have zero or more IO ports and zero or more MMIO
regions). Hence the formatting request delegated from
virtio_bus_get_dev_path() gets answered with NULL.

The end result is that the two scsi-hd devices end up with the same device
path "0:0:0", which triggers the assert.

We can solve this by recognizing that virtio-mmio transports are
distinguished from each other by their base addresses in MMIO address
space. Implement virtio_mmio_bus_get_dev_path() as follows:

(1) The virtio device whose devpath is to be formatted resides on a
    virtio-mmio bus that is implemented by a VirtIOMMIOProxy object. Ask
    the parent bus of VirtIOMMIOProxy to format the device path of
    VirtIOMMIOProxy, as a path prefix. (This is identical to what
    virtio_bus_get_dev_path() does.)

(2) Append the base address of VirtIOMMIOProxy to the device path, such
    as:
    - address@hidden,
    - address@hidden

Given that these device paths are placed in the migration stream, step (2)
above, if done unconditionally, would break migration. So make that step
conditional on a new VirtIOMMIOProxy property, which is enabled for 2.7
machine types and later.

Cc: "Michael S. Tsirkin" <address@hidden>
Cc: Cole Robinson <address@hidden>
Cc: Dr. David Alan Gilbert <address@hidden>
Cc: Kevin Zhao <address@hidden>
Cc: Peter Maydell <address@hidden>
Cc: Tom Hanson <address@hidden>
Reported-by: Kevin Zhao <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Signed-off-by: Laszlo Ersek <address@hidden>
Message-id: address@hidden
Fixes: https://bugs.launchpad.net/qemu/+bug/1594239
Signed-off-by: Laszlo Ersek <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 56215da394e9b784d425bc27cb826baf16c18b0d
      
https://github.com/qemu/qemu/commit/56215da394e9b784d425bc27cb826baf16c18b0d
  Author: Dmitry Osipenko <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/core/ptimer.c

  Log Message:
  -----------
  Revert "hw/ptimer: Perform counter wrap around if timer already expired"

Software should see timer counter wraparound only after IRQ being triggered.
This fixes regression introduced by the commit 5a50307 ("hw/ptimer: Perform
counter wrap around if timer already expired"), resulting in monotonic timer
jumping backwards on SPARC emulated machine running NetBSD guest OS, as
reported by Mark Cave-Ayland.

Signed-off-by: Dmitry Osipenko <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 7069532e3b944c25707d4f69998e68a739eabff9
      
https://github.com/qemu/qemu/commit/7069532e3b944c25707d4f69998e68a739eabff9
  Author: Vijay <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M util/cutils.c

  Log Message:
  -----------
  target-arm: Use Neon for zero checking

Use Neon instructions to perform zero checking of
buffer. This is helps in reducing total migration time.

Use case: Idle VM live migration with 4 VCPUS and 8GB ram
running CentOS 7.

Without Neon, the Total migration time is 3.5 Sec

Migration status: completed
total time: 3560 milliseconds
downtime: 33 milliseconds
setup: 5 milliseconds
transferred ram: 297907 kbytes
throughput: 685.76 mbps
remaining ram: 0 kbytes
total ram: 8519872 kbytes
duplicate: 2062760 pages
skipped: 0 pages
normal: 69808 pages
normal bytes: 279232 kbytes
dirty sync count: 3

With Neon, the total migration time is 2.9 Sec

Migration status: completed
total time: 2960 milliseconds
downtime: 65 milliseconds
setup: 4 milliseconds
transferred ram: 299869 kbytes
throughput: 830.19 mbps
remaining ram: 0 kbytes
total ram: 8519872 kbytes
duplicate: 2064313 pages
skipped: 0 pages
normal: 70294 pages
normal bytes: 281176 kbytes
dirty sync count: 3

Signed-off-by: Vijaya Kumar K <address@hidden>
Signed-off-by: Suresh <address@hidden>
Acked-by: Paolo Bonzini <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c8efd802c40ed7f06eeebd4c8f7ff558424d7225
      
https://github.com/qemu/qemu/commit/c8efd802c40ed7f06eeebd4c8f7ff558424d7225
  Author: Andrew Jones <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M include/hw/intc/arm_gic.h
    M include/hw/intc/arm_gicv3_common.h

  Log Message:
  -----------
  gic: provide defines for v2/v3 targetlist sizes

Signed-off-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 95eb49c8a302f8adf5e360bca026af1c5ef21716
      
https://github.com/qemu/qemu/commit/95eb49c8a302f8adf5e360bca026af1c5ef21716
  Author: Andrew Jones <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: tcg: adjust MPIDR like KVM

KVM adjusts the MPIDR of guest vcpus based on the architecture of
the host, 32-bit vs. 64-bit, and, for 64-bit, also on the type of
GIC the guest is using. To be consistent and improve SGI efficiency
we make the same adjustments for TCG as 64-bit KVM hosts. We neglect
to add consistency with 32-bit KVM hosts, as that would reduce SGI
efficiency and KVM is expected to change.

As MPIDR is a system register, and thus guest visible, we only make
adjustments for current and later versioned machines.

Signed-off-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 541ef8c2e73fb99d173b125bef7c262fdd2fe33c
      
https://github.com/qemu/qemu/commit/541ef8c2e73fb99d173b125bef7c262fdd2fe33c
  Author: Sergey Sorokin <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Add missed AArch32 TLBI sytem registers

Some PL2 related TLBI system registers are missed in AArch32
implementation. The patch fixes it.

Signed-off-by: Sergey Sorokin <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: fe8477052831a78ba9de37d008bd81550bc8cf25
      
https://github.com/qemu/qemu/commit/fe8477052831a78ba9de37d008bd81550bc8cf25
  Author: Marcin Krzeminski <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/block/m25p80.c

  Log Message:
  -----------
  m25p80: Fix QIOR/DIOR handling for Winbond

Winbond also support continuous read mode, but as an opposite for other
flash type read mode clock cycles are included to dummy cycles number.
This path add proper handling of read mode byte and update needed
dummy cycles. QPI mode and dummy cycles configuration are not supported.

Signed-off-by: Marcin Krzeminski <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2ddfa2817b7f2be4f7ef0fd4806e06aaced9e6ac
      
https://github.com/qemu/qemu/commit/2ddfa2817b7f2be4f7ef0fd4806e06aaced9e6ac
  Author: Cédric Le Goater <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/misc/aspeed_scu.c

  Log Message:
  -----------
  hw/misc: fix typo in Aspeed SCU hw-strap2 property name

Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 97c2ed5dbdda978e29618f356f11caa99a7df601
      
https://github.com/qemu/qemu/commit/97c2ed5dbdda978e29618f356f11caa99a7df601
  Author: Cédric Le Goater <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/ssi/aspeed_smc.c

  Log Message:
  -----------
  ast2400: replace aspeed_smc_is_implemented()

aspeed_smc_is_implemented() filters invalid registers in a peculiar
way. Let's remove it and open code the if conditions. It serves the
same purpose, the aesthetic is better, and new registers can easily be
added.

Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2e1f05020b80677f66b14277b7b1e8d4bb175640
      
https://github.com/qemu/qemu/commit/2e1f05020b80677f66b14277b7b1e8d4bb175640
  Author: Cédric Le Goater <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/ssi/aspeed_smc.c

  Log Message:
  -----------
  ast2400: pretend DMAs are done for U-boot

U-boot does SPI timing calibration using DMA tranfers. To let the
initialization continue, we fake success by setting the DMA status of
the Interrupt Control Register.

For the moment, DMA support is not required as it is not used in
normal operation.

Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 79a9f323a80b802ca98895d1c2d4aaf23cff815a
      
https://github.com/qemu/qemu/commit/79a9f323a80b802ca98895d1c2d4aaf23cff815a
  Author: Cédric Le Goater <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/arm/ast2400.c
    M hw/misc/aspeed_scu.c
    M include/hw/misc/aspeed_scu.h

  Log Message:
  -----------
  ast2400: externalize revision numbers

AST2400_A0_SILICON_REV is defined twice. Fix this by including the
definition in the header file as well as the routine to check if a
silicon revision is supported. It will useful to reuse in other
controllers.

Let's add also AST2500_A0_SILICON_REV for future use.

Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 14c7d99333e4a474c65bdae6f99aa8837e8078e6
      
https://github.com/qemu/qemu/commit/14c7d99333e4a474c65bdae6f99aa8837e8078e6
  Author: Peter Maydell <address@hidden>
  Date:   2016-07-14 (Thu, 14 Jul 2016)

  Changed paths:
    M hw/arm/ast2400.c
    M hw/arm/virt.c
    M hw/block/m25p80.c
    M hw/core/ptimer.c
    M hw/misc/aspeed_scu.c
    M hw/ssi/aspeed_smc.c
    M hw/virtio/virtio-mmio.c
    M include/hw/compat.h
    M include/hw/intc/arm_gic.h
    M include/hw/intc/arm_gicv3_common.h
    M include/hw/misc/aspeed_scu.h
    M target-arm/helper.c
    M util/cutils.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160714' 
into staging

target-arm queue:
 * add virtio-mmio transport base address to device path
   (avoid an assertion failure with multiple virtio-scsi-devices)
 * revert hw/ptimer commit 5a50307 which causes regressions on
   SPARC guests
 * use Neon to accelerate zero-page checking on AArch64 hosts
 * set the MPIDR for TCG to match how KVM does it (and fit with
   GICv2/GICv3 restrictions on SGI target lists)
 * add some missing AArch32 TLBI hypervisor TLB operations
 * m25p80: Fix QIOR/DIOR handling for Winbond
 * hw/misc: fix typo in Aspeed SCU hw-strap2 property name
 * ast2400: pretend DMAs are done for U-boot
 * ast2400: some minor code cleanups

# gpg: Signature made Thu 14 Jul 2016 17:21:30 BST
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20160714:
  ast2400: externalize revision numbers
  ast2400: pretend DMAs are done for U-boot
  ast2400: replace aspeed_smc_is_implemented()
  hw/misc: fix typo in Aspeed SCU hw-strap2 property name
  m25p80: Fix QIOR/DIOR handling for Winbond
  target-arm: Add missed AArch32 TLBI sytem registers
  hw/arm/virt: tcg: adjust MPIDR like KVM
  gic: provide defines for v2/v3 targetlist sizes
  target-arm: Use Neon for zero checking
  Revert "hw/ptimer: Perform counter wrap around if timer already expired"
  virtio-mmio: format transport base address in BusClass.get_dev_path

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/1c8e93fb41c1...14c7d99333e4