[Qemu-commits] [qemu/qemu] af39bc: softfloat: Implement run-time-configurable meaning...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: af39bc8c49224771ec0d38f1b693ea78e221d7bc
      
https://github.com/qemu/qemu/commit/af39bc8c49224771ec0d38f1b693ea78e221d7bc
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M fpu/softfloat-specialize.h
    M fpu/softfloat.c
    M include/fpu/softfloat.h
    M target-arm/helper-a64.c
    M target-arm/helper.c
    M target-m68k/helper.c
    M target-microblaze/op_helper.c
    M target-mips/cpu.h
    M target-mips/helper.h
    M target-mips/msa_helper.c
    M target-mips/op_helper.c
    M target-mips/translate.c
    M target-mips/translate_init.c
    M target-ppc/fpu_helper.c
    M target-s390x/fpu_helper.c
    M target-s390x/helper.h
    M target-s390x/translate.c
    M target-sh4/cpu.c
    M target-unicore32/cpu.c

  Log Message:
  -----------
  softfloat: Implement run-time-configurable meaning of signaling NaN bit

This patch modifies SoftFloat library so that it can be configured in
run-time in relation to the meaning of signaling NaN bit, while, at the
same time, strictly preserving its behavior on all existing platforms.

Background:

In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floating-point
numerical values to be NaNs (which stands for "not a number"). For additional
reasons, virtually all modern floating-point unit implementations use two
kinds of NaNs: quiet and signaling. The binary representations of these two
kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally,
the first bit of mantissa).

Up to 2008, standards for floating-point did not specify all details about
binary representation of NaNs. More specifically, the meaning of the bit
that is used for distinguishing between signaling and quiet NaNs was not
strictly prescribed. (IEEE 754-2008 was the first floating-point standard
that defined that meaning clearly, see [1], p. 35) As a result, different
platforms took different approaches, and that presented considerable
challenge for multi-platform emulators like QEMU.

Mips platform represents the most complex case among QEMU-supported
platforms regarding signaling NaN bit. Up to the Release 6 of Mips
architecture, "1" in signaling NaN bit denoted signaling NaN, which is
opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture
adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of
that, Mips architecture for SIMD (also known as MSA, or vector instructions)
also specifies signaling bit in accordance to IEEE standard. MSA unit can be
implemented with both pre-Release 6 and Release 6 main processor units.

QEMU uses SoftFloat library to implement various floating-point-related
instructions on all platforms. The current QEMU implementation allows for
defining meaning of signaling NaN bit during build time, and is implemented
via preprocessor macro called SNAN_BIT_IS_ONE.

On the other hand, the change in this patch enables SoftFloat library to be
configured in run-time. This configuration is meant to occur during CPU
initialization, at the moment when it is definitely known what desired
behavior for particular CPU (or any additional FPUs) is.

The change is implemented so that it is consistent with existing
implementation of similar cases. This means that structure float_status is
used for passing the information about desired signaling NaN bit on each
invocation of SoftFloat functions. The additional field in float_status is
called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE.

IMPORTANT:

This change is not meant to create any change in emulator behavior or
functionality on any platform. It just provides the means for SoftFloat
library to be used in a more flexible way - in other words, it will just
prepare SoftFloat library for usage related to Mips platform and its
specifics regarding signaling bit meaning, which is done in some of
subsequent patches from this series.

Further break down of changes:

  1) Added field snan_bit_is_one to the structure float_status, and
     correspondent setter function set_snan_bit_is_one().

  2) Constants <float16|float32|float64|floatx80|float128>_default_nan
     (used both internally and externally) converted to functions
     <float16|float32|float64|floatx80|float128>_default_nan(float_status*).
     This is necessary since they are dependent on signaling bit meaning.
     At the same time, for the sake of code cleanup and simplicity, constants
     <floatx80|float128>_default_nan_<low|high> (used only internally within
     SoftFloat library) are removed, as not needed.

  3) Added a float_status* argument to SoftFloat library functions
     XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_),
     XXX_maybe_silence_nan(XXX a_). This argument must be present in
     order to enable correct invocation of new version of functions
     XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128>
     here)

  4) Updated code for all platforms to reflect changes in SoftFloat library.
     This change is twofolds: it includes modifications of SoftFloat library
     functions invocations, and an addition of invocation of function
     set_snan_bit_is_one() during CPU initialization, with arguments that
     are appropriate for each particular platform. It was established that
     all platforms zero their main CPU data structures, so snan_bit_is_one(0)
     in appropriate places is not added, as it is not needed.

[1] "IEEE Standard for Floating-Point Arithmetic",
    IEEE Computer Society, August 29, 2008.

Signed-off-by: Thomas Schwinge <address@hidden>
Signed-off-by: Maciej W. Rozycki <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Tested-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Tested-by: Leon Alrae <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
address@hidden:
 * cherry-picked 2 chunks from patch #2 to fix compilation warnings]
Signed-off-by: Leon Alrae <address@hidden>


  Commit: a59eaea64686c8966b7653303660f8c26f285c77
      
https://github.com/qemu/qemu/commit/a59eaea64686c8966b7653303660f8c26f285c77
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M fpu/softfloat-specialize.h

  Log Message:
  -----------
  softfloat: Clean code format in fpu/softfloat-specialize.h

fpu/softfloat-specialize.h is the most critical file in SoftFloat
library, since it handles numerous differences between platforms in
relation to floating point arithmetics. This patch makes the code
in this file more consistent format-wise, and hopefully easier to
debug and maintain.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: a7c04d545a97126c9df9d96623747d8613aaf7db
      
https://github.com/qemu/qemu/commit/a7c04d545a97126c9df9d96623747d8613aaf7db
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M fpu/softfloat-specialize.h

  Log Message:
  -----------
  softfloat: For Mips only, correct default NaN values

Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct default NaN values (in their 16-, 32-, and 64-bit flavors).

For more info, see [1], page 84, Table 6.3 "Value Supplied When a New
Quiet NaN Is Created", and [2], page 52, Table 3.7 "Default NaN
Encodings".

[1] "MIPS Architecture For Programmers Volume II-A:
    The MIPS64 Instruction Set Reference Manual",
    Imagination Technologies LTD, Revision 6.04, November 13, 2015

[2] "MIPS Architecture for Programmers Volume IV-j:
    The MIPS32 SIMD Architecture Module",
    Imagination Technologies LTD, Revision 1.12, February 3, 2016

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: c27644f0e9659471e1c9355da5b667960d311937
      
https://github.com/qemu/qemu/commit/c27644f0e9659471e1c9355da5b667960d311937
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M fpu/softfloat-specialize.h

  Log Message:
  -----------
  softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd()

Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct the order of argument comparisons in pickNaNMulAdd().

For more info, see [1], page 53, section "3.5.3 NaN Propagation".

[1] "MIPS Architecture for Programmers Volume IV-j:
    The MIPS32 SIMD Architecture Module",
    Imagination Technologies LTD, Revision 1.12, February 3, 2016

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
address@hidden:
 * reworded the subject of the patch
 * swapped if/else code blocks to match the commit description]
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 52d4c8ee93cc599fecf817d403f125f4c7c036c6
      
https://github.com/qemu/qemu/commit/52d4c8ee93cc599fecf817d403f125f4c7c036c6
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M include/elf.h

  Log Message:
  -----------
  linux-user: Update preprocessor constants for Mips-specific e_flags bits

Missing values EF_MIPS_FP64 and EF_MIPS_NAN2008 added.

Signed-off-by: Thomas Schwinge <address@hidden>
Signed-off-by: Maciej W. Rozycki <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 40bd6dd456e61a36e454fb9dd2cc739b67c224cf
      
https://github.com/qemu/qemu/commit/40bd6dd456e61a36e454fb9dd2cc739b67c224cf
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M target-mips/translate_init.c

  Log Message:
  -----------
  target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA

Function msa_reset() is updated so that flag snan_bit_is_one is
properly set to 0.

By applying this patch, a number of incorrect MSA behaviors that
require IEEE 754-2008 compliance will be fixed. Those are behaviors
that (up to the moment of applying this patch) did not get the desired
functionality from SoftFloat library with respect to distinguishing
between quiet and signaling NaN, getting default NaN values (both
quiet and signaling), establishing if a floating point number is NaN
or not, etc.

Two examples:

* FMAX, FMIN will now correctly detect and propagate NaNs.
* FCLASS.D ans FCLASS.S will now correcty detect NaN flavors.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 6be77480052b1a71557081896e7080363a8a2f95
      
https://github.com/qemu/qemu/commit/6be77480052b1a71557081896e7080363a8a2f95
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M target-mips/translate.c

  Log Message:
  -----------
  target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D>

Updated handling of instructions <ABS|NEG>.<S|D>. Note that legacy
(pre-abs2008) ABS and NEG instructions are arithmetic (and, therefore,
any NaN operand causes signaling invalid operation), while abs2008
ones are non-arithmetic, always and only changing the sign bit, even
for NaN-like operands. Details on these instructions are documented
in [1] p. 35 and 359.

Implementation-wise, abs2008 versions are implemented without helpers,
for simplicity and performance sake.

[1] "MIPS Architecture For Programmers Volume II-A:
    The MIPS64 Instruction Set Reference Manual",
    Imagination Technologies LTD, Revision 6.04, November 13, 2015

Signed-off-by: Thomas Schwinge <address@hidden>
Signed-off-by: Maciej W. Rozycki <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 87552089b62fa229d2ff86906e4e779177fb5835
      
https://github.com/qemu/qemu/commit/87552089b62fa229d2ff86906e4e779177fb5835
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M target-mips/helper.h
    M target-mips/op_helper.c
    M target-mips/translate.c

  Log Message:
  -----------
  target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>

New set of helpers for handling nan2008-syle versions of instructions
<CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>, for Mips R6.

All involved instructions have float operand and integer result. Their
core functionality is implemented via invocations of appropriate SoftFloat
functions. The problematic cases are when the operand is a NaN, and also
when the operand (float) is out of the range of the result.

Here one can distinguish three cases:

CASE MIPS-A: (FCR31.NAN2008 == 1)

   1. Operand is a NaN, result should be 0;
   2. Operand is larger than INT_MAX, result should be INT_MAX;
   3. Operand is smaller than INT_MIN, result should be INT_MIN.

CASE MIPS-B: (FCR31.NAN2008 == 0)

   1. Operand is a NaN, result should be INT_MAX;
   2. Operand is larger than INT_MAX, result should be INT_MAX;
   3. Operand is smaller than INT_MIN, result should be INT_MAX.

CASE SoftFloat:

   1. Operand is a NaN, result is INT_MAX;
   2. Operand is larger than INT_MAX, result is INT_MAX;
   3. Operand is smaller than INT_MIN, result is INT_MIN.

Current implementation of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>
implements case MIPS-B. This patch relates to case MIPS-A. For case
MIPS-A, only return value for NaN-operands should be corrected after
appropriate SoftFloat library function is called.

Related MSA instructions FTRUNC_S and FTINT_S already handle well
all cases, in the fashion similar to the code from this patch.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
address@hidden:
 * removed a statement from the description which caused slight confusion]
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 599bc5e89c46f95f86ccad0d747d041c89a28806
      
https://github.com/qemu/qemu/commit/599bc5e89c46f95f86ccad0d747d041c89a28806
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M linux-user/main.c
    M target-mips/cpu.h
    M target-mips/gdbstub.c
    M target-mips/op_helper.c
    M target-mips/translate.c
    M target-mips/translate_init.c

  Log Message:
  -----------
  target-mips: Implement FCR31's R/W bitmask and related functionalities

This patch implements read and write access rules for Mips floating
point control and status register (FCR31). The change can be divided
into following parts:

- Add fields that will keep FCR31's R/W bitmask in procesor
  definitions and processor float_status structure.

- Add appropriate value for FCR31's R/W bitmask for each supported
  processor.

- Add function for setting snan_bit_is_one, and integrate it in
  appropriate places.

- Modify handling of CTC1 (case 31) instruction to use FCR31's R/W
  bitmask.

- Modify handling user mode executables for Mips, in relation to the
  bit EF_MIPS_NAN2008 from ELF header, that is in turn related to
  reading and writing to FCR31.

- Modify gdb behavior in relation to FCR31.

Signed-off-by: Thomas Schwinge <address@hidden>
Signed-off-by: Maciej W. Rozycki <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 77be419980114d75605811e1681115d0919cfa1a
      
https://github.com/qemu/qemu/commit/77be419980114d75605811e1681115d0919cfa1a
  Author: Aleksandar Markovic <address@hidden>
  Date:   2016-06-24 (Fri, 24 Jun 2016)

  Changed paths:
    M target-mips/cpu.h

  Log Message:
  -----------
  target-mips: Add FCR31's FS bit definition

Add preprocessor definition of FCR31's FS bit, and update related
code for setting this bit.

Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>


  Commit: 4b86bac21c15cd04cf333423c8c256e4dc4dc925
      
https://github.com/qemu/qemu/commit/4b86bac21c15cd04cf333423c8c256e4dc4dc925
  Author: Peter Maydell <address@hidden>
  Date:   2016-06-27 (Mon, 27 Jun 2016)

  Changed paths:
    M fpu/softfloat-specialize.h
    M fpu/softfloat.c
    M include/elf.h
    M include/fpu/softfloat.h
    M linux-user/main.c
    M target-arm/helper-a64.c
    M target-arm/helper.c
    M target-m68k/helper.c
    M target-microblaze/op_helper.c
    M target-mips/cpu.h
    M target-mips/gdbstub.c
    M target-mips/helper.h
    M target-mips/msa_helper.c
    M target-mips/op_helper.c
    M target-mips/translate.c
    M target-mips/translate_init.c
    M target-ppc/fpu_helper.c
    M target-s390x/fpu_helper.c
    M target-s390x/helper.h
    M target-s390x/translate.c
    M target-sh4/cpu.c
    M target-unicore32/cpu.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160624' into staging

MIPS patches 2016-06-24

Changes:
* support IEEE 754-2008 in MIPS CPUs

# gpg: Signature made Fri 24 Jun 2016 16:09:38 BST
# gpg:                using RSA key 0x52118E3C0B29DA6B
# gpg: Good signature from "Leon Alrae <address@hidden>"
# Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4  4FC0 5211 8E3C 0B29 DA6B

* remotes/lalrae/tags/mips-20160624:
  target-mips: Add FCR31's FS bit definition
  target-mips: Implement FCR31's R/W bitmask and related functionalities
  target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>
  target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D>
  target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA
  linux-user: Update preprocessor constants for Mips-specific e_flags bits
  softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd()
  softfloat: For Mips only, correct default NaN values
  softfloat: Clean code format in fpu/softfloat-specialize.h
  softfloat: Implement run-time-configurable meaning of signaling NaN bit

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/929bf947f7cc...4b86bac21c15