[Qemu-commits] [qemu/qemu] b53b0f: vfio: Enable sparse mmap capability

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: b53b0f696b10828f6393155f44a352c019e673fd
      
https://github.com/qemu/qemu/commit/b53b0f696b10828f6393155f44a352c019e673fd
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/common.c
    M trace-events

  Log Message:
  -----------
  vfio: Enable sparse mmap capability

The sparse mmap capability in a vfio region info allows vfio to tell
us which sub-areas of a region may be mmap'd.  Thus rather than
assuming a single mmap covers the entire region and later frobbing it
ourselves for things like the PCI MSI-X vector table, we can read that
directly from vfio.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: e61a424f0573634a1bc180de965b2cb794c1038e
      
https://github.com/qemu/qemu/commit/e61a424f0573634a1bc180de965b2cb794c1038e
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/common.c
    M include/hw/vfio/vfio-common.h
    M trace-events

  Log Message:
  -----------
  vfio: Create device specific region info helper

Given a device specific region type and sub-type, find it.  Also
cleanup return point on error in vfio_get_region_info() so that we
always return 0 with a valid pointer or -errno and NULL.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: 4225f2b67089ab2dc6c0af24a9648a421f2cdb51
      
https://github.com/qemu/qemu/commit/4225f2b67089ab2dc6c0af24a9648a421f2cdb51
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/pci.c

  Log Message:
  -----------
  vfio/pci: Fix return of vfio_populate_vga()

This function returns success if either we setup the VGA region or
the host vfio doesn't return enough regions to support the VGA index.
This latter case doesn't make any sense.  If we're asked to populate
VGA, fail if it doesn't exist and let the caller decide if that's
important.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: 182bca4592a8a6a57cdbd6889683cced78e85a03
      
https://github.com/qemu/qemu/commit/182bca4592a8a6a57cdbd6889683cced78e85a03
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/pci.c

  Log Message:
  -----------
  vfio/pci: Consolidate VGA setup

Combine VGA discovery and registration.  Quirks can have dependencies
on BARs, so the quirks push out until after we've scanned the BARs.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: 581406e0e349be99b6c08a7a1b492af5951f9a4e
      
https://github.com/qemu/qemu/commit/581406e0e349be99b6c08a7a1b492af5951f9a4e
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/pci.c

  Log Message:
  -----------
  vfio/pci: Setup BAR quirks after capabilities probing

Capability probing modifies wmask, which quirks may be interested in
changing themselves.  Apply our BAR quirks after the capability scan
to make this possible.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: c4c45e943e519f5ac220f7af1afb2a0025d03c54
      
https://github.com/qemu/qemu/commit/c4c45e943e519f5ac220f7af1afb2a0025d03c54
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/pci-quirks.c
    M hw/vfio/pci.c
    M hw/vfio/pci.h
    M trace-events

  Log Message:
  -----------
  vfio/pci: Intel graphics legacy mode assignment

Enable quirks to support SandyBridge and newer IGD devices as primary
VM graphics.  This requires new vfio-pci device specific regions added
in kernel v4.6 to expose the IGD OpRegion, the shadow ROM, and config
space access to the PCI host bridge and LPC/ISA bridge.  VM firmware
support, SeaBIOS only so far, is also required for reserving memory
regions for IGD specific use.  In order to enable this mode, IGD must
be assigned to the VM at PCI bus address 00:02.0, it must have a ROM,
it must be able to enable VGA, it must have or be able to create on
its own an LPC/ISA bridge of the proper type at PCI bus address
00:1f.0 (sorry, not compatible with Q35 yet), and it must have the
above noted vfio-pci kernel features and BIOS.  The intention is that
to enable this mode, a user simply needs to assign 00:02.0 from the
host to 00:02.0 in the VM:

  -device vfio-pci,host=0000:00:02.0,bus=pci.0,addr=02.0

and everything either happens automatically or it doesn't.  In the
case that it doesn't, we leave error reports, but assume the device
will operate in universal passthrough mode (UPT), which doesn't
require any of this, but has a much more narrow window of supported
devices, supported use cases, and supported guest drivers.

When using IGD in this mode, the VM firmware is required to reserve
some VM RAM for the OpRegion (on the order or several 4k pages) and
stolen memory for the GTT (up to 8MB for the latest GPUs).  An
additional option, x-igd-gms allows the user to specify some amount
of additional memory (value is number of 32MB chunks up to 512MB) that
is pre-allocated for graphics use.  TBH, I don't know of anything that
requires this or makes use of this memory, which is why we don't
allocate any by default, but the specification suggests this is not
actually a valid combination, so the option exists as a workaround.
Please report if it's actually necessary in some environment.

See code comments for further discussion about the actual operation
of the quirks necessary to assign these devices.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: 6ced0bba70ff557792b781ad35366de03bcd105b
      
https://github.com/qemu/qemu/commit/6ced0bba70ff557792b781ad35366de03bcd105b
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/pci-quirks.c
    M hw/vfio/pci.c
    M hw/vfio/pci.h

  Log Message:
  -----------
  vfio/pci: Add a separate option for IGD OpRegion support

The IGD OpRegion is enabled automatically when running in legacy mode,
but it can sometimes be useful in universal passthrough mode as well.
Without an OpRegion, output spigots don't work, and even though Intel
doesn't officially support physical outputs in UPT mode, it's a
useful feature.  Note that if an OpRegion is enabled but a monitor is
not connected, some graphics features will be disabled in the guest
versus a headless system without an OpRegion, where they would work.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: 0eb734241762bc63bf8308bed3573431f195ddcf
      
https://github.com/qemu/qemu/commit/0eb734241762bc63bf8308bed3573431f195ddcf
  Author: Alex Williamson <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    A docs/igd-assign.txt

  Log Message:
  -----------
  vfio/pci: Add IGD documentation

Document the usage modes, host primary graphics considerations, usage,
and fw_cfg ABI required for IGD assignment with vfio.

Signed-off-by: Alex Williamson <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Tested-by: Gerd Hoffmann <address@hidden>


  Commit: 7a057b4fb9dec2baf975d1737a7258602e793c40
      
https://github.com/qemu/qemu/commit/7a057b4fb9dec2baf975d1737a7258602e793c40
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/common.c

  Log Message:
  -----------
  vfio: Fix 128 bit handling when deleting region

7532d3cbf "vfio: Fix 128 bit handling" added support for 64bit IOMMU
memory regions when those are added to VFIO address space; however
removing code cannot cope with these as int128_get64() will fail on
1<<64.

This copies 128bit handling from region_add() to region_del().

Since the only machine type which is actually going to use 64bit IOMMU
is pseries and it never really removes them (instead it will dynamically
add/remove subregions), this should cause no behavioral change.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>


  Commit: d78c19b5cf4821d0c198f4132a085bdbf19dda4c
      
https://github.com/qemu/qemu/commit/d78c19b5cf4821d0c198f4132a085bdbf19dda4c
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/ppc/spapr_iommu.c
    M hw/vfio/common.c
    M include/hw/vfio/vfio-common.h

  Log Message:
  -----------
  memory: Fix IOMMU replay base address

Since a788f227 "memory: Allow replay of IOMMU mapping notifications"
when new VFIO listener is added, all existing IOMMU mappings are
replayed. However there is a problem that the base address of
an IOMMU memory region (IOMMU MR) is ignored which is not a problem
for the existing user (which is pseries) with its default 32bit DMA
window starting at 0 but it is if there is another DMA window.

This stores the IOMMU's offset_within_address_space and adjusts
the IOVA before calling vfio_dma_map/vfio_dma_unmap.

As the IOMMU notifier expects IOVA offset rather than the absolute
address, this also adjusts IOVA in sPAPR H_PUT_TCE handler before
calling notifier(s).

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>


  Commit: f1f9365019bb257af087b454972c396bb0d53b26
      
https://github.com/qemu/qemu/commit/f1f9365019bb257af087b454972c396bb0d53b26
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    M hw/vfio/common.c

  Log Message:
  -----------
  vfio: Check that IOMMU MR translates to system address space

At the moment IOMMU MR only translate to the system memory.
However if some new code changes this, we will need clear indication why
it is not working so here is the check.

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>


  Commit: 84cfc756d158a061bd462473d42b0a9f072218de
      
https://github.com/qemu/qemu/commit/84cfc756d158a061bd462473d42b0a9f072218de
  Author: Peter Maydell <address@hidden>
  Date:   2016-05-26 (Thu, 26 May 2016)

  Changed paths:
    A docs/igd-assign.txt
    M hw/ppc/spapr_iommu.c
    M hw/vfio/common.c
    M hw/vfio/pci-quirks.c
    M hw/vfio/pci.c
    M hw/vfio/pci.h
    M include/hw/vfio/vfio-common.h
    M trace-events

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20160526.1' 
into staging

VFIO updates 2016-05-26

 - Infrastructure and quirks to support IGD assignment (Alex Williamson)
 - Fixes to 128bit handling, IOMMU replay, IOMMU translation sanity
   checking (Alexey Kardashevskiy)

# gpg: Signature made Thu 26 May 2016 18:50:29 BST using RSA key ID 3BB08B22
# gpg: Good signature from "Alex Williamson <address@hidden>"
# gpg:                 aka "Alex Williamson <address@hidden>"
# gpg:                 aka "Alex Williamson <address@hidden>"
# gpg:                 aka "Alex Williamson <address@hidden>"

* remotes/awilliam/tags/vfio-update-20160526.1:
  vfio: Check that IOMMU MR translates to system address space
  memory: Fix IOMMU replay base address
  vfio: Fix 128 bit handling when deleting region
  vfio/pci: Add IGD documentation
  vfio/pci: Add a separate option for IGD OpRegion support
  vfio/pci: Intel graphics legacy mode assignment
  vfio/pci: Setup BAR quirks after capabilities probing
  vfio/pci: Consolidate VGA setup
  vfio/pci: Fix return of vfio_populate_vga()
  vfio: Create device specific region info helper
  vfio: Enable sparse mmap capability

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/aef11b8d33ff...84cfc756d158