[Qemu-commits] [qemu/qemu] 5c87c4: blizzard: Remove support for DEPTH !=

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[Qemu-commits] [qemu/qemu] 5c87c4: blizzard: Remove support for DEPTH !=

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 5c87c4: blizzard: Remove support for DEPTH != 32
Date:	Thu, 12 May 2016 09:00:06 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 5c87c4089afed982d5bc40cddbbef72c38d0389a
      
https://github.com/qemu/qemu/commit/5c87c4089afed982d5bc40cddbbef72c38d0389a
  Author: Pooja Dhannawat <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/display/blizzard.c
    M hw/display/blizzard_template.h

  Log Message:
  -----------
  blizzard: Remove support for DEPTH != 32

Removing support for DEPTH != 32 from blizzard template header
and file that includes it, as macro DEPTH == 32 only used.

Reviewed-by: Eric Blake <address@hidden>
Signed-off-by: Pooja Dhannawat <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ea644cf3431297cf6ce1c7562ec5aa221149d856
      
https://github.com/qemu/qemu/commit/ea644cf3431297cf6ce1c7562ec5aa221149d856
  Author: Pooja Dhannawat <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/display/omap_lcd_template.h
    M hw/display/omap_lcdc.c

  Log Message:
  -----------
  omap_lcdc: Remove support for DEPTH != 32

surface_bits_per_pixel() always returns 32
so, removing other dead code which is
based on DEPTH !== 32

Signed-off-by: Pooja Dhannawat <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b46818e9e7f1edcc32bd69cc5671cbda6cfdc7a1
      
https://github.com/qemu/qemu/commit/b46818e9e7f1edcc32bd69cc5671cbda6cfdc7a1
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/etraxfs_pic.c

  Log Message:
  -----------
  hw/intc: QOM'ify etraxfs_pic.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Tested-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d3d5a6febd989c08a432a49046b9172df6ede834
      
https://github.com/qemu/qemu/commit/d3d5a6febd989c08a432a49046b9172df6ede834
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/exynos4210_combiner.c

  Log Message:
  -----------
  hw/intc: QOM'ify exynos4210_combiner.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 68d71616c055471e59eb07b1140dcb04b25b63f9
      
https://github.com/qemu/qemu/commit/68d71616c055471e59eb07b1140dcb04b25b63f9
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/exynos4210_gic.c

  Log Message:
  -----------
  hw/intc: QOM'ify exynos4210_gic.c

* Drop the old SysBus init function and use instance_init
* Split the exynos4210_irq_gate_init into an instance_init
  and a DeviceClass::realize function

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f777bda60f3fb5779562e51b7969b81a9bd51f34
      
https://github.com/qemu/qemu/commit/f777bda60f3fb5779562e51b7969b81a9bd51f34
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/imx_avic.c

  Log Message:
  -----------
  hw/intc: QOM'ify imx_avic.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e3be8b4f4fcbe98b0cbd5aa6de8727af4af76dba
      
https://github.com/qemu/qemu/commit/e3be8b4f4fcbe98b0cbd5aa6de8727af4af76dba
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/pl190.c

  Log Message:
  -----------
  hw/intc: QOM'ify pl190.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c09008d2d30e99a0a32aff0fc6b453467e62a7de
      
https://github.com/qemu/qemu/commit/c09008d2d30e99a0a32aff0fc6b453467e62a7de
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/slavio_intctl.c

  Log Message:
  -----------
  hw/intc: QOM'ify slavio_intctl.c

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 22c70d8a6aeb654460d9cda27e6d33ecc35c3833
      
https://github.com/qemu/qemu/commit/22c70d8a6aeb654460d9cda27e6d33ecc35c3833
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/grlib_irqmp.c

  Log Message:
  -----------
  hw/intc: QOM'ify grlib_irqmp.c

* Split the old SysBus init into an instance_init and a
  DeviceClass::realize function
* Drop the old SysBus init function

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[PMM: corrected "can not" to "cannot" in error message]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0a750e2a787b78ea49d2570cdf342c64ee79933d
      
https://github.com/qemu/qemu/commit/0a750e2a787b78ea49d2570cdf342c64ee79933d
  Author: xiaoqiang zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/intc/omap_intc.c

  Log Message:
  -----------
  hw/intc: QOM'ify omap_intc.c

* Split the old SysBus init into an instance_init and a
  DeviceClass::realize function
* Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 27a5dc7be6a55b60039e39206eed2734ea166a47
      
https://github.com/qemu/qemu/commit/27a5dc7be6a55b60039e39206eed2734ea166a47
  Author: Sylvain Garrigues <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/misc/bcm2835_property.c

  Log Message:
  -----------
  bcm2835_property: use cached values when querying framebuffer

As the framebuffer settings are copied into the result message before it is
reconfigured, inconsistent behavior can happen when, for instance, you set with
a single message the width, height, and depth, and ask at the same time to
allocate the buffer and get the pitch and the size.

In this case, the reported pitch and size would be incorrect as they were
computed with the initial values of width, height and depth, not the ones the
client requested.

Signed-off-by: Sylvain Garrigues <address@hidden>
Reviewed-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
[PMM: folded a couple of long lines]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0b062eb090517a66f3e9b4b1ddf2e740e9517102
      
https://github.com/qemu/qemu/commit/0b062eb090517a66f3e9b4b1ddf2e740e9517102
  Author: Zhou Jie <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/nseries.c

  Log Message:
  -----------
  hw/arm/nseries: Allocating Large sized arrays to heap

n8x0_init has a huge stack usage of 65536 bytes approx.
Moving large arrays to heap to reduce stack usage.

Signed-off-by: Zhou Jie <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dfda68377e20943f474505e75238cb96bc6874bf
      
https://github.com/qemu/qemu/commit/dfda68377e20943f474505e75238cb96bc6874bf
  Author: Sergey Sorokin <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Stage 2 permission fault was fixed in AArch32 state

As described in AArch32.CheckS2Permission an instruction fetch fails if
XN bit is set or there is no read permission for the address.

Signed-off-by: Sergey Sorokin <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dddb5223413c5425ae6eaeb3b967627efc9675f7
      
https://github.com/qemu/qemu/commit/dddb5223413c5425ae6eaeb3b967627efc9675f7
  Author: Sergey Sorokin <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Fix descriptor address masking in ARM address translation

There is a bug in ARM address translation regime with a long-descriptor
format. On the descriptor reading its address is formed from an index
which is a part of the input address. And on the first iteration this index
is incorrectly masked with 'grainsize' mask. But it can be wider according
to pseudo-code.
On the other hand on the iterations other than first the descriptor address
is formed from the previous level descriptor by masking with 'descaddrmask'
value. It always clears just 12 lower bits, but it must clear 'grainsize'
lower bits instead according to pseudo-code.
The patch fixes both cases.

Signed-off-by: Sergey Sorokin <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 1d41478fd428e01f057d3248292e4cdcdb048523
      
https://github.com/qemu/qemu/commit/1d41478fd428e01f057d3248292e4cdcdb048523
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Add tcg_set_insn_param

Add tcg_set_insn_param as a mechanism to modify an insn
parameter after emiting the insn. This is useful for icount
and also for embedding fault information for a specific insn.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 25caa94c4a26daaab1e65c6d887e2972aeb5749e
      
https://github.com/qemu/qemu/commit/25caa94c4a26daaab1e65c6d887e2972aeb5749e
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M include/exec/gen-icount.h

  Log Message:
  -----------
  gen-icount: Use tcg_set_insn_param

Use tcg_set_insn_param() instead of directly accessing internal
tcg data structures to update an insn param.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 094d028a7968236cd2b7f7b96394f7a3b8ad97c8
      
https://github.com/qemu/qemu/commit/094d028a7968236cd2b7f7b96394f7a3b8ad97c8
  Author: Peter Maydell <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/internals.h
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Split data abort syndrome generator

Split the data abort syndrome generator into two versions:
One with a valid Instruction Specific Syndrome (ISS) and another without.

The following new flags are supported by the syndrome generator
with ISS:
* isv - Instruction syndrome valid
* sas - Syndrome access size
* sse - Syndrome sign extend
* srt - Syndrome register transfer
* sf  - Sixty-Four bit register width
* ar  - Acquire/Release

These flags are not yet used, so this patch has no functional change
except that we will now correctly set the IL bit in data abort
syndromes without ISS information.

Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden>
[PMM: squashed in with patch which was just adding the IL bit]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 026a19c3128678d4fe301fc36e8ffacdc9ecccb8
      
https://github.com/qemu/qemu/commit/026a19c3128678d4fe301fc36e8ffacdc9ecccb8
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9

Use extract32 instead of open coding the bit masking when decoding
is_signed and is_extended. This streamlines the decoding with some
of the other ldst variants.

No functional change.

Reviewed-by: Sergey Fedorov <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: cd694521ca061a5d0436d5df4ec8c17c8f4dfcdb
      
https://github.com/qemu/qemu/commit/cd694521ca061a5d0436d5df4ec8c17c8f4dfcdb
  Author: Edgar E. Iglesias <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm/translate-a64.c: Unify some of the ldst_reg decoding

The various load/store variants under disas_ldst_reg can all reuse the
same decoding for opc, size, rt and is_vector.

This patch unifies the decoding in preparation for generating
instruction syndromes for data aborts.
This will allow us to reduce the number of places to hook in updates
to the load/store state needed to generate the insn syndromes.

No functional change.

Reviewed-by: Sergey Fedorov <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3c09d6caad07b141291a3dd1630b1043aecef3ff
      
https://github.com/qemu/qemu/commit/3c09d6caad07b141291a3dd1630b1043aecef3ff
  Author: xiaoqiang zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/display/exynos4210_fimd.c

  Log Message:
  -----------
  hw/display: QOM'ify exynos4210_fimd.c

* Drop the old SysBus init function and use instance_init
* Move graphic_console_init into realize stage

Signed-off-by: xiaoqiang zhao <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9695200ad807d49be2f2e6f8dec818a382a1396e
      
https://github.com/qemu/qemu/commit/9695200ad807d49be2f2e6f8dec818a382a1396e
  Author: Shannon Zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/boot.c
    M hw/arm/virt.c

  Log Message:
  -----------
  ARM: Virt: Set numa-node-id for cpu and memory nodes

Generate memory nodes according to NUMA topology. Set numa-node-id
property for cpu and memory nodes.

Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e6e400d54f092e3aeb17889120640bd24cda2ce1
      
https://github.com/qemu/qemu/commit/e6e400d54f092e3aeb17889120640bd24cda2ce1
  Author: Shannon Zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/i386/acpi-build.c
    M include/hw/acpi/acpi-defs.h

  Log Message:
  -----------
  ACPI: Add GICC Affinity Structure

Cc: Michael S. Tsirkin <address@hidden>
Cc: Igor Mammedov <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ea9fcbd7d0835c397c4a21939401a9b3e923ae90
      
https://github.com/qemu/qemu/commit/ea9fcbd7d0835c397c4a21939401a9b3e923ae90
  Author: Shannon Zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/i386/acpi-build.c
    M include/hw/acpi/acpi-defs.h

  Log Message:
  -----------
  ACPI: Fix the definition of proximity in AcpiSratMemoryAffinity

ACPI spec says that Proximity Domain is an "Integer that represents
the proximity domain to which the processor belongs". So define it as a
uint32_t.

Cc: Michael S. Tsirkin <address@hidden>
Cc: Igor Mammedov <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 64b831367b902884e57cf33b77f9a7e64d1c7f90
      
https://github.com/qemu/qemu/commit/64b831367b902884e57cf33b77f9a7e64d1c7f90
  Author: Shannon Zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/acpi/aml-build.c
    M hw/i386/acpi-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  ACPI: move acpi_build_srat_memory to common place

Move acpi_build_srat_memory to common place so that it could be reused
by ARM. Rename it to build_srat_memory.

Cc: Michael S. Tsirkin <address@hidden>
Cc: Igor Mammedov <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2b302e1e3cfe6a1d71679e8c229c9d5bbe1a33df
      
https://github.com/qemu/qemu/commit/2b302e1e3cfe6a1d71679e8c229c9d5bbe1a33df
  Author: Shannon Zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  ACPI: Virt: Generate SRAT table

To support NUMA, it needs to generate SRAT ACPI table.

Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 825482adde1f971cbddf27e15fb4453ab3fae994
      
https://github.com/qemu/qemu/commit/825482adde1f971cbddf27e15fb4453ab3fae994
  Author: Jean-Christophe DUBOIS <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/Makefile.objs
    A target-arm/arm-powerctl.c
    A target-arm/arm-powerctl.h
    M target-arm/psci.c

  Log Message:
  -----------
  ARM: Factor out ARM on/off PSCI control functions

Split ARM on/off function from PSCI support code.

This will allow to reuse these functions in other code.

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 1983057470e719d83ed4bc0fd48e480bfaf09d8a
      
https://github.com/qemu/qemu/commit/1983057470e719d83ed4bc0fd48e480bfaf09d8a
  Author: Jean-Christophe DUBOIS <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/misc/Makefile.objs
    A hw/misc/imx6_src.c
    A include/hw/misc/imx6_src.h

  Log Message:
  -----------
  i.MX: Add i.MX6 System Reset Controller device.

This controller is also present in i.MX5X devices but they are not
yet emulated by QEMU.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 53374b16a28b204e7ee73639156f0b3a45cf01c0
      
https://github.com/qemu/qemu/commit/53374b16a28b204e7ee73639156f0b3a45cf01c0
  Author: Jean-Christophe DUBOIS <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    A include/qemu/fifo32.h

  Log Message:
  -----------
  FIFO: Add a FIFO32 implementation

This one is build on top of the existing FIFO8

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c906a3a01582219b40a6b075ed28d4dd6f53d462
      
https://github.com/qemu/qemu/commit/c906a3a01582219b40a6b075ed28d4dd6f53d462
  Author: Jean-Christophe DUBOIS <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/ssi/Makefile.objs
    A hw/ssi/imx_spi.c
    A include/hw/ssi/imx_spi.h

  Log Message:
  -----------
  i.MX: Add the Freescale SPI Controller

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ec46eaa83a3c8c5677adc2ce0f956a7ab9948844
      
https://github.com/qemu/qemu/commit/ec46eaa83a3c8c5677adc2ce0f956a7ab9948844
  Author: Jean-Christophe DUBOIS <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M hw/arm/Makefile.objs
    A hw/arm/fsl-imx6.c
    A include/hw/arm/fsl-imx6.h

  Log Message:
  -----------
  i.MX: Add i.MX6 SOC implementation.

For now we only support the following devices:
* up to 4 Cortex A9 cores
* A9 MPCORE (SCU, GIC, TWD)
* 5 i.MX UARTs
* 2 EPIT timers
* 1 GPT timer
* 3 I2C controllers
* 7 GPIO controllers
* 6 SDHC controllers
* 5 SPI controllers
* 1 CCM device
* 1 SRC device
* various ROM/RAM areas.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3a0f31bcb825d37e145411c62b11c3704279de4e
      
https://github.com/qemu/qemu/commit/3a0f31bcb825d37e145411c62b11c3704279de4e
  Author: Jean-Christophe DUBOIS <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/Makefile.objs
    A hw/arm/sabrelite.c

  Log Message:
  -----------
  i.MX: Add sabrelite i.MX6 emulation.

The sabrelite supports one SPI FLASH memory on SPI1

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5c8759087d9cdd12c937a704ea8225f2e4c00ba6
      
https://github.com/qemu/qemu/commit/5c8759087d9cdd12c937a704ea8225f2e4c00ba6
  Author: Peter Maydell <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/display/blizzard_template.h

  Log Message:
  -----------
  hw/display/blizzard: Expand out macros

Now that we can assume that only depth 32 is possible, there's no need
for the COPY_PIXEL1 and PIXEL_TYPE macros, and the SKIP_PIXEL, COPY_PIXEL
and SWAP_WORDS macros aren't used at all. Expand out COPY_PIXEL1 and
PIXEL_TYPE where they are used, delete the unused macro definitions, and
expand out the uses of glue(name_prefix, DEPTH).

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Message-id: address@hidden


  Commit: 4274d821ff586b7691a151dacd93a42e344915bb
      
https://github.com/qemu/qemu/commit/4274d821ff586b7691a151dacd93a42e344915bb
  Author: Peter Maydell <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/display/blizzard.c
    R hw/display/blizzard_template.h

  Log Message:
  -----------
  hw/display/blizzard: Remove blizzard_template.h

We no longer need to do the "multiply include this header" trick with
blizzard_template.h, and it is only used in a single .c file, so just
put its contents inline in blizzard.c.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Gerd Hoffmann <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Message-id: address@hidden


  Commit: 6459b94c26dd666badb3547fef1456992a08e60b
      
https://github.com/qemu/qemu/commit/6459b94c26dd666badb3547fef1456992a08e60b
  Author: Peter Maydell <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes

The TCR_EL2 and TCR_EL3 regdefs were incorrectly using the
vmsa_tcr_el1_write function for writes. Since these registers don't
have the A1 bit that TCR_EL1 does, we don't need to do a tlb_flush()
when they are written. Remove the unnecessary .writefn and also the
harmless but unneeded .raw_writefn and .resetfn definitions.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: 3f5ab2549065229bd165d0db66b71512385dbd7a
      
https://github.com/qemu/qemu/commit/3f5ab2549065229bd165d0db66b71512385dbd7a
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/armv7m.c

  Log Message:
  -----------
  hw/arm: QOM'ify armv7m.c

Drop the use of old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ff7a27c15ae152e4ee7cc15a03c256ab913145e7
      
https://github.com/qemu/qemu/commit/ff7a27c15ae152e4ee7cc15a03c256ab913145e7
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/highbank.c

  Log Message:
  -----------
  hw/arm: QOM'ify highbank.c

Drop the use of old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a1f42e0c9abc1028a8bb8686dbb3749fcd2d18e8
      
https://github.com/qemu/qemu/commit/a1f42e0c9abc1028a8bb8686dbb3749fcd2d18e8
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/integratorcp.c

  Log Message:
  -----------
  hw/arm: QOM'ify integratorcp.c

* Drop the use of old SysBus init function and use instance_init
* Remove the empty 'icp_pic_class_init' from Typeinfo

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 16fb31a382a195e9f2f9315829bba2f31631ff17
      
https://github.com/qemu/qemu/commit/16fb31a382a195e9f2f9315829bba2f31631ff17
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/pxa2xx.c

  Log Message:
  -----------
  hw/arm: QOM'ify pxa2xx.c

Drop the use of old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 08ba3fde1dcb8d52d0fbcec1985a549fd53690aa
      
https://github.com/qemu/qemu/commit/08ba3fde1dcb8d52d0fbcec1985a549fd53690aa
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/pxa2xx_pic.c

  Log Message:
  -----------
  hw/arm: QOM'ify pxa2xx_pic.c

Remove the empty 'pxa2xx_pic_initfn' and it's
setup code in the 'pxa2xx_pic_class_init'

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f68575c956324692b2703b0fdb3a697047bdcdde
      
https://github.com/qemu/qemu/commit/f68575c956324692b2703b0fdb3a697047bdcdde
  Author: xiaoqiang zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/spitz.c

  Log Message:
  -----------
  hw/arm: QOM'ify spitz.c

Drop the use of old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 15c4fff5d89de7ce353fe5f2a3fdb6a052f5941f
      
https://github.com/qemu/qemu/commit/15c4fff5d89de7ce353fe5f2a3fdb6a052f5941f
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/stellaris.c

  Log Message:
  -----------
  hw/arm: QOM'ify stellaris.c

* Drop the use of old SysBus init function and use instance_init
* Use DeviceClass::vmsd instead of 'vmstate_register' function

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5a67508c7acfaf8811352594f4c3b1952d32d837
      
https://github.com/qemu/qemu/commit/5a67508c7acfaf8811352594f4c3b1952d32d837
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/strongarm.c

  Log Message:
  -----------
  hw/arm: QOM'ify strongarm.c

Drop the use of old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0bc91ab3bb70f836d5a7a3ef6f800ef8c22e936f
      
https://github.com/qemu/qemu/commit/0bc91ab3bb70f836d5a7a3ef6f800ef8c22e936f
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M hw/arm/versatilepb.c

  Log Message:
  -----------
  hw/arm: QOM'ify versatilepb.c

Drop the use of old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e4f70d635863cfc3e3fa7d9a6e37b569ae94d82f
      
https://github.com/qemu/qemu/commit/e4f70d635863cfc3e3fa7d9a6e37b569ae94d82f
  Author: Peter Maydell <address@hidden>
  Date:   2016-05-12 (Thu, 12 May 2016)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M hw/acpi/aml-build.c
    M hw/arm/Makefile.objs
    M hw/arm/armv7m.c
    M hw/arm/boot.c
    A hw/arm/fsl-imx6.c
    M hw/arm/highbank.c
    M hw/arm/integratorcp.c
    M hw/arm/nseries.c
    M hw/arm/pxa2xx.c
    M hw/arm/pxa2xx_pic.c
    A hw/arm/sabrelite.c
    M hw/arm/spitz.c
    M hw/arm/stellaris.c
    M hw/arm/strongarm.c
    M hw/arm/versatilepb.c
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M hw/display/blizzard.c
    R hw/display/blizzard_template.h
    M hw/display/exynos4210_fimd.c
    M hw/display/omap_lcd_template.h
    M hw/display/omap_lcdc.c
    M hw/i386/acpi-build.c
    M hw/intc/etraxfs_pic.c
    M hw/intc/exynos4210_combiner.c
    M hw/intc/exynos4210_gic.c
    M hw/intc/grlib_irqmp.c
    M hw/intc/imx_avic.c
    M hw/intc/omap_intc.c
    M hw/intc/pl190.c
    M hw/intc/slavio_intctl.c
    M hw/misc/Makefile.objs
    M hw/misc/bcm2835_property.c
    A hw/misc/imx6_src.c
    M hw/ssi/Makefile.objs
    A hw/ssi/imx_spi.c
    M include/exec/gen-icount.h
    M include/hw/acpi/acpi-defs.h
    M include/hw/acpi/aml-build.h
    A include/hw/arm/fsl-imx6.h
    A include/hw/misc/imx6_src.h
    A include/hw/ssi/imx_spi.h
    A include/qemu/fifo32.h
    M target-arm/Makefile.objs
    A target-arm/arm-powerctl.c
    A target-arm/arm-powerctl.h
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/op_helper.c
    M target-arm/psci.c
    M target-arm/translate-a64.c
    M tcg/tcg.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160512' 
into staging

target-arm queue:
 * blizzard, omap_lcdc: code cleanup to remove DEPTH != 32 dead code
 * QOMify various ARM devices
 * bcm2835_property: use cached values when querying framebuffer
 * hw/arm/nseries: don't allocate large sized array on the stack
 * fix LPAE descriptor address masking (only visible for EL2)
 * fix stage 2 exec permission handling for AArch32
 * first part of supporting syndrome info for data aborts to EL2
 * virt: NUMA support
 * work towards i.MX6 support
 * avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes

# gpg: Signature made Thu 12 May 2016 14:29:14 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20160512: (43 commits)
  hw/arm: QOM'ify versatilepb.c
  hw/arm: QOM'ify strongarm.c
  hw/arm: QOM'ify stellaris.c
  hw/arm: QOM'ify spitz.c
  hw/arm: QOM'ify pxa2xx_pic.c
  hw/arm: QOM'ify pxa2xx.c
  hw/arm: QOM'ify integratorcp.c
  hw/arm: QOM'ify highbank.c
  hw/arm: QOM'ify armv7m.c
  target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes
  hw/display/blizzard: Remove blizzard_template.h
  hw/display/blizzard: Expand out macros
  i.MX: Add sabrelite i.MX6 emulation.
  i.MX: Add i.MX6 SOC implementation.
  i.MX: Add the Freescale SPI Controller
  FIFO: Add a FIFO32 implementation
  i.MX: Add i.MX6 System Reset Controller device.
  ARM: Factor out ARM on/off PSCI control functions
  ACPI: Virt: Generate SRAT table
  ACPI: move acpi_build_srat_memory to common place
  ...

Signed-off-by: Peter Maydell <address@hidden>


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