[Qemu-commits] [qemu/qemu] f09f9b: loader: Fix incorrect parameter name

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[Qemu-commits] [qemu/qemu] f09f9b: loader: Fix incorrect parameter name

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] f09f9b: loader: Fix incorrect parameter name in load_image...
Date:	Wed, 16 Mar 2016 11:30:08 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f09f9bd9fa7ccfc1f2b1e88dd35141b1b118ecb7
      
https://github.com/qemu/qemu/commit/f09f9bd9fa7ccfc1f2b1e88dd35141b1b118ecb7
  Author: Jens Wiklander <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M include/hw/loader.h

  Log Message:
  -----------
  loader: Fix incorrect parameter name in load_image_mr() macro

Fix a typo in the load_image_mr() macro: 'mr' was written when
the parameter name is '_mr'. (This had no visible effects since
the single use of the macro used 'mr' as the argument.)

Fixes 76151cacfe956248a25b38b5e8429465584f47bb "loader: Add
load_image_mr() to load ROM image to a MemoryRegion"

Signed-off-by: Jens Wiklander <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 8bfd0550be821cf27d71444e2af350de3c3d2ee3
      
https://github.com/qemu/qemu/commit/8bfd0550be821cf27d71444e2af350de3c3d2ee3
  Author: Peter Maydell <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M target-arm/helper.h
    M target-arm/op_helper.c
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Implement MRS (banked) and MSR (banked) instructions

Starting with the ARMv7 Virtualization Extensions, the A32 and T32
instruction sets provide instructions "MSR (banked)" and "MRS
(banked)" which can be used to access registers for a mode other
than the current one:
 * R<m>_<mode>
 * ELR_hyp
 * SPSR_<mode>

Implement the missing instructions.

Signed-off-by: Peter Maydell <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden


  Commit: 1b4093ea6678ff79d3006db3d3abbf6990b4a59b
      
https://github.com/qemu/qemu/commit/1b4093ea6678ff79d3006db3d3abbf6990b4a59b
  Author: Sergey Sorokin <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Fix translation level on early translation faults

Qemu reports translation fault on 1st level instead of 0th level in case of
AArch64 address translation if the translation table walk is disabled or
the address is in the gap between the two regions.

Signed-off-by: Sergey Sorokin <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ed796373b4880bc4d5cef1bfb7e362f12e944958
      
https://github.com/qemu/qemu/commit/ed796373b4880bc4d5cef1bfb7e362f12e944958
  Author: Wei Huang <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  arm: virt: Add an abstract ARM virt machine type

In preparation for future ARM virt machine types, this patch creates
an abstract type for all ARM machines. The current machine type in
QEMU (i.e. "virt") is renamed to "virt-2.6", whose naming scheme is
similar to other architectures. For the purpose of backward compatibility,
"virt" is converted to an alias, pointing to "virt-2.6". With this patch,
"qemu -M ?" lists the following virtual machine types along with others:

virt                 QEMU 2.6 ARM Virtual Machine (alias of virt-2.6)
virt-2.6             QEMU 2.6 ARM Virtual Machine

Signed-off-by: Wei Huang <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9c94d8e6c9a31a74f18168ca8d74c3e3f7c0e40e
      
https://github.com/qemu/qemu/commit/9c94d8e6c9a31a74f18168ca8d74c3e3f7c0e40e
  Author: Wei Huang <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  arm: virt: Move machine class init code to the abstract machine type

This patch moves the common class initialization code from
"virt-2.6" to the new abstract class. An empty property is added to
"virt-2.6" machine. In the meanwhile, related funtions are renamed
to "virt_2_6_*" for consistency.

Signed-off-by: Wei Huang <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4833e15f7487440243377250d7d76b96ba4c210c
      
https://github.com/qemu/qemu/commit/4833e15f7487440243377250d7d76b96ba4c210c
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/timer/imx_gpt.c

  Log Message:
  -----------
  i.MX: Allow GPT timer to rollover.

GPT timer need to rollover when it reaches 0xffffffff.

It also need to reset to 0 when in "restart mode" and crossing the
compare 1 register.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c91a5883c31fa0f0b57aef24904b63d05b8673c8
      
https://github.com/qemu/qemu/commit/c91a5883c31fa0f0b57aef24904b63d05b8673c8
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/misc/imx25_ccm.c
    M hw/misc/imx31_ccm.c
    M hw/timer/imx_epit.c
    M hw/timer/imx_gpt.c
    M include/hw/misc/imx_ccm.h

  Log Message:
  -----------
  i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency.

This way all CCM clock defines/enums are named CLK_XXX

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f4b2add6ccc66c983258a04ded9e8e9d6ec2a731
      
https://github.com/qemu/qemu/commit/f4b2add6ccc66c983258a04ded9e8e9d6ec2a731
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/misc/imx25_ccm.c
    M hw/misc/imx31_ccm.c
    M include/hw/misc/imx_ccm.h

  Log Message:
  -----------
  i.MX: Remove CCM useless clock computation handling.

Most clocks supported by the CCM are useless to the qemu framework.

Only clocks related to timers (EPIT, GPT, PWM, WATCHDOG, ...) are usefull
to QEMU code.

Therefore this patch removes clock computation handling for all clocks but:
* CLK_NONE,
* CLK_IPG,
* CLK_32k

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d552f675fb313eb020c384c03307ecfb83dce1ad
      
https://github.com/qemu/qemu/commit/d552f675fb313eb020c384c03307ecfb83dce1ad
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/misc/imx25_ccm.c
    M hw/misc/imx31_ccm.c
    M hw/timer/imx_epit.c
    M hw/timer/imx_gpt.c
    M include/hw/misc/imx_ccm.h

  Log Message:
  -----------
  i.MX: Add the CLK_IPG_HIGH clock

EPIT, GPT and other i.MX timers are using "abstract" clocks among which
a CLK_IPG_HIGH clock.

On i.MX25 and i.MX31 CLK_IPG and CLK_IPG_HIGH are mapped to the same clock
but on other SOC like i.MX6 they are mapped to distinct clocks.

This patch add the CLK_IPG_HIGH to prepare for SOC where these 2 clocks are
different.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a66d815cd558193182b09fb23211f7ebf88d0661
      
https://github.com/qemu/qemu/commit/a66d815cd558193182b09fb23211f7ebf88d0661
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/misc/Makefile.objs
    A hw/misc/imx6_ccm.c
    A include/hw/misc/imx6_ccm.h

  Log Message:
  -----------
  i.MX: Add i.MX6 CCM and ANALOG device.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: eccfa35e9f295277dc7adad11894645ebe576dcf
      
https://github.com/qemu/qemu/commit/eccfa35e9f295277dc7adad11894645ebe576dcf
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/fsl-imx25.c
    M hw/arm/fsl-imx31.c
    M hw/i2c/imx_i2c.c
    M hw/net/imx_fec.c

  Log Message:
  -----------
  i.MX: Add missing descriptions in devices.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c04bd47db6b95afa72528c9d3fb03b979dd7d426
      
https://github.com/qemu/qemu/commit/c04bd47db6b95afa72528c9d3fb03b979dd7d426
  Author: Andrew Jeffery <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M hw/timer/Makefile.objs
    A hw/timer/aspeed_timer.c
    A include/hw/timer/aspeed_timer.h
    M trace-events

  Log Message:
  -----------
  hw/timer: Add ASPEED timer device model

Implement basic ASPEED timer functionality for the AST2400 SoC[1]: Up to
8 timers can independently be configured, enabled, reset and disabled.
Some hardware features are not implemented, namely clock value matching
and pulse generation, but the implementation is enough to boot the Linux
kernel configured with aspeed_defconfig.

[1] http://www.aspeedtech.com/products.php?fPath=20&rId=376

Signed-off-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0c69996e22e22b85d2e2cdb98e7be5dd83ec5113
      
https://github.com/qemu/qemu/commit/0c69996e22e22b85d2e2cdb98e7be5dd83ec5113
  Author: Andrew Jeffery <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/intc/Makefile.objs
    A hw/intc/aspeed_vic.c
    A include/hw/intc/aspeed_vic.h
    M trace-events

  Log Message:
  -----------
  hw/intc: Add (new) ASPEED VIC device model

Implement a basic ASPEED VIC device model for the AST2400 SoC[1], with
enough functionality to boot an aspeed_defconfig Linux kernel. The model
implements the 'new' (revised) register set: While the hardware exposes
both the new and legacy register sets, accesses to the model's legacy
register set will not be serviced (however the access will be logged).

[1] http://www.aspeedtech.com/products.php?fPath=20&rId=376

Signed-off-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 43e3346e43f005500f1d2e44318bf8b28f0ba086
      
https://github.com/qemu/qemu/commit/43e3346e43f005500f1d2e44318bf8b28f0ba086
  Author: Andrew Jeffery <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/Makefile.objs
    A hw/arm/ast2400.c
    A include/hw/arm/ast2400.h

  Log Message:
  -----------
  hw/arm: Add ASPEED AST2400 SoC model

While the ASPEED AST2400 SoC[1] has a broad range of capabilities this
implementation is minimal, comprising an ARM926 processor, ASPEED VIC
and timer devices, and a 8250 UART.

[1] http://www.aspeedtech.com/products.php?fPath=20&rId=376

Signed-off-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 327d8e4ed28e2b9ce548ebea013d96567251ad2d
      
https://github.com/qemu/qemu/commit/327d8e4ed28e2b9ce548ebea013d96567251ad2d
  Author: Andrew Jeffery <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/Makefile.objs
    A hw/arm/palmetto-bmc.c

  Log Message:
  -----------
  hw/arm: Add palmetto-bmc machine

The new machine is a thin layer over the AST2400 ARM926-based SoC[1].
Between the minimal machine and the current SoC implementation there is
enough functionality to boot an aspeed_defconfig Linux kernel to
userspace. Nothing yet is specific to the Palmetto's BMC (other than
using an AST2400 SoC), but creating specific machine types is preferable
to a generic machine that doesn't match any particular hardware.

[1] http://www.aspeedtech.com/products.php?fPath=20&rId=376

Signed-off-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a2a8dfa8d830bf8482fdabcefdc9005189c9ecdb
      
https://github.com/qemu/qemu/commit/a2a8dfa8d830bf8482fdabcefdc9005189c9ecdb
  Author: Andrew Baumann <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/bcm2835_peripherals.c

  Log Message:
  -----------
  bcm2835_peripherals: enable sdhci pending-insert quirk for raspberry pi

Signed-off-by: Andrew Baumann <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 97398d900caaccbf1b6cc53a80581b69687757e7
      
https://github.com/qemu/qemu/commit/97398d900caaccbf1b6cc53a80581b69687757e7
  Author: Andrew Baumann <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/bcm2835_peripherals.c
    M hw/char/Makefile.objs
    A hw/char/bcm2835_aux.c
    M include/hw/arm/bcm2835_peripherals.h
    A include/hw/char/bcm2835_aux.h

  Log Message:
  -----------
  bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block

At present only the core UART functions (data path for tx/rx) are
implemented, which is enough for UEFI to boot. The following
features/registers are unimplemented:
  * Line/modem control
  * Scratch register
  * Extra control
  * Baudrate
  * SPI interfaces

Signed-off-by: Andrew Baumann <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5e9c2a8dac19d5df0c541ea23df654062de917c0
      
https://github.com/qemu/qemu/commit/5e9c2a8dac19d5df0c541ea23df654062de917c0
  Author: Grégory ESTRADE <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/bcm2835_peripherals.c
    M hw/arm/bcm2836.c
    M hw/arm/raspi.c
    M hw/display/Makefile.objs
    A hw/display/bcm2835_fb.c
    M include/hw/arm/bcm2835_peripherals.h
    A include/hw/display/bcm2835_fb.h

  Log Message:
  -----------
  bcm2835_fb: add framebuffer device for Raspberry Pi

The framebuffer occupies the upper portion of memory (64MiB by
default), but it can only be controlled/configured via a system
mailbox or property channel (to be added by a subsequent patch).

Signed-off-by: Grégory ESTRADE <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
[AB: added Windows (BGR) support and cleanup/refactoring for upstream 
submission]
Signed-off-by: Andrew Baumann <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 355a8ccc5c57b7ce8758585e2d5d8b7f82b38bec
      
https://github.com/qemu/qemu/commit/355a8ccc5c57b7ce8758585e2d5d8b7f82b38bec
  Author: Grégory ESTRADE <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/bcm2835_peripherals.c
    M hw/arm/raspi.c
    M hw/misc/bcm2835_property.c
    M include/hw/misc/bcm2835_property.h

  Log Message:
  -----------
  bcm2835_property: implement framebuffer control/configuration properties

The property channel driver now interfaces with the framebuffer device
to query and set framebuffer parameters. As a result of this, the "get
ARM RAM size" query now correctly returns the video RAM base address
(not total RAM size), and the ram-size property is no longer relevant
here.

Signed-off-by: Grégory ESTRADE <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
[AB: cleanup/refactoring for upstream submission]
Signed-off-by: Andrew Baumann <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 6717f587a478be37294cc5cfbbd84c5a6ce1aa1f
      
https://github.com/qemu/qemu/commit/6717f587a478be37294cc5cfbbd84c5a6ce1aa1f
  Author: Grégory ESTRADE <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/arm/bcm2835_peripherals.c
    M hw/dma/Makefile.objs
    A hw/dma/bcm2835_dma.c
    M include/hw/arm/bcm2835_peripherals.h
    A include/hw/dma/bcm2835_dma.h

  Log Message:
  -----------
  bcm2835_dma: add emulation of Raspberry Pi DMA controller

At present, all DMA transfers complete inline (so a looping descriptor
queue will lock up the device). We also do not model pause/abort,
arbitrarion/priority, or debug features.

Signed-off-by: Grégory ESTRADE <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
[AB: implement 2D mode, cleanup/refactoring for upstream submission]
Signed-off-by: Andrew Baumann <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: fec44a8c70e23f0f8433a28e824ce6dae4de8cde
      
https://github.com/qemu/qemu/commit/fec44a8c70e23f0f8433a28e824ce6dae4de8cde
  Author: Peter Maydell <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  sd: Fix "info qtree" on boards with SD cards

The SD card object is not a SysBusDevice, so don't create it with
qdev_create() if we're not assigning it to a specific bus; use
object_new() instead.

This was causing 'info qtree' to segfault on boards with SD cards,
because qdev_create(NULL, TYPE_FOO) puts the created object on the
system bus, and then we may try to run functions like sysbus_dev_print()
on it, which fail when casting the object to SysBusDevice.

(This is the same mistake that we made with the NAND device
and fixed in commit 6749695eaaf346c1.)

Reported-by: xiaoqiang.zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: xiaoqiang.zhao <address@hidden>
Message-id: address@hidden


  Commit: d1f8764099022bc1173f2413331b26d4ff609a0c
      
https://github.com/qemu/qemu/commit/d1f8764099022bc1173f2413331b26d4ff609a0c
  Author: Peter Maydell <address@hidden>
  Date:   2016-03-16 (Wed, 16 Mar 2016)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M hw/arm/Makefile.objs
    A hw/arm/ast2400.c
    M hw/arm/bcm2835_peripherals.c
    M hw/arm/bcm2836.c
    M hw/arm/fsl-imx25.c
    M hw/arm/fsl-imx31.c
    A hw/arm/palmetto-bmc.c
    M hw/arm/raspi.c
    M hw/arm/virt.c
    M hw/char/Makefile.objs
    A hw/char/bcm2835_aux.c
    M hw/display/Makefile.objs
    A hw/display/bcm2835_fb.c
    M hw/dma/Makefile.objs
    A hw/dma/bcm2835_dma.c
    M hw/i2c/imx_i2c.c
    M hw/intc/Makefile.objs
    A hw/intc/aspeed_vic.c
    M hw/misc/Makefile.objs
    M hw/misc/bcm2835_property.c
    M hw/misc/imx25_ccm.c
    M hw/misc/imx31_ccm.c
    A hw/misc/imx6_ccm.c
    M hw/net/imx_fec.c
    M hw/sd/sd.c
    M hw/timer/Makefile.objs
    A hw/timer/aspeed_timer.c
    M hw/timer/imx_epit.c
    M hw/timer/imx_gpt.c
    A include/hw/arm/ast2400.h
    M include/hw/arm/bcm2835_peripherals.h
    A include/hw/char/bcm2835_aux.h
    A include/hw/display/bcm2835_fb.h
    A include/hw/dma/bcm2835_dma.h
    A include/hw/intc/aspeed_vic.h
    M include/hw/loader.h
    M include/hw/misc/bcm2835_property.h
    A include/hw/misc/imx6_ccm.h
    M include/hw/misc/imx_ccm.h
    A include/hw/timer/aspeed_timer.h
    M target-arm/helper.c
    M target-arm/helper.h
    M target-arm/op_helper.c
    M target-arm/translate.c
    M trace-events

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20160316-1' into staging

target-arm queue:
 * loader: Fix incorrect parameter name in load_image_mr()
 * Implement MRS (banked) and MSR (banked) instructions
 * virt: Implement versioning for machine model
 * i.MX: some initial patches preparing for i.MX6 support
 * new ASPEED AST2400 SoC and palmetto-bmc machine
 * bcm2835: add some more raspi2 devices
 * sd: fix segfault running "info qtree"

# gpg: Signature made Wed 16 Mar 2016 17:42:43 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20160316-1: (21 commits)
  sd: Fix "info qtree" on boards with SD cards
  bcm2835_dma: add emulation of Raspberry Pi DMA controller
  bcm2835_property: implement framebuffer control/configuration properties
  bcm2835_fb: add framebuffer device for Raspberry Pi
  bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block
  bcm2835_peripherals: enable sdhci pending-insert quirk for raspberry pi
  hw/arm: Add palmetto-bmc machine
  hw/arm: Add ASPEED AST2400 SoC model
  hw/intc: Add (new) ASPEED VIC device model
  hw/timer: Add ASPEED timer device model
  i.MX: Add missing descriptions in devices.
  i.MX: Add i.MX6 CCM and ANALOG device.
  i.MX: Add the CLK_IPG_HIGH clock
  i.MX: Remove CCM useless clock computation handling.
  i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency.
  i.MX: Allow GPT timer to rollover.
  arm: virt: Move machine class init code to the abstract machine type
  arm: virt: Add an abstract ARM virt machine type
  target-arm: Fix translation level on early translation faults
  target-arm: Implement MRS (banked) and MSR (banked) instructions
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/0ebc03bc0653...d1f876409902
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