[Qemu-commits] [qemu/qemu] f1f7e4: i.MX: add support for lower and upper interrupt in...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f1f7e4bf76ad8e88a55f3ae8fd01629669d4317b
      
https://github.com/qemu/qemu/commit/f1f7e4bf76ad8e88a55f3ae8fd01629669d4317b
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/gpio/imx_gpio.c
    M include/hw/gpio/imx_gpio.h

  Log Message:
  -----------
  i.MX: add support for lower and upper interrupt in GPIO.

The i.MX6 GPIO device supports 2 interrupts instead of one.

* 1 for the lower 16 GPIOs.
* 1 for the upper 16 GPIOs.

i.MX31 and i.MX25 only support 1 interrupt for the 32 GPIOs.

So we add a property to turn the behavior on when required.

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 58f6d82fc43fdc997079d6cca52106f68db7b24e
      
https://github.com/qemu/qemu/commit/58f6d82fc43fdc997079d6cca52106f68db7b24e
  Author: Paolo Bonzini <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/display/omap_lcd_template.h
    M hw/display/pxa2xx_lcd.c

  Log Message:
  -----------
  arm: explicitly mark device loads as little-endian

Behaviour of emulated devices should not depend on the endianness
of the CPU, so avoid using the endian-dependent load and store
functions in the PXA2xx and OMAP display devices. These devices
are little endian when they do DMA access.

(Since ARM softmmu is always compiled as little endian, this means
that the endian-dependent load and store functions are always little
endian, so this commit makes no functionally visible change.)

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[PMM: rewrote commit message]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 580106df5ff1a86df317c8a8080e48e1694d785e
      
https://github.com/qemu/qemu/commit/580106df5ff1a86df317c8a8080e48e1694d785e
  Author: Paolo Bonzini <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/dma/soc_dma.c

  Log Message:
  -----------
  arm: soc-dma: use hwaddr instead of target_ulong in printf

This is a first baby step towards removing widespread inclusion of
cpu.h and compiling more devices once (so that arm, aarch64 and
in the future target-multi can share the object files).

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[PMM: changed __FUNCTION__ to __func__ since we're touching
 these lines of code anyway]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 30901475b91ef1f46304404ab4bfe89097f61b96
      
https://github.com/qemu/qemu/commit/30901475b91ef1f46304404ab4bfe89097f61b96
  Author: Andrew Baumann <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/cpu.c
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/op_helper.c
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: raise exception on misaligned LDREX operands

Qemu does not generally perform alignment checks. However, the ARM ARM
requires implementation of alignment exceptions for a number of cases
including LDREX, and Windows-on-ARM relies on this.

This change adds plumbing to enable alignment checks on loads using
MO_ALIGN, a do_unaligned_access hook to raise the exception (data
abort), and uses the new aligned loads in LDREX (for all but
single-byte loads).

Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
[PMM: set WnR bits in syndrome and FSR as appropriate]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 7999a5c8f63344d91c0822a17dbf30e2489a1128
      
https://github.com/qemu/qemu/commit/7999a5c8f63344d91c0822a17dbf30e2489a1128
  Author: Sergey Fedorov <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Fix and improve AA32 singlestep translation completion code

The AArch32 translation completion code for singlestep enabled/active
case was a way more confusing and too repetitive then it needs to be.
Probably that was the cause for a bug to be introduced into it at some
point. The bug was that SWI/HVC/SMC exception would be generated in
condition-failed instruction code path whereas it shouldn't.

This patch rewrites the code in a way similar to the non-singlestep
case.

In the condition-passed/unconditional instruction code path we need to:
 - Write the condexec bits back to the CPU state
 - Advance the singlestep state machine and generate a corresponding
   exception in case of SWI/HVC/SMC
 - Write the PC back to the CPU state if it hasn't already been written
   and generate an appropriate singlestep exception otherwise

In the condition-failed instruction code path we need to:
 - Set a TCG label to jump to it if the condition is failed
 - Write the condexec bits back to the CPU state
 - Write the PC back to the CPU state since it hasn't been written in
   this case
 - Generate an appropriate singlestep exception

Signed-off-by: Sergey Fedorov <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4dbfc88149b1b7359c9e0c6e6d4bbca960acf2e8
      
https://github.com/qemu/qemu/commit/4dbfc88149b1b7359c9e0c6e6d4bbca960acf2e8
  Author: Xiao Guangrong <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M hw/arm/virt-acpi-build.c
    M hw/i386/acpi-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  acpi: support serialized method

Add serialized method support so that explicit Mutex can be
avoided

Signed-off-by: Xiao Guangrong <address@hidden>
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 45fcf539400a4d42fabc818fdf0536aa16f0fd44
      
https://github.com/qemu/qemu/commit/45fcf539400a4d42fabc818fdf0536aa16f0fd44
  Author: Igor Mammedov <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M hw/arm/virt-acpi-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  acpi: extend aml_interrupt() to support multiple irqs

ASL Interrupt() macro translates to Extended Interrupt Descriptor
which supports variable number of IRQs. It will be used for
conversion of ASL code for pc/q35 machines that use it for
returning several IRQs in _PSR object.

Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b0a3721e4403dbc88b77d3735cfa4bcb32ca1789
      
https://github.com/qemu/qemu/commit/b0a3721e4403dbc88b77d3735cfa4bcb32ca1789
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/virt.c
    M include/hw/arm/virt.h

  Log Message:
  -----------
  ARM: Virt: Add a GPIO controller

ACPI 5.0 supports GPIO-signaled ACPI Events. This can be used for
powerdown, hotplug evnets. Add a GPIO controller in machine virt,
to support powerdown, maybe can be used for cpu hotplug. And
here we use pl061.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Wei Huang <address@hidden>
Tested-by: Wei Huang <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: aeb1a36d65deaa3942b76ca0091cbd6c1f046737
      
https://github.com/qemu/qemu/commit/aeb1a36d65deaa3942b76ca0091cbd6c1f046737
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  ARM: ACPI: Add GPIO controller in ACPI DSDT table

Add GPIO controller in ACPI DSDT table. It can be used for gpio event.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Tested-by: Wei Huang <address@hidden>
Message-id: address@hidden
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ac6aa59a21c823b1e2c65ce3372bd01e146b743d
      
https://github.com/qemu/qemu/commit/ac6aa59a21c823b1e2c65ce3372bd01e146b743d
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  ARM: ACPI: Add power button device in ACPI DSDT table

Add power button device in ACPI DSDT table.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Wei Huang <address@hidden>
Tested-by: Wei Huang <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4ecdc746e9dbf47ce2604ddafd057a26d9d98044
      
https://github.com/qemu/qemu/commit/4ecdc746e9dbf47ce2604ddafd057a26d9d98044
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  ACPI: Add GPIO Connection Descriptor

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Tested-by: Wei Huang <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 37d0e980060488b2c76a19f75c0f3b8ebbaecbf6
      
https://github.com/qemu/qemu/commit/37d0e980060488b2c76a19f75c0f3b8ebbaecbf6
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  ACPI: Add aml_gpio_int() wrapper for GPIO Interrupt Connection

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Tested-by: Wei Huang <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c1a158b7eda92babae979c5d701b7acaaa2d0dd3
      
https://github.com/qemu/qemu/commit/c1a158b7eda92babae979c5d701b7acaaa2d0dd3
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  ARM: ACPI: Add _E03 for Power Button

Here GPIO pin 3 is used for Power Button, add _E03 in ACPI DSDT table.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Tested-by: Wei Huang <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4bedd8495b47edbeed8389b631b0ee42bb17e0ef
      
https://github.com/qemu/qemu/commit/4bedd8495b47edbeed8389b631b0ee42bb17e0ef
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3

Currently mach-virt model doesn't support powerdown request. Guest VM
doesn't react to system_powerdown from monitor console (or QMP) because
there is no communication mechanism for such requests. This patch registers
GPIO Pin 3 with powerdown notification. So guest VM can receive notification
when such powerdown request is triggered.

Signed-off-by: Wei Huang <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Wei Huang <address@hidden>
Tested-by: Wei Huang <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3e6ebb64a392ebc712347413f1065300ed008a8f
      
https://github.com/qemu/qemu/commit/3e6ebb64a392ebc712347413f1065300ed008a8f
  Author: Shannon Zhao <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  ARM: Virt: Add gpio-keys node for Poweroff using DT

Add a gpio-keys node. This is used for Poweroff for the systems which
use DT not ACPI.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Tested-by: Wei Huang <address@hidden>
Message-id: address@hidden
[PMM: use "standard-headers/linux/input.h" rather than <linux/input.h>]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 29eb3d9a911b13e2a66413ba5cc6c69a0f4a4528
      
https://github.com/qemu/qemu/commit/29eb3d9a911b13e2a66413ba5cc6c69a0f4a4528
  Author: Alex Bennée <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/kvm64.c

  Log Message:
  -----------
  target-arm: kvm64 - introduce kvm_arm_init_debug()

As we haven't always had guest debug support we need to probe for it.
Additionally we don't do this in the start-up capability code so we
don't fall over on old kernels.

Signed-off-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2ecb2027bc5033dfa92d00d708723053f9689564
      
https://github.com/qemu/qemu/commit/2ecb2027bc5033dfa92d00d708723053f9689564
  Author: Alex Bennée <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/kvm.c
    M target-arm/kvm32.c
    M target-arm/kvm64.c
    M target-arm/kvm_arm.h

  Log Message:
  -----------
  target-arm: kvm - implement software breakpoints

These don't involve messing around with debug registers, just setting
the breakpoint instruction in memory. GDB will not use this mechanism if
it can't access the memory to write the breakpoint.

All the kernel has to do is ensure the hypervisor traps the breakpoint
exceptions and returns to userspace.

Signed-off-by: Alex Bennée <address@hidden>
Message-id: address@hidden
[PMM: Fixed typo in comment]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 26ae59348585e09d9386633984da211c87d52d4f
      
https://github.com/qemu/qemu/commit/26ae59348585e09d9386633984da211c87d52d4f
  Author: Alex Bennée <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/kvm64.c

  Log Message:
  -----------
  target-arm: kvm - support for single step

This adds support for single-step. There isn't much to do on the QEMU
side as after we set-up the request for single step via the debug ioctl
it is all handled within the kernel.

The actual setting of the KVM_GUESTDBG_SINGLESTEP flag is already in the
common code. If the kernel doesn't support guest debug the ioctl will
simply error.

Signed-off-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e4482ab7e3849fb5e01ccacfc13f424cc6acb8d5
      
https://github.com/qemu/qemu/commit/e4482ab7e3849fb5e01ccacfc13f424cc6acb8d5
  Author: Alex Bennée <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/kvm.c
    M target-arm/kvm32.c
    M target-arm/kvm64.c
    M target-arm/kvm_arm.h

  Log Message:
  -----------
  target-arm: kvm - add support for HW assisted debug

This adds basic support for HW assisted debug. The ioctl interface to
KVM allows us to pass an implementation defined number of break and
watch point registers. When KVM_GUESTDBG_USE_HW is specified these
debug registers will be installed in place on the world switch into the
guest.

The hardware is actually capable of more advanced matching but it is
unclear if this expressiveness is available via the gdbstub protocol.

Signed-off-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 34c45d53026d9c135415d034a8bc30c1a30acf1c
      
https://github.com/qemu/qemu/commit/34c45d53026d9c135415d034a8bc30c1a30acf1c
  Author: Alex Bennée <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M target-arm/helper-a64.c
    M target-arm/kvm64.c

  Log Message:
  -----------
  target-arm: kvm - re-inject guest debug exceptions

If we can't find details for the debug exception in our debug state
then we can assume the exception is due to debugging inside the guest.
To inject the exception into the guest state we re-use the TCG exception
code (do_interrupt).

However while guest debugging is in effect we currently can't handle the
guest using single step as we will keep trapping to back to userspace.
GDB makes heavy use of single-step behind the scenes which effectively
means the guest's ability to debug itself is disabled while it is being
debugged.

Signed-off-by: Alex Bennée <address@hidden>
Message-id: address@hidden
[PMM: Fixed a few typos in comments and commit message]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 261f4d6d3e5445f887e070f047968e756c30cf06
      
https://github.com/qemu/qemu/commit/261f4d6d3e5445f887e070f047968e756c30cf06
  Author: Alex Bennée <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    A tests/guest-debug/test-gdbstub.py

  Log Message:
  -----------
  tests/guest-debug: introduce basic gdbstub tests

The aim of these tests is to combine with an appropriate kernel
image (with symbol-file vmlinux) and check it behaves as it should.
Given a kernel it checks:

  - single step
  - software breakpoint
  - hardware breakpoint
  - access, read and write watchpoints

On success it returns 0 to the calling process.

I've not plumbed this into the "make check" logic though as we need a
solution for providing non-host binaries to the tests. However the test
is structured to work with pretty much any Linux kernel image as it
uses the basic kernel_init code which is common across architectures.

Signed-off-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9de46a0aa3aa0d1db019dc5e2152a2bbf484180d
      
https://github.com/qemu/qemu/commit/9de46a0aa3aa0d1db019dc5e2152a2bbf484180d
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/misc/imx_ccm.c

  Log Message:
  -----------
  i.MX: Fix i.MX31 default/reset configuration

Linux on i.MX31/KZM is expecting the CCM to use the CKIH ref clock
instead of the CKIL plus the FPM multiplier.

We change the CCMR reg reset value to match linux expected config.

This allows the CCM to provide a 39MHz clk (as expected by linux)
instead of the actual 50MHz.

With this change the "sleep 60" command on linux is time accurate
with "real world time".

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: aaa9ec3b4ddaea53c6218ac90bf4ebc4b0bcff31
      
https://github.com/qemu/qemu/commit/aaa9ec3b4ddaea53c6218ac90bf4ebc4b0bcff31
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/misc/imx_ccm.c
    M hw/timer/imx_epit.c
    M hw/timer/imx_gpt.c
    M include/hw/misc/imx_ccm.h

  Log Message:
  -----------
  i.MX: rename i.MX CCM get_clock() function and CLK ID enum names

This is to prepare for CCM code refactoring.

This is just a bit of function and enum values renaming.

We also remove some useless intermediate variables.

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: cb54d868c6a2292443645f25b295630f925474f8
      
https://github.com/qemu/qemu/commit/cb54d868c6a2292443645f25b295630f925474f8
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/fsl-imx25.c
    M hw/arm/fsl-imx31.c
    M hw/misc/Makefile.objs
    A hw/misc/imx31_ccm.c
    M hw/misc/imx_ccm.c
    M include/hw/arm/fsl-imx25.h
    M include/hw/arm/fsl-imx31.h
    A include/hw/misc/imx31_ccm.h
    M include/hw/misc/imx_ccm.h
    M include/hw/timer/imx_epit.h
    M include/hw/timer/imx_gpt.h

  Log Message:
  -----------
  i.MX: Split the CCM class into an abstract base class and a concrete class

The IMX_CCM class is now the base abstract class that is used by EPIT
and GPT timer implementation.

IMX31_CCM class is the concrete class implementing CCM for i.MX31 SOC.

For now the i.MX25 continues to use the i.MX31 CCM implementation.

An i.MX25 specific CCM will be introduced in a later patch.

We also rework initialization to stop using deprecated sysbus device init.

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 92eccc6e13732b3d170b5e91037d030c8c73801c
      
https://github.com/qemu/qemu/commit/92eccc6e13732b3d170b5e91037d030c8c73801c
  Author: Jean-Christophe Dubois <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/arm/fsl-imx25.c
    M hw/misc/Makefile.objs
    A hw/misc/imx25_ccm.c
    M include/hw/arm/fsl-imx25.h
    A include/hw/misc/imx25_ccm.h

  Log Message:
  -----------
  i.MX: Add an i.MX25 specific CCM class/instance

With this CCM, i.MX25 timer is accurate with "real world time".

Signed-off-by: Jean-Christophe Dubois <address@hidden>
Message-id: address@hidden
Reviewed-by Peter Crosthwaite <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e5fbe28e5424d26fc2c25d0a7ecb927d3c80d5e8
      
https://github.com/qemu/qemu/commit/e5fbe28e5424d26fc2c25d0a7ecb927d3c80d5e8
  Author: Peter Maydell <address@hidden>
  Date:   2015-12-17 (Thu, 17 Dec 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M hw/arm/fsl-imx25.c
    M hw/arm/fsl-imx31.c
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M hw/display/omap_lcd_template.h
    M hw/display/pxa2xx_lcd.c
    M hw/dma/soc_dma.c
    M hw/gpio/imx_gpio.c
    M hw/i386/acpi-build.c
    M hw/misc/Makefile.objs
    A hw/misc/imx25_ccm.c
    A hw/misc/imx31_ccm.c
    M hw/misc/imx_ccm.c
    M hw/timer/imx_epit.c
    M hw/timer/imx_gpt.c
    M include/hw/acpi/aml-build.h
    M include/hw/arm/fsl-imx25.h
    M include/hw/arm/fsl-imx31.h
    M include/hw/arm/virt.h
    M include/hw/gpio/imx_gpio.h
    A include/hw/misc/imx25_ccm.h
    A include/hw/misc/imx31_ccm.h
    M include/hw/misc/imx_ccm.h
    M include/hw/timer/imx_epit.h
    M include/hw/timer/imx_gpt.h
    M target-arm/cpu.c
    M target-arm/helper-a64.c
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/kvm.c
    M target-arm/kvm32.c
    M target-arm/kvm64.c
    M target-arm/kvm_arm.h
    M target-arm/op_helper.c
    M target-arm/translate.c
    A tests/guest-debug/test-gdbstub.py

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20151217-1' into staging

target-arm queue:
 * i.MX CCM patches
 * support guest debug for AArch64 KVM
 * support power button on virt board via GPIO
 * clean up AArch32 singlestep code
 * raise exception on misaligned LDREX operands
 * soc-dma: use hwaddr instead of target_ulong in printf
 * explicitly mark some ARM device loads as little-endian
 * i.MX: add support for lower and upper interrupt in GPIO

# gpg: Signature made Thu 17 Dec 2015 13:38:09 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20151217-1: (25 commits)
  i.MX: Add an i.MX25 specific CCM class/instance
  i.MX: Split the CCM class into an abstract base class and a concrete class
  i.MX: rename i.MX CCM get_clock() function and CLK ID enum names
  i.MX: Fix i.MX31 default/reset configuration
  tests/guest-debug: introduce basic gdbstub tests
  target-arm: kvm - re-inject guest debug exceptions
  target-arm: kvm - add support for HW assisted debug
  target-arm: kvm - support for single step
  target-arm: kvm - implement software breakpoints
  target-arm: kvm64 - introduce kvm_arm_init_debug()
  ARM: Virt: Add gpio-keys node for Poweroff using DT
  ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3
  ARM: ACPI: Add _E03 for Power Button
  ACPI: Add aml_gpio_int() wrapper for GPIO Interrupt Connection
  ACPI: Add GPIO Connection Descriptor
  ARM: ACPI: Add power button device in ACPI DSDT table
  ARM: ACPI: Add GPIO controller in ACPI DSDT table
  ARM: Virt: Add a GPIO controller
  acpi: extend aml_interrupt() to support multiple irqs
  acpi: support serialized method
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/98557acf9297...e5fbe28e5424