[Qemu-commits] [qemu/qemu] 9fbf0f: ide: remove hardcoded 2GiB transactional limit

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 9fbf0fa81fca8f527669dd4fa72662d66e7d6329
      
https://github.com/qemu/qemu/commit/9fbf0fa81fca8f527669dd4fa72662d66e7d6329
  Author: John Snow <address@hidden>
  Date:   2015-11-06 (Fri, 06 Nov 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/internal.h
    M hw/ide/pci.c

  Log Message:
  -----------
  ide: remove hardcoded 2GiB transactional limit

Not that you can request a >2GiB transaction, but that's why checking
for it makes no sense anymore.

With the newer 'limit' parameter to prepare_buf, we no longer need a
static limit. The maximum limit is still 2GiB, but the limit parameter
is set to the current transaction size, which cannot surpass 32MiB
(512 * 65536). If the PRDT surpasses the transactional size, then,
we'll just carry out the normative underflow handling pathways instead
of needing an extra, strange pathway that worries about hitting some
logistical cap for the largest sglist we can support -- we'll never
even attempt to build one that big anymore.

Reported-by: Kevin Wolf <address@hidden>
Signed-off-by: John Snow <address@hidden>
Acked-by: Stefan Hajnoczi <address@hidden>
Message-id: address@hidden


  Commit: 802742670df73773c0dbaa251c63e4561cc794a1
      
https://github.com/qemu/qemu/commit/802742670df73773c0dbaa251c63e4561cc794a1
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-06 (Fri, 06 Nov 2015)

  Changed paths:
    M hw/ide/ahci.c

  Log Message:
  -----------
  ahci: Add some MMIO debug printfs

These are useful for bringup of AHCI.

Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: John Snow <address@hidden>
Message-id: address@hidden
Signed-off-by: John Snow <address@hidden>


  Commit: 0487eea48ecc6e525d6e626d94da54e203089a95
      
https://github.com/qemu/qemu/commit/0487eea48ecc6e525d6e626d94da54e203089a95
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-06 (Fri, 06 Nov 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h
    M hw/ide/ich.c

  Log Message:
  -----------
  ahci: split realize and init

Do the init level tasks asap and the realize later (mainly when
num_ports is available). This allows sub-class realize routines
to work with the device post-init.

Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: John Snow <address@hidden>
Message-id: address@hidden
Signed-off-by: John Snow <address@hidden>


  Commit: 377e2145392e5787d35e58d643bd3de4838006b4
      
https://github.com/qemu/qemu/commit/377e2145392e5787d35e58d643bd3de4838006b4
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-06 (Fri, 06 Nov 2015)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/ahci.h
    M include/qemu/typedefs.h

  Log Message:
  -----------
  ahci: Add allwinner AHCI

Add a Sysbus AHCI subclass for the Allwinner AHCI. It has a few extra
vendor specific registers which are used for phy and power init.

Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: John Snow <address@hidden>
Message-id: address@hidden
[resolved patch context on pull --js]
Signed-off-by: John Snow <address@hidden>


  Commit: dca625768a7da9377cd5886cc03854229c1e18a1
      
https://github.com/qemu/qemu/commit/dca625768a7da9377cd5886cc03854229c1e18a1
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-06 (Fri, 06 Nov 2015)

  Changed paths:
    M hw/arm/allwinner-a10.c
    M include/hw/arm/allwinner-a10.h

  Log Message:
  -----------
  arm: allwinner-a10: Add SATA

Add the Allwinner A10 AHCI controller module to the SoC.

Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: John Snow <address@hidden>
Message-id: address@hidden
Signed-off-by: John Snow <address@hidden>


  Commit: c4a7bf54e588ff2de9fba0898b686156251b2063
      
https://github.com/qemu/qemu/commit/c4a7bf54e588ff2de9fba0898b686156251b2063
  Author: Peter Maydell <address@hidden>
  Date:   2015-11-07 (Sat, 07 Nov 2015)

  Changed paths:
    M hw/arm/allwinner-a10.c
    M hw/ide/ahci.c
    M hw/ide/ahci.h
    M hw/ide/ich.c
    M hw/ide/internal.h
    M hw/ide/pci.c
    M include/hw/arm/allwinner-a10.h
    M include/qemu/typedefs.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into 
staging

# gpg: Signature made Fri 06 Nov 2015 20:01:44 GMT using RSA key ID AAFC390E
# gpg: Good signature from "John Snow (John Huston) <address@hidden>"

* remotes/jnsnow/tags/ide-pull-request:
  arm: allwinner-a10: Add SATA
  ahci: Add allwinner AHCI
  ahci: split realize and init
  ahci: Add some MMIO debug printfs
  ide: remove hardcoded 2GiB transactional limit

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/4b59f39bc9a0...c4a7bf54e588