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[Qemu-commits] [qemu/qemu] 99a99c: target-arm: Add and use symbolic name

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 99a99c: target-arm: Add and use symbolic names for registe...
Date: Tue, 03 Nov 2015 08:00:06 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 99a99c1fc8e9bfec1656ac5916c53977a93d3581
      
https://github.com/qemu/qemu/commit/99a99c1fc8e9bfec1656ac5916c53977a93d3581
  Author: Soren Brinkmann <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/kvm32.c
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Add and use symbolic names for register banks

Add BANK_<cpumode> #defines to index banked registers.

Suggested-by: Peter Maydell <address@hidden>
Signed-off-by: Soren Brinkmann <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 84e59397797ff2040439058b689adbfef608b879
      
https://github.com/qemu/qemu/commit/84e59397797ff2040439058b689adbfef608b879
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/boot.c

  Log Message:
  -----------
  arm: boot: Adjust indentation of FIXUP comments

These comments start immediately after the current longest name in the
list. Tab them out to the next tab stop to give a little breathing room
and prepare for FIXUP_BOARD_SETUP which will require more indent.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 10b8ec73e610e017ac2fbaf486fce21eec7061b2
      
https://github.com/qemu/qemu/commit/10b8ec73e610e017ac2fbaf486fce21eec7061b2
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/boot.c
    M include/hw/arm/arm.h

  Log Message:
  -----------
  arm: boot: Add board specific setup code API

Add an API for boards to inject their own preboot software (or
firmware) sequence.

The software then returns to the bootloader via the link register. This
allows boards to do their own little bits of firmware setup without
needed to replace the bootloader completely (which is the requirement
for existing firmware support).

The blob is loaded by a callback if and only if doing a linux boot
(similar to the existing write_secondary support).

Rewrite the comment for the primary boot blob.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c3a9a689c6ff07ba2e00bafc68626fad84587794
      
https://github.com/qemu/qemu/commit/c3a9a689c6ff07ba2e00bafc68626fad84587794
  Author: Peter Crosthwaite <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/xilinx_zynq.c

  Log Message:
  -----------
  arm: xilinx_zynq: Add linux pre-boot

Add a Linux-specific pre-boot routine that matches the device-
specific bootloaders behaviour. This is needed for modern Linux that
expects the ARM PLL in SLCR to be a more even value (not 26).

Cc: Alistair Francis <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 20c59c38927902a8e2c67da7d9a24b5222a31cb7
      
https://github.com/qemu/qemu/commit/20c59c38927902a8e2c67da7d9a24b5222a31cb7
  Author: Michael Davidsaver <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/armv7m.c
    M hw/arm/stellaris.c
    M hw/arm/stm32f205_soc.c
    M include/hw/arm/arm.h

  Log Message:
  -----------
  armv7-m: Return DeviceState* from armv7m_init()

Change armv7m_init to return the DeviceState* for the NVIC.
This allows access to all GPIO blocks, not just the IRQ inputs.
Move qdev_get_gpio_in() calls out of armv7m_init() into
board code for stellaris and stm32f205 boards.

Signed-off-by: Michael Davidsaver <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e192becdc7b05276a41ebef9fe11e6c30ddb91e3
      
https://github.com/qemu/qemu/commit/e192becdc7b05276a41ebef9fe11e6c30ddb91e3
  Author: Michael Davidsaver <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/intc/armv7m_nvic.c

  Log Message:
  -----------
  armv7-m: Implement SYSRESETREQ

Implement the SYSRESETREQ bit of the AIRCR register
for armv7-m (ie. cortex-m3) to trigger a GPIO out.

Signed-off-by: Michael Davidsaver <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d69ffb5b48701d8f33cdfa2570a4ea1d5eb9de4d
      
https://github.com/qemu/qemu/commit/d69ffb5b48701d8f33cdfa2570a4ea1d5eb9de4d
  Author: Michael Davidsaver <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/stellaris.c

  Log Message:
  -----------
  arm: stellaris: exit on external reset request

Add GPIO in for the stellaris board which calls
qemu_system_reset_request() on reset request.

Signed-off-by: Michael Davidsaver <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b4f2bd1ce89f3a324fd047c65573897b39d5aaf8
      
https://github.com/qemu/qemu/commit/b4f2bd1ce89f3a324fd047c65573897b39d5aaf8
  Author: Peter Maydell <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: Add new qemu-arm mailing list to ARM related entries

We now have a qemu-arm mailing list for ARM patches and discussion,
so add an L: entry for it to the various ARM related entries in
MAINTAINERS.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Shannon Zhao <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: 08b8e0f527930208a548b424d2ab3103bf3c8c02
      
https://github.com/qemu/qemu/commit/08b8e0f527930208a548b424d2ab3103bf3c8c02
  Author: Peter Maydell <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32

The AArch64 debug CPU display of PSTATE as "PSTATE=200003c5 (flags --C-)"
on the end of the same line as the last of the general purpose registers
is unnecessarily different from the AArch32 display of PSR as
"PSR=200001d3 --C- A svc32" on its own line. Update the AArch64
code to put PSTATE in its own line and in the same format, including
printing the exception level (mode).

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden


  Commit: 06e5cf7acd1f94ab7c1cd6945974a1f039672940
      
https://github.com/qemu/qemu/commit/06e5cf7acd1f94ab7c1cd6945974a1f039672940
  Author: Peter Maydell <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M target-arm/translate-a64.c
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Report S/NS status in the CPU debug logs

If this CPU supports EL3, enhance the printing of the current
CPU mode in debug logging to distinguish S from NS modes as
appropriate.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden


  Commit: bc64b96c984abfe84f43562ca7480bb4f2af0613
      
https://github.com/qemu/qemu/commit/bc64b96c984abfe84f43562ca7480bb4f2af0613
  Author: Graeme Gregory <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: _CCA attribute is compulsory

According to ACPI specification 6.2.17 _CCA (Cache Coherency Attribute)
this attribute is compulsory on ARM systems. Add this attribute to
the PCI host bridges as required.

Without this the kernel will produce the error
[Firmware Bug]: PCI device 0000:00:00.0 fail to setup DMA.

Signed-off-by: Graeme Gregory <address@hidden>
Message-id: address@hidden
Reviewed-by: Shannon Zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f2fbfacec024d1e78c10fc8498f3126557c21ed8
      
https://github.com/qemu/qemu/commit/f2fbfacec024d1e78c10fc8498f3126557c21ed8
  Author: Shannon Zhao <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Add GICC ACPI subtable for GICv3

When booting VM with GICv3, the kernel needs GICC ACPI subtable to
initialize the CPUs, e.g. MPIDR information. This adds GICC ACPI
subtable for GICv3, but set GICC base address only when gic_version == 2
since it donesn't need GICC base address for GICv3.

Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5d9c1756140d680e66e5b45005a1fb7078b74ee1
      
https://github.com/qemu/qemu/commit/5d9c1756140d680e66e5b45005a1fb7078b74ee1
  Author: Shannon Zhao <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  ARM: ACPI: Fix MPIDR value in ACPI table

Use mp_affinity of ARMCPU as the CPU MPIDR instead of the CPU index.

Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 79cf9fad341e6e7bd6b55395b71d5c5727d7f5b0
      
https://github.com/qemu/qemu/commit/79cf9fad341e6e7bd6b55395b71d5c5727d7f5b0
  Author: Peter Maydell <address@hidden>
  Date:   2015-11-03 (Tue, 03 Nov 2015)

  Changed paths:
    M MAINTAINERS
    M hw/arm/armv7m.c
    M hw/arm/boot.c
    M hw/arm/stellaris.c
    M hw/arm/stm32f205_soc.c
    M hw/arm/virt-acpi-build.c
    M hw/arm/xilinx_zynq.c
    M hw/intc/armv7m_nvic.c
    M include/hw/arm/arm.h
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/kvm32.c
    M target-arm/op_helper.c
    M target-arm/translate-a64.c
    M target-arm/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151103' 
into staging

target-arm queue:
 * code cleanup to use symbolic constants for register bank numbers
 * fix direct booting of modern Linux kernels on xilinx_zynq by setting
   SCLR values to what the kernel expects firmware to have done
 * implement SYSRESETREQ for ARMv7M CPU (stellaris boards)
 * update MAINTAINERS to mention new qemu-arm mailing list
 * clean up display of PSTATE in AArch64 debug logs
 * report Secure/Nonsecure status in CPU debug logs
 * fix a missing _CCA attribute in ACPI tables
 * add support for GICv3 to ACPI tables

# gpg: Signature made Tue 03 Nov 2015 13:58:46 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20151103:
  ARM: ACPI: Fix MPIDR value in ACPI table
  hw/arm/virt-acpi-build: Add GICC ACPI subtable for GICv3
  hw/arm/virt-acpi-build: _CCA attribute is compulsory
  target-arm: Report S/NS status in the CPU debug logs
  target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32
  MAINTAINERS: Add new qemu-arm mailing list to ARM related entries
  arm: stellaris: exit on external reset request
  armv7-m: Implement SYSRESETREQ
  armv7-m: Return DeviceState* from armv7m_init()
  arm: xilinx_zynq: Add linux pre-boot
  arm: boot: Add board specific setup code API
  arm: boot: Adjust indentation of FIXUP comments
  target-arm: Add and use symbolic names for register banks

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/19bb5467135d...79cf9fad341e
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