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[Qemu-commits] [qemu/qemu] b81777: spapr: Allocate HTAB from machine ini
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GitHub |
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[Qemu-commits] [qemu/qemu] b81777: spapr: Allocate HTAB from machine init |
Date: |
Fri, 23 Oct 2015 06:00:04 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: b817772a2521defba513b64b1d08238f24c50657
https://github.com/qemu/qemu/commit/b817772a2521defba513b64b1d08238f24c50657
Author: Bharata B Rao <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: Allocate HTAB from machine init
Allocate HTAB from ppc_spapr_init() so that we can abort the guest
if requested HTAB size is't allocated by the host. However retain the
htab reset call in spapr_reset_htab() so that HTAB gets reset (and
not allocated) during machine reset.
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 7735fedaf490cf9213cd8d487272b69a4987c851
https://github.com/qemu/qemu/commit/7735fedaf490cf9213cd8d487272b69a4987c851
Author: Bharata B Rao <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: Abort when HTAB of requested size isn't allocated
Terminate the guest when HTAB of requested size isn't allocated by
the host.
When memory hotplug is attempted on a guest that has booted with
less than requested HTAB size, the guest kernel will not be able
to gracefully fail the hotplug request. This patch will ensure that
we never end up in a situation where memory hotplug fails due to
less than requested HTAB size.
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: fd5da5c47264a57c7d01507eaf50bf3d288ba8a4
https://github.com/qemu/qemu/commit/fd5da5c47264a57c7d01507eaf50bf3d288ba8a4
Author: Thomas Huth <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: Add "slb-size" property to CPU device tree nodes
According to a commit message in the Linux kernel (see here
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=b60c31d85a2a
for example), the name of the property that carries the information
about the number of SLB entries should be called "slb-size", and
not "ibm,slb-size". The Linux kernel can deal with both names, but
to be on the safe side we should support the official name, too.
[Now that LoPAPR is public, the relevant requirement can be found in
section C.6.1.8 --dwg]
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: f93caaac36ec3b030184055596cb56f64d0de988
https://github.com/qemu/qemu/commit/f93caaac36ec3b030184055596cb56f64d0de988
Author: David Gibson <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr_pci.c
M include/hw/pci-host/spapr.h
Log Message:
-----------
spapr_pci: Allow PCI host bridge DMA window to be configured
At present the PCI host bridge (PHB) for the pseries machine type has a
fixed DMA window from 0..1GB (in PCI address space) which is mapped to real
memory via the PAPR paravirtualized IOMMU.
For better support of VFIO devices, we're going to want to allow for
different configurations of the DMA window.
Eventually we'll want to allow the guest itself to reconfigure the window
via the PAPR dynamic DMA window interface, but as a preliminary this patch
allows the user to reconfigure the window with new properties on the PHB
device.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Commit: 6a81dd172cd5d03fce593741629cb4c78fff10cb
https://github.com/qemu/qemu/commit/6a81dd172cd5d03fce593741629cb4c78fff10cb
Author: David Gibson <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr_iommu.c
M include/hw/ppc/spapr.h
M target-ppc/kvm.c
M target-ppc/kvm_ppc.h
Log Message:
-----------
spapr_iommu: Rename vfio_accel parameter
The vfio_accel parameter used when creating a new TCE table (guest IOMMU
context) has a confusing name. What it really means is whether we need the
TCE table created to be able to support VFIO devices.
VFIO is relevant, because when available we use in-kernel acceleration of
the TCE table, but that may not work with VFIO devices because updates to
the table are handled in kernel, bypass qemu and so don't hit qemu's
infrastructure for keeping the VFIO host IOMMU state in sync with the guest
IOMMU state.
Rename the parameter to "need_vfio" throughout. This is a cosmetic change,
with no impact on the logic.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Commit: c10325d6f9af84444120d8a6d1d59f41a282ae1b
https://github.com/qemu/qemu/commit/c10325d6f9af84444120d8a6d1d59f41a282ae1b
Author: David Gibson <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr_iommu.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr_iommu: Provide a function to switch a TCE table to allowing VFIO
Because of the way non-VFIO guest IOMMU operations are KVM accelerated, not
all TCE tables (guest IOMMU contexts) can support VFIO devices. Currently,
this is decided at creation time.
To support hotplug of VFIO devices, we need to allow a TCE table which
previously didn't allow VFIO devices to be switched so that it can. This
patch adds an spapr_tce_set_need_vfio() function to do this, by
reallocating the table in userspace if necessary.
Currently this doesn't allow the KVM acceleration to be re-enabled if all
the VFIO devices are removed. That's an optimization for another time.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Commit: 185181f8835b1b68409ac4381688eafdca0172cc
https://github.com/qemu/qemu/commit/185181f8835b1b68409ac4381688eafdca0172cc
Author: David Gibson <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: Allow VFIO devices to work on the normal PCI host bridge
The core VFIO infrastructure more or less allows VFIO devices to work
on any normal guest PCI host bridge (PHB) without extra logic.
However, the "spapr-pci-host-bridge" device (as opposed to the special
"spapr-pci-vfio-host-bridge" device) breaks this by using a partially
KVM accelerated implementation of the guest kernel IOMMU which won't
work with VFIO devices, without additional kernel support.
This patch allows VFIO devices to work on the spapr-pci-host-bridge,
by having it switch off KVM TCE acceleration when a VFIO device is
added to the PHB (either on startup, or by hotplug).
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Commit: a23dec105c0faed7b9cba5d07d92df63a04dbb2e
https://github.com/qemu/qemu/commit/a23dec105c0faed7b9cba5d07d92df63a04dbb2e
Author: Thomas Huth <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/scsi/spapr_vscsi.c
Log Message:
-----------
hw/scsi/spapr_vscsi: Remove superfluous memset
g_malloc0 already clears the memory, so no need for
the additional memset here.
Cc: Paolo Bonzini <address@hidden>
Cc: David Gibson <address@hidden>
Cc: Alexander Graf <address@hidden>
Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: aa4bb58752310e7906683a2ac99566222c1e7228
https://github.com/qemu/qemu/commit/aa4bb58752310e7906683a2ac99566222c1e7228
Author: Benjamin Herrenschmidt <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M target-ppc/cpu.h
M target-ppc/kvm.c
M target-ppc/mmu_helper.c
M target-ppc/translate.c
M target-ppc/translate_init.c
Log Message:
-----------
ppc: Add mmu_model defines for arch 2.03 and 2.07
This removes unused POWERPC_MMU_2_06a/POWERPC_MMU_2_06d.
This replaces POWERPC_MMU_64B with POWERPC_MMU_2_03 for POWER5+ to be
more explicit about the version of the PowerISA supported.
This defines POWERPC_MMU_2_07 and uses it for the POWER8 CPU family.
This will not have an immediate effect now but it will in the following
patch.
This should cause no behavioural change.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
[aik: rebased, changed commit log]
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 90da0d5a703839c8db9f37355107955df043b654
https://github.com/qemu/qemu/commit/90da0d5a703839c8db9f37355107955df043b654
Author: Benjamin Herrenschmidt <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/spapr.c
M target-ppc/cpu.h
M target-ppc/kvm.c
M target-ppc/translate_init.c
Log Message:
-----------
ppc/spapr: Add "ibm,pa-features" property to the device-tree
LoPAPR defines a "ibm,pa-features" per-CPU device tree property which
describes extended features of the Processor Architecture.
This adds the property to the device tree. At the moment this is the
copy of what pHyp advertises except "I=1 (cache inhibited) Large Pages"
which is enabled for TCG and disabled when running under HV KVM host
with 4K system page size.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
[aik: rebased, changed commit log, moved ci_large_pages initialization,
renamed pa_features arrays]
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 32f3a8992ea28a194678832eec1e1ffc09cbb7b1
https://github.com/qemu/qemu/commit/32f3a8992ea28a194678832eec1e1ffc09cbb7b1
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/input/adb.c
Log Message:
-----------
adb: add to input category
The Apple Desktop Bus is used to connect a keyboard and a mouse,
so add it to the input category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 74623e7369b175fa324421f4c0047d06da3baafc
https://github.com/qemu/qemu/commit/74623e7369b175fa324421f4c0047d06da3baafc
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ide/cmd646.c
Log Message:
-----------
cmd646: add to storage category
cmd646 is an IDE controller, so add it to the
storage category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: f8d4c07c7807d0f7be02f42d2ee849d2eea4141e
https://github.com/qemu/qemu/commit/f8d4c07c7807d0f7be02f42d2ee849d2eea4141e
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/char/escc.c
Log Message:
-----------
escc: add to input category
ESCC is a serial port controller, so add it
to the input category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: e16244355f8d5efc94df965b1f6a5a0b6c50a2f2
https://github.com/qemu/qemu/commit/e16244355f8d5efc94df965b1f6a5a0b6c50a2f2
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/pci-host/grackle.c
Log Message:
-----------
grackle: add to bridge category
Grackle is the PCI host controller of oldworld powermac,
so add it to the bridge category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 599d7326c35d323c0a2cf18ebf65c613979e7f65
https://github.com/qemu/qemu/commit/599d7326c35d323c0a2cf18ebf65c613979e7f65
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/misc/macio/cuda.c
Log Message:
-----------
cuda: add to bridge category
Cuda is a bridge between PowerMac system bus and the ADB controller,
real-time clock, pram and the power management unit.
So add it to the bridge category.
Signed-off-by: Laurent Vivier <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 3469d9bce86d2e387777addb25ed8b80b7e9d2a1
https://github.com/qemu/qemu/commit/3469d9bce86d2e387777addb25ed8b80b7e9d2a1
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ide/macio.c
Log Message:
-----------
macio-ide: add to storage category
macio-ide is an IDE controller, so add it
to the storage category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Reviewed-by: John Snow <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 1d16f86a433a323691dcfd0f71acdc7592c114fc
https://github.com/qemu/qemu/commit/1d16f86a433a323691dcfd0f71acdc7592c114fc
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/pci-host/uninorth.c
Log Message:
-----------
uninorth: add to bridge category
Uninorth is the mac99 PCI host controller, so add
it to the bridge category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: f9f2a9f26f74b4572c51e74be7fd97fa34c920d3
https://github.com/qemu/qemu/commit/f9f2a9f26f74b4572c51e74be7fd97fa34c920d3
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/misc/macio/macio.c
Log Message:
-----------
macio: add to bridge category
macio is a bridge between the PCI bus and the Mac nvram,
IDE controller and PIC, so add it to the bridge category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 175fe9e7c886263258602262c341c472bc64be42
https://github.com/qemu/qemu/commit/175fe9e7c886263258602262c341c472bc64be42
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/nvram/mac_nvram.c
Log Message:
-----------
macio-nvram: add to misc category
The macio nvram is a non volatile RAM, so add it
the misc category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 29f8dd66e89d59f66105af9065c10e21f85cc653
https://github.com/qemu/qemu/commit/29f8dd66e89d59f66105af9065c10e21f85cc653
Author: Laurent Vivier <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/intc/openpic.c
M hw/intc/openpic_kvm.c
Log Message:
-----------
openpic: add to misc category
openpic is a programmable interrupt controller, so
add it to the misc category.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 659f7f65561e78d720986d61f3112c54a97b2b96
https://github.com/qemu/qemu/commit/659f7f65561e78d720986d61f3112c54a97b2b96
Author: Paolo Bonzini <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/ppc/prep.c
M trace-events
Log Message:
-----------
prep: do not use CPU_LOG_IOPORT, convert to tracepoints
These messages are disabled by default; a perfect usecase for tracepoints.
Convert them over.
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 147482ae35b896808af68c0051ad86d3aae12979
https://github.com/qemu/qemu/commit/147482ae35b896808af68c0051ad86d3aae12979
Author: Peter Maydell <address@hidden>
Date: 2015-10-23 (Fri, 23 Oct 2015)
Changed paths:
M hw/char/escc.c
M hw/ide/cmd646.c
M hw/ide/macio.c
M hw/input/adb.c
M hw/intc/openpic.c
M hw/intc/openpic_kvm.c
M hw/misc/macio/cuda.c
M hw/misc/macio/macio.c
M hw/nvram/mac_nvram.c
M hw/pci-host/grackle.c
M hw/pci-host/uninorth.c
M hw/ppc/prep.c
M hw/ppc/spapr.c
M hw/ppc/spapr_iommu.c
M hw/ppc/spapr_pci.c
M hw/scsi/spapr_vscsi.c
M include/hw/pci-host/spapr.h
M include/hw/ppc/spapr.h
M target-ppc/cpu.h
M target-ppc/kvm.c
M target-ppc/kvm_ppc.h
M target-ppc/mmu_helper.c
M target-ppc/translate.c
M target-ppc/translate_init.c
M trace-events
Log Message:
-----------
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151023' into
staging
ppc patch queue - 2015-10-23
sPAPR highlights:
* Allow VFIO devices on the spapr-pci-host-bridge
* Allow virtio VGA
* Safer handling of HTAB allocation
* ibm,pa-features device tree property
non-sPAPR highlights:
* Categorization of many ppc specific devices in help output
* Tweaks to MMU type constants
# gpg: Signature made Fri 23 Oct 2015 07:27:56 BST using RSA key ID 20D9B392
# gpg: Good signature from "David Gibson <address@hidden>"
# gpg: aka "David Gibson (Red Hat) <address@hidden>"
# gpg: aka "David Gibson (ozlabs.org) <address@hidden>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-next-20151023: (21 commits)
prep: do not use CPU_LOG_IOPORT, convert to tracepoints
openpic: add to misc category
macio-nvram: add to misc category
macio: add to bridge category
uninorth: add to bridge category
macio-ide: add to storage category
cuda: add to bridge category
grackle: add to bridge category
escc: add to input category
cmd646: add to storage category
adb: add to input category
ppc/spapr: Add "ibm,pa-features" property to the device-tree
ppc: Add mmu_model defines for arch 2.03 and 2.07
hw/scsi/spapr_vscsi: Remove superfluous memset
spapr_pci: Allow VFIO devices to work on the normal PCI host bridge
spapr_iommu: Provide a function to switch a TCE table to allowing VFIO
spapr_iommu: Rename vfio_accel parameter
spapr_pci: Allow PCI host bridge DMA window to be configured
spapr: Add "slb-size" property to CPU device tree nodes
spapr: Abort when HTAB of requested size isn't allocated
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/431429a5b802...147482ae35b8
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