[Qemu-commits] [qemu/qemu] 765b84: tcg: Rename debug_insn_start to insn_start

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 765b842adec4c5a359e69ca08785553599f71496
      
https://github.com/qemu/qemu/commit/765b842adec4c5a359e69ca08785553599f71496
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-alpha/translate.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-cris/translate_v10.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-tilegx/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg.c
    M tci.c

  Log Message:
  -----------
  tcg: Rename debug_insn_start to insn_start

With an eye toward making it mandatory.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96
      
https://github.com/qemu/qemu/commit/667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-alpha/translate.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-cris/translate_v10.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-tilegx/translate.c
    M target-tricore/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c

  Log Message:
  -----------
  target-*: Unconditionally emit tcg_gen_insn_start

While we're at it, emit the opcode adjacent to where we currently
record data for search_pc.  This puts gen_io_start et al on the
"correct" side of the marker.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 959082fc4a93a016a6b697e1e0c2b373d8a3a373
      
https://github.com/qemu/qemu/commit/959082fc4a93a016a6b697e1e0c2b373d8a3a373
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-alpha/translate.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-tilegx/translate.c
    M target-tricore/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c

  Log Message:
  -----------
  target-*: Increment num_insns immediately after tcg_gen_insn_start

This does tidy the icount test common to all targets.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: b933066ae03d924a92b2616b4a24e7d91cd5b841
      
https://github.com/qemu/qemu/commit/b933066ae03d924a92b2616b4a24e7d91cd5b841
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/qom/cpu.h
    M target-alpha/translate.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c

  Log Message:
  -----------
  target-*: Introduce and use cpu_breakpoint_test

Reduce the boilerplate required for each target.  At the same time,
move the test for breakpoint after calling tcg_gen_insn_start.

Note that arm and aarch64 do not use cpu_breakpoint_test, but still
move the inline test down after tcg_gen_insn_start.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 9aef40ed1f6e2bd794bbb3ba8c8b773e506334c9
      
https://github.com/qemu/qemu/commit/9aef40ed1f6e2bd794bbb3ba8c8b773e506334c9
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Allow extra data to be attached to insn_start

With an eye toward having this data replace the gen_opc_* arrays
that each target collects in order to enable restore_state_from_tb.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 52e971d9ff67e340ac2a86bd67e14bd31c7991e0
      
https://github.com/qemu/qemu/commit/52e971d9ff67e340ac2a86bd67e14bd31c7991e0
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/translate-a64.c
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Add condexec state to insn_start

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2066d09516ba34d0d180fdea451436d9babb3308
      
https://github.com/qemu/qemu/commit/2066d09516ba34d0d180fdea451436d9babb3308
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-i386/cpu.h
    M target-i386/translate.c

  Log Message:
  -----------
  target-i386: Add cc_op state to insn_start

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c20d594e45bc8c4b21be1a7637cba0f279f72879
      
https://github.com/qemu/qemu/commit/c20d594e45bc8c4b21be1a7637cba0f279f72879
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-mips/cpu.h
    M target-mips/translate.c

  Log Message:
  -----------
  target-mips: Add delayed branch state to insn_start

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: a3fd522048f6728d8259e14596c9632c7c67305a
      
https://github.com/qemu/qemu/commit/a3fd522048f6728d8259e14596c9632c7c67305a
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-s390x/cpu.h
    M target-s390x/translate.c

  Log Message:
  -----------
  target-s390x: Add cc_op state to insn_start

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 07f3c16ced2b869228d58683c1dea06e3e1c9aa5
      
https://github.com/qemu/qemu/commit/07f3c16ced2b869228d58683c1dea06e3e1c9aa5
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-sh4/cpu.h
    M target-sh4/translate.c

  Log Message:
  -----------
  target-sh4: Add flags state to insn_start

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: bd03c791a6ed1bb7aec17df15cfeea649362e8fd
      
https://github.com/qemu/qemu/commit/bd03c791a6ed1bb7aec17df15cfeea649362e8fd
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-cris/translate.c

  Log Message:
  -----------
  target-cris: Mirror gen_opc_pc into insn_start

This perhaps isn't ideal in terms of (ab)using the "pc" field
to encode both pc and ppc + delay branch state, as one has to
be aware of this when examining opcode dumps.

But it preserves existing logic, which will be good for bisection,
and it certainly does save storage space.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: bfa31b765798139804ce9e5e35c7e142d233df31
      
https://github.com/qemu/qemu/commit/bfa31b765798139804ce9e5e35c7e142d233df31
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-sparc/translate.c

  Log Message:
  -----------
  target-sparc: Tidy gen_branch_a interface

We always pass pc2 == dc->npc and r_cond == cpu_cond,
and always set is_br afterward.  Infer all of that.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2bf2e019ed0a6349220620240c0ba807846793b9
      
https://github.com/qemu/qemu/commit/2bf2e019ed0a6349220620240c0ba807846793b9
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-sparc/translate.c

  Log Message:
  -----------
  target-sparc: Split out gen_branch_n

Unify three copies of this code from different
branch types.  Fix the case when npc == DYNAMIC_PC,
i.e. a branch within a delay slot.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6c42444f9a53b6af39d46008cb9f650b11e96cb9
      
https://github.com/qemu/qemu/commit/6c42444f9a53b6af39d46008cb9f650b11e96cb9
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-sparc/translate.c

  Log Message:
  -----------
  target-sparc: Remove gen_opc_jump_pc

Since jump_pc[1] is always npc + 4, we can infer after incrementing
that jump_pc[1] == pc + 4.  Because of that, we can encode the branch
destination into a single word, and store that in npc.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: a3d5ad761cafc669e25f4185e63d8d758a989135
      
https://github.com/qemu/qemu/commit/a3d5ad761cafc669e25f4185e63d8d758a989135
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-sparc/cpu.h
    M target-sparc/translate.c

  Log Message:
  -----------
  target-sparc: Add npc state to insn_start

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: fec88f64bda27846add83e924c8f4def9d94e068
      
https://github.com/qemu/qemu/commit/fec88f64bda27846add83e924c8f4def9d94e068
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h
    M translate-all.c

  Log Message:
  -----------
  tcg: Merge cpu_gen_code into tb_gen_code

As it's only caller, this tidies things a bit.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: dc03246cc377268db63abc8c5663ef571aec2eea
      
https://github.com/qemu/qemu/commit/dc03246cc377268db63abc8c5663ef571aec2eea
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-alpha/cpu.h
    M target-arm/cpu.h
    M target-cris/cpu.h
    M target-i386/cpu.h
    M target-lm32/cpu.h
    M target-m68k/cpu.h
    M target-microblaze/cpu.h
    M target-mips/cpu.h
    M target-moxie/cpu.h
    M target-openrisc/cpu.h
    M target-ppc/cpu.h
    M target-s390x/cpu.h
    M target-sh4/cpu.h
    M target-sparc/cpu.h
    M target-tilegx/cpu.h
    M target-xtensa/cpu.h

  Log Message:
  -----------
  target-*: Drop cpu_gen_code define

This symbol no longer exists.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 190ce7fbc79fd0883a6170d7f30da59d366e6830
      
https://github.com/qemu/qemu/commit/190ce7fbc79fd0883a6170d7f30da59d366e6830
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-alpha/translate.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-tilegx/translate.c
    M target-tricore/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Add TCG_MAX_INSNS

Adjust all translators to respect it.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: bad729e272387de7dbfa3ec4319036552fc6c107
      
https://github.com/qemu/qemu/commit/bad729e272387de7dbfa3ec4319036552fc6c107
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h
    M target-alpha/translate.c
    M target-arm/translate.c
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-tilegx/translate.c
    M target-tricore/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c
    M tcg/tcg.c
    M tcg/tcg.h
    M translate-all.c

  Log Message:
  -----------
  tcg: Pass data argument to restore_state_to_opc

The gen_opc_* arrays are already redundant with the data stored in
the insn_start arguments.  Transition restore_state_to_opc to use
data from the latter.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: fca8a500d519a56abeaedf8073167a61d3c6b9c4
      
https://github.com/qemu/qemu/commit/fca8a500d519a56abeaedf8073167a61d3c6b9c4
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h
    M tcg/tcg.c
    M tcg/tcg.h
    M translate-all.c

  Log Message:
  -----------
  tcg: Save insn data and use it in cpu_restore_state_from_tb

We can now restore state without retranslation.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 4e5e1215156662b2b153255c49d4640d82c5568b
      
https://github.com/qemu/qemu/commit/4e5e1215156662b2b153255c49d4640d82c5568b
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h
    M target-alpha/translate.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-arm/translate.h
    M target-cris/translate.c
    M target-i386/translate.c
    M target-lm32/translate.c
    M target-m68k/translate.c
    M target-microblaze/translate.c
    M target-mips/translate.c
    M target-moxie/translate.c
    M target-openrisc/translate.c
    M target-ppc/translate.c
    M target-s390x/translate.c
    M target-sh4/translate.c
    M target-sparc/translate.c
    M target-tilegx/translate.c
    M target-tricore/translate.c
    M target-unicore32/translate.c
    M target-xtensa/translate.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Remove gen_intermediate_code_pc

It is no longer used, so tidy up everything reached by it.
This includes the gen_opc_* arrays, the search_pc parameter
and the inline gen_intermediate_code_internal functions.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 04fe64000162c45d8974da9ca4d266f8d0e67eb7
      
https://github.com/qemu/qemu/commit/04fe64000162c45d8974da9ca4d266f8d0e67eb7
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M tcg/tcg.c
    M tcg/tcg.h

  Log Message:
  -----------
  tcg: Remove tcg_gen_code_search_pc

It's no longer used, so tidy up everything reached by it.

Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8163b74938d8b7d12e70597c4553dd0dc49443d5
      
https://github.com/qemu/qemu/commit/8163b74938d8b7d12e70597c4553dd0dc49443d5
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M tcg/tcg.c
    M translate-all.c

  Log Message:
  -----------
  tcg: Emit prologue to the beginning of code_gen_buffer

By putting the prologue at the end, we risk overwriting the
prologue should our estimate of maximum TB size.  Given the
two different placements of the call to tcg_prologue_init,
move the high water mark computation into tcg_prologue_init.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f293709c6af7a65a9bcec09cdba7a60183657a3e
      
https://github.com/qemu/qemu/commit/f293709c6af7a65a9bcec09cdba7a60183657a3e
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M translate-all.c

  Log Message:
  -----------
  tcg: Allocate a guard page after code_gen_buffer

This will catch any overflow of the buffer.

Add a native win32 alternative for alloc_code_gen_buffer;
remove the malloc alternative.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: b125f9dc7bd68cd4c57189db4da83b0620b28a72
      
https://github.com/qemu/qemu/commit/b125f9dc7bd68cd4c57189db4da83b0620b28a72
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h
    M tcg/tcg.c
    M tcg/tcg.h
    M translate-all.c

  Log Message:
  -----------
  tcg: Check for overflow via highwater mark

We currently pre-compute an worst case code size for any TB, which
works out to be 122kB.  Since the average TB size is near 1kB, this
wastes quite a lot of storage.

Instead, check for overflow in between generating code for each opcode.
The overhead of the check isn't measurable and wastage is minimized.

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 126d89e8cdfa3be15d51f76906eaccbcd0023f98
      
https://github.com/qemu/qemu/commit/126d89e8cdfa3be15d51f76906eaccbcd0023f98
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h

  Log Message:
  -----------
  tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE

At present, the "average" guestimate of TB size is way too small, leading
to many unused entries in the pre-allocated TB array.  For a guest with 1GB
ram, we're currently allocating 256MB for the array.

Survey arm, alpha, aarch64, ppc, sparc, i686, x86_64 guests running on
x86_64 and ppc64 hosts and select a new average.  The size of the array
drops to 81MB with no more flushing than before.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 31c9bd164ddb653915b9029ba0edd40cd57530d9
      
https://github.com/qemu/qemu/commit/31c9bd164ddb653915b9029ba0edd40cd57530d9
  Author: Peter Maydell <address@hidden>
  Date:   2015-10-08 (Thu, 08 Oct 2015)

  Changed paths:
    M include/exec/exec-all.h
    M include/qom/cpu.h
    M target-alpha/cpu.h
    M target-alpha/translate.c
    M target-arm/cpu.h
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-arm/translate.h
    M target-cris/cpu.h
    M target-cris/translate.c
    M target-cris/translate_v10.c
    M target-i386/cpu.h
    M target-i386/translate.c
    M target-lm32/cpu.h
    M target-lm32/translate.c
    M target-m68k/cpu.h
    M target-m68k/translate.c
    M target-microblaze/cpu.h
    M target-microblaze/translate.c
    M target-mips/cpu.h
    M target-mips/translate.c
    M target-moxie/cpu.h
    M target-moxie/translate.c
    M target-openrisc/cpu.h
    M target-openrisc/translate.c
    M target-ppc/cpu.h
    M target-ppc/translate.c
    M target-s390x/cpu.h
    M target-s390x/translate.c
    M target-sh4/cpu.h
    M target-sh4/translate.c
    M target-sparc/cpu.h
    M target-sparc/translate.c
    M target-tilegx/cpu.h
    M target-tilegx/translate.c
    M target-tricore/translate.c
    M target-unicore32/translate.c
    M target-xtensa/cpu.h
    M target-xtensa/translate.c
    M tcg/tcg-op.h
    M tcg/tcg-opc.h
    M tcg/tcg.c
    M tcg/tcg.h
    M tci.c
    M translate-all.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151007' into staging

Do away with TB retranslation

# gpg: Signature made Wed 07 Oct 2015 10:42:08 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"

* remotes/rth/tags/pull-tcg-20151007: (26 commits)
  tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE
  tcg: Check for overflow via highwater mark
  tcg: Allocate a guard page after code_gen_buffer
  tcg: Emit prologue to the beginning of code_gen_buffer
  tcg: Remove tcg_gen_code_search_pc
  tcg: Remove gen_intermediate_code_pc
  tcg: Save insn data and use it in cpu_restore_state_from_tb
  tcg: Pass data argument to restore_state_to_opc
  tcg: Add TCG_MAX_INSNS
  target-*: Drop cpu_gen_code define
  tcg: Merge cpu_gen_code into tb_gen_code
  target-sparc: Add npc state to insn_start
  target-sparc: Remove gen_opc_jump_pc
  target-sparc: Split out gen_branch_n
  target-sparc: Tidy gen_branch_a interface
  target-cris: Mirror gen_opc_pc into insn_start
  target-sh4: Add flags state to insn_start
  target-s390x: Add cc_op state to insn_start
  target-mips: Add delayed branch state to insn_start
  target-i386: Add cc_op state to insn_start
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/ca4e4b828489...31c9bd164ddb