[Qemu-commits] [qemu/qemu] 055130: target-tilegx: Tidy simd

qemu-commits
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] 055130: target-tilegx: Tidy simd_helper.c

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 055130: target-tilegx: Tidy simd_helper.c
Date:	Thu, 08 Oct 2015 06:30:05 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 055130107683c3b199c1848a25e5e2c568230cbf
      
https://github.com/qemu/qemu/commit/055130107683c3b199c1848a25e5e2c568230cbf
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/simd_helper.c

  Log Message:
  -----------
  target-tilegx: Tidy simd_helper.c

Using the V1 macro when we want to replicate a byte across
the 8 elements of the word.  Using deposit and extract for
manipulating specific elements.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0ab0a3d768a4f6ab6747b6fd936c5cf70b5069c2
      
https://github.com/qemu/qemu/commit/0ab0a3d768a4f6ab6747b6fd936c5cf70b5069c2
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/helper.h
    M target-tilegx/simd_helper.c
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement v*shl, v*shru, and v*shrs instructions

v2sh* are implemented with helper functions; v4sh* are implmeneted
with inline code.

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c6876d7e1c3ff04a9b9f751f6260bf427ab8cf1a
      
https://github.com/qemu/qemu/commit/c6876d7e1c3ff04a9b9f751f6260bf427ab8cf1a
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement v*add and v*sub instructions

[rth: Implement everything inline; handle v1addi and v2addi as well.]

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 38c949ffe7497b1d833bca5f70b22c87df9bd567
      
https://github.com/qemu/qemu/commit/38c949ffe7497b1d833bca5f70b22c87df9bd567
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/helper.h
    M target-tilegx/simd_helper.c
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement v1multu instruction

Signed-off-by: Chen Gang <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ba1fc78f65fdea9d4b14d6449514c1351ad64fa4
      
https://github.com/qemu/qemu/commit/ba1fc78f65fdea9d4b14d6449514c1351ad64fa4
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/helper.c
    M target-tilegx/helper.h
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement crc instructions

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0b4232f10895e863b1759a93ba0d0a1b3380dc31
      
https://github.com/qemu/qemu/commit/0b4232f10895e863b1759a93ba0d0a1b3380dc31
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement table index instructions

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 9ff5b57c219f38f025b95ebf4b593b5d4e828b53
      
https://github.com/qemu/qemu/commit/9ff5b57c219f38f025b95ebf4b593b5d4e828b53
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/helper.c
    M target-tilegx/helper.h
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement complex multiply instructions

Signed-off-by: Richard Henderson <address@hidden>


  Commit: f723287944c30f1bf230f08b4fb03d6d11a16504
      
https://github.com/qemu/qemu/commit/f723287944c30f1bf230f08b4fb03d6d11a16504
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Let x1 pipe process bpt instruction only

According to the related document, bpt can be only in x1 pipe.

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: de2fdd56b11f4207e6614ee2f56039ef240399f1
      
https://github.com/qemu/qemu/commit/de2fdd56b11f4207e6614ee2f56039ef240399f1
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M linux-user/syscall_defs.h

  Log Message:
  -----------
  linux-user/syscall_defs.h: Sync the latest si_code from Linux kernel

They content several new macro members, also contents TARGET_N*.

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: bf0f60a61b92f4f9ddf09a3cf4fc41796fa42aed
      
https://github.com/qemu/qemu/commit/bf0f60a61b92f4f9ddf09a3cf4fc41796fa42aed
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M linux-user/signal.c
    M linux-user/tilegx/syscall.h

  Log Message:
  -----------
  linux-user/tilegx: Implement tilegx signal features

[rth: Remove the spreg[EX1] handling, as it's irrelevant to user-mode.]

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: dd8070d865ad1b32876931f812a80645f97112ff
      
https://github.com/qemu/qemu/commit/dd8070d865ad1b32876931f812a80645f97112ff
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M linux-user/main.c
    M target-tilegx/cpu.h
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Decode ill pseudo-instructions

Notice raise and bpt, decoding the constants embedded in the
nop addil instruction in the x0 slot.

[rth: Generalize TILEGX_EXCP_OPCODE_ILL to TILEGX_EXCP_SIGNAL.
Drop validation of signal values.]

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: a0577d2aa9bd42d5d584fa03649a166ba45c2f3d
      
https://github.com/qemu/qemu/commit/a0577d2aa9bd42d5d584fa03649a166ba45c2f3d
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M linux-user/main.c
    M target-tilegx/cpu.c
    M target-tilegx/cpu.h

  Log Message:
  -----------
  target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV

Consolidate signal handling under a single exception.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 95df61e6238c79c2dc14f2bffa76abb2bd3acba7
      
https://github.com/qemu/qemu/commit/95df61e6238c79c2dc14f2bffa76abb2bd3acba7
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Fix a typo for mnemonic about "ld_add"

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 133b84c819166a6da1425a007cf44d7a96d507a4
      
https://github.com/qemu/qemu/commit/133b84c819166a6da1425a007cf44d7a96d507a4
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Handle nofault prefetch instructions

These are mapped onto some of the normal load instructions, when the
destination is the zero register.  Other load insns do fault even
when targeting the zero register.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 78affcb798516dcb5d44a7ed598d79dcd42cd988
      
https://github.com/qemu/qemu/commit/78affcb798516dcb5d44a7ed598d79dcd42cd988
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement v2sh* instructions

It is just according to v1sh* instructions implementation.

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: aaf893a6ad6c7c0a986638ba599000e13f9f4182
      
https://github.com/qemu/qemu/commit/aaf893a6ad6c7c0a986638ba599000e13f9f4182
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/helper.h
    M target-tilegx/simd_helper.c
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement v?int_* instructions.

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: a419e22d703667211521d4257df294047c13eca3
      
https://github.com/qemu/qemu/commit/a419e22d703667211521d4257df294047c13eca3
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/helper.h
    M target-tilegx/simd_helper.c
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Implement v2mults instruction

Signed-off-by: Chen Gang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 77b3adc0012153e629b48b710ad19a8b544bb507
      
https://github.com/qemu/qemu/commit/77b3adc0012153e629b48b710ad19a8b544bb507
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and 
TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly

For some cases, they are for TILEGX_EXCP_OPCODE_UNKNOWN, not for
TILEGX_EXCP_OPCODE_UNIMPLEMENTED.

Also for some cases, they are for TILEGX_EXCP_OPCODE_UNIMPLEMENTED, not
for TILEGX_EXCP_OPCODE_UNKNOWN.

When analyzing issues, the correct printing information is necessary,
e.g. grep UIMP in gcc testsuite output log for finding qemu tilegx
umimplementation issues, grep UNKNOWN for finding unknown instructions.

Signed-off-by: Chen Gang <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: fec7daab3d63b7b2ca61581fffc40142b22b2bd5
      
https://github.com/qemu/qemu/commit/fec7daab3d63b7b2ca61581fffc40142b22b2bd5
  Author: Chen Gang <address@hidden>
  Date:   2015-10-07 (Wed, 07 Oct 2015)

  Changed paths:
    M target-tilegx/cpu.h
    M target-tilegx/helper.c
    M target-tilegx/helper.h
    M target-tilegx/translate.c

  Log Message:
  -----------
  target-tilegx: Support iret instruction and related special registers

EX_CONTEXT_0_0 is used for jumping address, and EX_CONTEXT_0_1 is for
INTERRUPT_CRITICAL_SECTION, which should only be 0 or 1 in user mode, or
it will cause target SIGILL (and the patch doesn't support system mode).

Signed-off-by: Chen Gang <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ca4e4b82848982311a40d0937c1de9db1108fdb0
      
https://github.com/qemu/qemu/commit/ca4e4b82848982311a40d0937c1de9db1108fdb0
  Author: Peter Maydell <address@hidden>
  Date:   2015-10-08 (Thu, 08 Oct 2015)

  Changed paths:
    M linux-user/main.c
    M linux-user/signal.c
    M linux-user/syscall_defs.h
    M linux-user/tilegx/syscall.h
    M target-tilegx/cpu.c
    M target-tilegx/cpu.h
    M target-tilegx/helper.c
    M target-tilegx/helper.h
    M target-tilegx/simd_helper.c
    M target-tilegx/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tile-20151007' into 
staging

Collected patches

# gpg: Signature made Wed 07 Oct 2015 10:30:17 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"

* remotes/rth/tags/pull-tile-20151007:
  target-tilegx: Support iret instruction and related special registers
  target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and 
TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly
  target-tilegx: Implement v2mults instruction
  target-tilegx: Implement v?int_* instructions.
  target-tilegx: Implement v2sh* instructions
  target-tilegx: Handle nofault prefetch instructions
  target-tilegx: Fix a typo for mnemonic about "ld_add"
  target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV
  target-tilegx: Decode ill pseudo-instructions
  linux-user/tilegx: Implement tilegx signal features
  linux-user/syscall_defs.h: Sync the latest si_code from Linux kernel
  target-tilegx: Let x1 pipe process bpt instruction only
  target-tilegx: Implement complex multiply instructions
  target-tilegx: Implement table index instructions
  target-tilegx: Implement crc instructions
  target-tilegx: Implement v1multu instruction
  target-tilegx: Implement v*add and v*sub instructions
  target-tilegx: Implement v*shl, v*shru, and v*shrs instructions
  target-tilegx: Tidy simd_helper.c

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/fb6345f452ba...ca4e4b828489
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-commits] [qemu/qemu] 055130: target-tilegx: Tidy simd_helper.c, GitHub <=
Prev by Date: [Qemu-commits] [qemu/qemu] af3c15: pc-bios/s390-ccw: avoid floating point operations
Next by Date: [Qemu-commits] [qemu/qemu] 58892b: hw/vfio/platform: irqfd setup sequence update
Previous by thread: [Qemu-commits] [qemu/qemu] af3c15: pc-bios/s390-ccw: avoid floating point operations
Next by thread: [Qemu-commits] [qemu/qemu] 58892b: hw/vfio/platform: irqfd setup sequence update
Index(es):
- Date
- Thread