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[Qemu-commits] [qemu/qemu] ed2561: cpu: Introduce X86CPUTopoInfo structu

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] ed2561: cpu: Introduce X86CPUTopoInfo structure for argume...
Date: Tue, 06 Oct 2015 07:00:05 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: ed256144cd6f0ca2ff59fc3fc8dca547506f433b
      
https://github.com/qemu/qemu/commit/ed256144cd6f0ca2ff59fc3fc8dca547506f433b
  Author: Chen Fan <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M hw/i386/pc.c
    M include/hw/i386/topology.h

  Log Message:
  -----------
  cpu: Introduce X86CPUTopoInfo structure for argument simplification

In order to simplify arguments of function, introduce a new struct
named X86CPUTopoInfo.

Signed-off-by: Chen Fan <address@hidden>
Signed-off-by: Zhu Guihua <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: a32ef3bfc12c8d0588f43f74dcc5280885bbdb30
      
https://github.com/qemu/qemu/commit/a32ef3bfc12c8d0588f43f74dcc5280885bbdb30
  Author: Thomas Huth <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M vl.c

  Log Message:
  -----------
  vl: Add another sanity check to smp_parse() function

The code in smp_parse already checks the topology information for
sockets * cores * threads < cpus and bails out with an error in
that case. However, it is still possible to supply a bad configuration
the other way round, e.g. with:

 qemu-system-xxx -smp 4,sockets=1,cores=4,threads=2

QEMU then still starts the guest, with topology configuration that
is rather incomprehensible and likely not what the user wanted.
So let's add another check to refuse such wrong configurations.

Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Acked-by: Cornelia Huck <address@hidden>
Acked-by: Bastian Koppelmann <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 5114e8422201190c3e2e1a4d77e38ad70cf001d2
      
https://github.com/qemu/qemu/commit/5114e8422201190c3e2e1a4d77e38ad70cf001d2
  Author: Eduardo Habkost <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M target-i386/cpu.c
    M target-i386/cpu.h

  Log Message:
  -----------
  target-i386: Convert kvm_default_*features to property/value pairs

Convert the kvm_default_features and kvm_default_unset_features arrays
into a simple list of property/value pairs that will be applied to
X86CPU objects when using KVM.

Acked-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: ba4b5c65a98ea91dc3b13e42dd9404808c999dda
      
https://github.com/qemu/qemu/commit/ba4b5c65a98ea91dc3b13e42dd9404808c999dda
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M target-i386/Makefile.objs
    A target-i386/bpt_helper.c
    M target-i386/helper.c
    M target-i386/misc_helper.c

  Log Message:
  -----------
  target-i386: Move breakpoint related functions to new file

Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: dd941cdcfec536aad6a310a153778142ed9f3e92
      
https://github.com/qemu/qemu/commit/dd941cdcfec536aad6a310a153778142ed9f3e92
  Author: Richard Henderson <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M target-i386/bpt_helper.c
    M target-i386/cpu.h

  Log Message:
  -----------
  target-i386: Make check_hw_breakpoints static

The function is now only used from within a single file.

Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: c9b8f6b6210847b4381c5b2ee172b1c7eb9985d6
      
https://github.com/qemu/qemu/commit/c9b8f6b6210847b4381c5b2ee172b1c7eb9985d6
  Author: Amit Shah <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M target-i386/kvm.c

  Log Message:
  -----------
  target-i386: get/put MSR_TSC_AUX across reset and migration

There's one report of migration breaking due to missing MSR_TSC_AUX
save/restore.  Fix this by adding a new subsection that saves the state
of this MSR.

https://bugzilla.redhat.com/show_bug.cgi?id=1261797

Reported-by: Xiaoqing Wei <address@hidden>
Signed-off-by: Amit Shah <address@hidden>
CC: Paolo Bonzini <address@hidden>
CC: Juan Quintela <address@hidden>
CC: "Dr. David Alan Gilbert" <address@hidden>
CC: Marcelo Tosatti <address@hidden>
CC: Richard Henderson <address@hidden>
CC: Eduardo Habkost <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: becb66673ec30cb604926d247ab9449a60ad8b11
      
https://github.com/qemu/qemu/commit/becb66673ec30cb604926d247ab9449a60ad8b11
  Author: Paolo Bonzini <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M include/hw/i386/pc.h
    M target-i386/cpu.c

  Log Message:
  -----------
  target-i386: add ABM to Haswell* and Broadwell* CPU models

ABM is only implemented as a single instruction set by AMD; all AMD
processors support both instructions or neither. Intel considers POPCNT
as part of SSE4.2, and LZCNT as part of BMI1, but Intel also uses AMD's
ABM flag to indicate support for both POPCNT and LZCNT.  It has to be
added to Haswell and Broadwell because Haswell, by adding LZCNT, has
completed the ABM.

Tested with "qemu-kvm -cpu Haswell-noTSX,enforce" (and also with older
machine types) on an Haswell-EP machine.

Signed-off-by: Paolo Bonzini <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 2188cc52cb363433751f72b991d8fb05fc60e39d
      
https://github.com/qemu/qemu/commit/2188cc52cb363433751f72b991d8fb05fc60e39d
  Author: Bill Paul <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M target-i386/cpu.h

  Log Message:
  -----------
  Correctly re-init EFER state during INIT IPI

When doing a re-initialization of a CPU core, the default state is to _not_
have 64-bit long mode enabled. This means the LME (long mode enable) and LMA
(long mode active) bits in the EFER model-specific register should be cleared.

However, the EFER state is part of the CPU environment which is
preserved by do_cpu_init(), so if EFER.LME and EFER.LMA were set at the
time an INIT IPI was received, they will remain set after the init completes.

This is contrary to what the Intel architecture manual describes and what
happens on real hardware, and it leaves the CPU in a weird state that the
guest can't clear.

To fix this, the 'efer' member of the CPUX86State structure has been moved
to an area outside the region preserved by do_cpu_init(), so that it can
be properly re-initialized by x86_cpu_reset().

Signed-off-by: Bill Paul <address@hidden>
CC: Paolo Bonzini <address@hidden>
CC: Richard Henderson <address@hidden>
CC: Eduardo Habkost <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 8d42d2d32b508484106f1c600f5cdd5496bc867e
      
https://github.com/qemu/qemu/commit/8d42d2d32b508484106f1c600f5cdd5496bc867e
  Author: Chen Fan <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M hw/i386/pc.c
    M hw/intc/apic_common.c
    M target-i386/cpu.c

  Log Message:
  -----------
  apic: move APIC's MMIO region mapping into APIC

When ICC bus/bridge is removed, APIC MMIO will be left
unmapped since it was mapped into system's address space
indirectly by ICC bridge.
Fix it by moving mapping into APIC code, so it would be
possible to remove ICC bus/bridge code later.

Signed-off-by: Chen Fan <address@hidden>
Signed-off-by: Zhu Guihua <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: ae50c55a09b8a90205972518d8129447000ae188
      
https://github.com/qemu/qemu/commit/ae50c55a09b8a90205972518d8129447000ae188
  Author: Zhu Guihua <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M hw/i386/pc.c

  Log Message:
  -----------
  x86: use new method to correct reset sequence

During reset some devices (such as hpet, rtc) might send IRQ to APIC
which changes APIC's state from default one it's supposed to have
at machine startup time.
Fix this by resetting APIC after devices have been reset to cancel
any changes that qemu_devices_reset() might have done to its state.

Signed-off-by: Zhu Guihua <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 46232aaacb66733d3e16dcbd0d26c32ec388801d
      
https://github.com/qemu/qemu/commit/46232aaacb66733d3e16dcbd0d26c32ec388801d
  Author: Chen Fan <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M hw/intc/apic_common.c
    M include/hw/i386/apic_internal.h
    M include/hw/i386/pc.h
    M target-i386/cpu.c

  Log Message:
  -----------
  cpu/apic: drop icc bus/bridge

After CPU hotplug has been converted to BUS-less hot-plug infrastructure,
the only function ICC bus performs is to propagate reset to LAPICs. However
LAPIC could be reset by registering its reset handler after all device are
initialized.
Do so and drop ~30LOC of not needed anymore ICCBus related code.

Signed-off-by: Chen Fan <address@hidden>
Signed-off-by: Zhu Guihua <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: dfeb8679db358e1f8e0ee4dd84f903d71f000378
      
https://github.com/qemu/qemu/commit/dfeb8679db358e1f8e0ee4dd84f903d71f000378
  Author: Zhu Guihua <address@hidden>
  Date:   2015-10-02 (Fri, 02 Oct 2015)

  Changed paths:
    M default-configs/i386-softmmu.mak
    M default-configs/x86_64-softmmu.mak
    M hw/cpu/Makefile.objs
    R hw/cpu/icc_bus.c
    R include/hw/cpu/icc_bus.h

  Log Message:
  -----------
  icc_bus: drop the unused files

ICC bus impl has been droped, so all icc related files are not useful
any more; delete them.

Signed-off-by: Zhu Guihua <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 5fdb4671b08e0d1631447e81348b2b50a6b85bf7
      
https://github.com/qemu/qemu/commit/5fdb4671b08e0d1631447e81348b2b50a6b85bf7
  Author: Peter Maydell <address@hidden>
  Date:   2015-10-06 (Tue, 06 Oct 2015)

  Changed paths:
    M default-configs/i386-softmmu.mak
    M default-configs/x86_64-softmmu.mak
    M hw/cpu/Makefile.objs
    R hw/cpu/icc_bus.c
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M hw/intc/apic_common.c
    R include/hw/cpu/icc_bus.h
    M include/hw/i386/apic_internal.h
    M include/hw/i386/pc.h
    M include/hw/i386/topology.h
    M target-i386/Makefile.objs
    A target-i386/bpt_helper.c
    M target-i386/cpu.c
    M target-i386/cpu.h
    M target-i386/helper.c
    M target-i386/kvm.c
    M target-i386/misc_helper.c
    M vl.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into 
staging

X86 queue, 2015-10-05

# gpg: Signature made Mon 05 Oct 2015 17:04:38 BST using RSA key ID 984DC5A6
# gpg: Good signature from "Eduardo Habkost <address@hidden>"

* remotes/ehabkost/tags/x86-pull-request:
  icc_bus: drop the unused files
  cpu/apic: drop icc bus/bridge
  x86: use new method to correct reset sequence
  apic: move APIC's MMIO region mapping into APIC
  Correctly re-init EFER state during INIT IPI
  target-i386: add ABM to Haswell* and Broadwell* CPU models
  target-i386: get/put MSR_TSC_AUX across reset and migration
  target-i386: Make check_hw_breakpoints static
  target-i386: Move breakpoint related functions to new file
  target-i386: Convert kvm_default_*features to property/value pairs
  vl: Add another sanity check to smp_parse() function
  cpu: Introduce X86CPUTopoInfo structure for argument simplification

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/006d5c741bbf...5fdb4671b08e
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