[Qemu-commits] [qemu/qemu] e72c4f: tcg/mips: fix TLB loading for BE host with 32-bit ...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: e72c4fb81db52be881c9356f1c60e0a7817d2d32
      
https://github.com/qemu/qemu/commit/e72c4fb81db52be881c9356f1c60e0a7817d2d32
  Author: Aurelien Jarno <address@hidden>
  Date:   2015-08-01 (Sat, 01 Aug 2015)

  Changed paths:
    M tcg/mips/tcg-target.c

  Log Message:
  -----------
  tcg/mips: fix TLB loading for BE host with 32-bit guests

For 32-bit guest, we load a 32-bit address from the TLB, so there is no
need to compensate for the low or high part. This fixes 32-bit guests on
big-endian hosts.

Cc: address@hidden
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 4214a8cb7c15ec43d4b2a43ebf248b273a0f4d45
      
https://github.com/qemu/qemu/commit/4214a8cb7c15ec43d4b2a43ebf248b273a0f4d45
  Author: Aurelien Jarno <address@hidden>
  Date:   2015-08-01 (Sat, 01 Aug 2015)

  Changed paths:
    M tcg/mips/tcg-target.c

  Log Message:
  -----------
  tcg/mips: Mask TCGMemOp appropriately for indexing

Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG MIPS backend.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 3c8691f568f49bf623dcb2850464d4156d95e61b
      
https://github.com/qemu/qemu/commit/3c8691f568f49bf623dcb2850464d4156d95e61b
  Author: Aurelien Jarno <address@hidden>
  Date:   2015-08-01 (Sat, 01 Aug 2015)

  Changed paths:
    M tcg/s390/tcg-target.c

  Log Message:
  -----------
  tcg/s390x: Mask TCGMemOp appropriately for indexing

Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG S390 backend.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: c99d69694af4ed15b33e3f7c2e3ef6972c14358d
      
https://github.com/qemu/qemu/commit/c99d69694af4ed15b33e3f7c2e3ef6972c14358d
  Author: Aurelien Jarno <address@hidden>
  Date:   2015-08-01 (Sat, 01 Aug 2015)

  Changed paths:
    M tcg/mips/tcg-target.c

  Log Message:
  -----------
  tcg/mips: fix add2

The add2 code in the tcg_out_addsub2 function doesn't take into account
the case where rl == al == bl. In that case we can't compute the carry
after the addition. As it corresponds to a multiplication by 2, the
carry bit is the bit 31.

While this is a corner case, this prevents x86-64 guests to boot on a
MIPS host.

Cc: address@hidden
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: bd80b5963f58c601f31d3186b89887bf8e182fb5
      
https://github.com/qemu/qemu/commit/bd80b5963f58c601f31d3186b89887bf8e182fb5
  Author: Peter Maydell <address@hidden>
  Date:   2015-08-03 (Mon, 03 Aug 2015)

  Changed paths:
    M tcg/mips/tcg-target.c
    M tcg/s390/tcg-target.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/aurel/tags/pull-tcg-mips-s390-20150803' 
into staging

TCG MIPS and S390 fixes for 2.4.

# gpg: Signature made Mon Aug  3 09:09:59 2015 BST using RSA key ID 1DDD8C9B
# gpg: Good signature from "Aurelien Jarno <address@hidden>"
# gpg:                 aka "Aurelien Jarno <address@hidden>"
# gpg:                 aka "Aurelien Jarno <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7746 2642 A9EF 94FD 0F77  196D BA9C 7806 1DDD 8C9B

* remotes/aurel/tags/pull-tcg-mips-s390-20150803:
  tcg/mips: fix add2
  tcg/s390x: Mask TCGMemOp appropriately for indexing
  tcg/mips: Mask TCGMemOp appropriately for indexing
  tcg/mips: fix TLB loading for BE host with 32-bit guests

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/ff90f84e74d7...bd80b5963f58