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[Qemu-commits] [qemu/qemu] be1e50: dataplane: fix cross-endian issues
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[Qemu-commits] [qemu/qemu] be1e50: dataplane: fix cross-endian issues |
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Wed, 08 Jul 2015 07:00:05 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: be1e50a27d5b6845729ae0854f57f3816cf47edb
https://github.com/qemu/qemu/commit/be1e50a27d5b6845729ae0854f57f3816cf47edb
Author: Greg Kurz <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/virtio/dataplane/vring.c
Log Message:
-----------
dataplane: fix cross-endian issues
Accesses to vring_avail_event and vring_used_event must honor the queue
endianness.
This patch allows cross-endian setups to use dataplane (tested with ppc64
on ppc64le, and vice-versa).
Suggested-by: Cornelia Huck <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Reviewed-by: Cornelia Huck <address@hidden>
Commit: f329c74c1e7f08399f0d237f78571eb0ca6a89dd
https://github.com/qemu/qemu/commit/f329c74c1e7f08399f0d237f78571eb0ca6a89dd
Author: Cornelia Huck <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/virtio/dataplane/vring.c
Log Message:
-----------
Revert "dataplane: allow virtio-1 devices"
This reverts commit f5a5628cf0b65b223fa0c9031714578dfac4cf04.
This was an old patch that had been already superseded by b0e5d90eb
("dataplane: endianness-aware accesses").
Signed-off-by: Cornelia Huck <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Acked-by: Stefan Hajnoczi <address@hidden>
Commit: 71ba2f0af398f616e154137d9fdda25c2da01324
https://github.com/qemu/qemu/commit/71ba2f0af398f616e154137d9fdda25c2da01324
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M default-configs/i386-softmmu.mak
M default-configs/x86_64-softmmu.mak
M hw/acpi/Makefile.objs
Log Message:
-----------
acpi: split out ICH ACPI support
MIPS doesn't need it, and including it creates problem as we are adding
dependency on ISA LPC bridge.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 920557971b60e53c2f3f22e5d6c620ab1ed411fd
https://github.com/qemu/qemu/commit/920557971b60e53c2f3f22e5d6c620ab1ed411fd
Author: Paulo Alcantara <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/acpi/Makefile.objs
M hw/acpi/ich9.c
A hw/acpi/tco.c
M hw/i386/pc_q35.c
M hw/isa/lpc_ich9.c
M include/hw/acpi/ich9.h
A include/hw/acpi/tco.h
M include/hw/boards.h
M include/hw/i386/ich9.h
M include/hw/i386/pc.h
Log Message:
-----------
ich9: add TCO interface emulation
This interface provides some registers within a 32-byte range and can be
acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
It's commonly used as a watchdog timer to detect system lockups through
SMIs that are generated -- if TCO_EN bit is set -- on every timeout. If
NO_REBOOT bit is not set in GCS (General Control and Status register),
the system will be resetted upon second timeout if TCO_RLD register
wasn't previously written to prevent timeout.
This patch adds support to TCO watchdog logic and few other features
like mapping NMIs to SMIs (NMI2SMI_EN bit), system intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 45dcdb9da632b5a5e7639707e12b1b17029c5a1e
https://github.com/qemu/qemu/commit/45dcdb9da632b5a5e7639707e12b1b17029c5a1e
Author: Paulo Alcantara <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M tests/Makefile
A tests/tco-test.c
Log Message:
-----------
tests: add testcase for TCO watchdog emulation
This patch adds a testcase that covers the following:
1) TCO default values
2) first and second TCO timeout
3) watch and validate ticks counter through TCO_RLD register
4) maximum supported TCO timeout (0x3ff)
5) watchdog actions (pause/reset/shutdown/none) upon second TCO
timeout
6) set and get of TCO control and status bits
MST: The test does not pass yet, so it's disabled by default.
Signed-off-by: Paulo Alcantara <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 5add35bec1e249bb5345a47008c8f298d4760be4
https://github.com/qemu/qemu/commit/5add35bec1e249bb5345a47008c8f298d4760be4
Author: Paulo Alcantara <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/acpi/tco.c
M hw/isa/lpc_ich9.c
M include/hw/i386/ich9.h
M tests/tco-test.c
Log Message:
-----------
ich9: implement strap SPKR pin logic
If the signal is sampled high, this indicates that the system is
strapped to the "No Reboot" mode (ICH9 will disable the TCO Timer system
reboot feature). The status of this strap is readable via the NO_REBOOT
bit (CC: offset 0x3410:bit 5).
The NO_REBOOT bit is set when SPKR pin on ICH9 is sampled high. This bit
may be set or cleared by software if the strap is sampled low but may
not override the strap when it indicates "No Reboot".
This patch implements the logic where hardware has ability to set SPKR
pin through a property named "noreboot" and it's sampled high by
default.
Signed-off-by: Paulo Alcantara <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 7444ca4ee2382170774ae201c473270d65620d75
https://github.com/qemu/qemu/commit/7444ca4ee2382170774ae201c473270d65620d75
Author: Laszlo Ersek <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/i386/pc.c
Log Message:
-----------
hw/i386/pc: factor out pc_cmos_init_floppy()
Extract the pc_cmos_init_floppy() function from pc_cmos_init(). The
function sets two RTC registers: floppy drive types (0x10), overwriting
the earlier value in there), and REG_EQUIPMENT_BYTE (0x14), setting bits
in the prior value.
Cc: Jan Tomko <address@hidden>
Cc: John Snow <address@hidden>
Cc: Markus Armbruster <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Signed-off-by: Laszlo Ersek <address@hidden>
Reviewed-by: John Snow <address@hidden>
Reviewed-by: Markus Armbruster <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: b86f46132cd86b03f9e4a1cf6295f8b416e16afa
https://github.com/qemu/qemu/commit/b86f46132cd86b03f9e4a1cf6295f8b416e16afa
Author: Laszlo Ersek <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/i386/pc.c
Log Message:
-----------
hw/i386/pc: reflect any FDC @ ioport 0x3f0 in the CMOS
With the pc-q35-2.4 machine type, if the user creates an ISA FDC manually:
-device isa-fdc,driveA=drive-fdc0-0-0 \
-drive file=...,if=none,id=drive-fdc0-0-0,format=raw
then the board-default FDC will be skipped, and only the explicitly
requested FDC will exist. qtree-wise, this is correct; however such an FDC
is currently not registered in the CMOS, because that code is only reached
for the board-default FDC.
The pc_cmos_init_late() one-shot reset handler -- one-shot because the
CMOS is not reprogrammed during warm reset -- should search for any ISA
FDC devices, created implicitly (by board code) or explicitly, and set the
CMOS accordingly to the ISA FDC(s) with iobase=0x3f0:
- if there is no such FDC, report both drives absent,
- if there is exactly one such FDC, report its drives in the CMOS,
- if there are more than one such FDCs, then pick one (it is not specified
which one), and print a warning about the ambiguity.
Cc: Jan Tomko <address@hidden>
Cc: John Snow <address@hidden>
Cc: Markus Armbruster <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Reported-by: Jan Tomko <address@hidden>
Suggested-by: Markus Armbruster <address@hidden>
Signed-off-by: Laszlo Ersek <address@hidden>
Reviewed-by: John Snow <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 220a8846429ac954932e16010efb07af0aba4529
https://github.com/qemu/qemu/commit/220a8846429ac954932e16010efb07af0aba4529
Author: Laszlo Ersek <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M include/hw/i386/pc.h
Log Message:
-----------
hw/i386/pc: don't carry FDC from pc_basic_device_init() to pc_cmos_init()
Thanks to the last patch, pc_cmos_init() doesn't need the (optional)
board-default FDC any longer as an input parameter. Update
pc_basic_device_init() not to hand it back to pc_init1() / pc_q35_init(),
and update the latter not to carry the FDC to pc_cmos_init(). This
simplifies the code.
pc_init1() | pc_q35_init()
pc_basic_device_init()
pc_cmos_init()
Cc: Jan Tomko <address@hidden>
Cc: John Snow <address@hidden>
Cc: Markus Armbruster <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Signed-off-by: Laszlo Ersek <address@hidden>
Reviewed-by: John Snow <address@hidden>
Reviewed-by: Markus Armbruster <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: f56fc2d319b18d5e510988374929188867a5f930
https://github.com/qemu/qemu/commit/f56fc2d319b18d5e510988374929188867a5f930
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M include/hw/virtio/virtio-net.h
M include/standard-headers/linux/virtio_net.h
Log Message:
-----------
virtio_net: reuse constants from linux
VIRTIO_NET_F_CTRL_GUEST_OFFLOADS now appears in the
linux header, let's reuse it.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 412a82457ef54821362ba27804e24a92fce09761
https://github.com/qemu/qemu/commit/412a82457ef54821362ba27804e24a92fce09761
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M include/hw/pci/pci_regs.h
A include/standard-headers/linux/pci_regs.h
M scripts/update-linux-headers.sh
Log Message:
-----------
pci_regs.h: import from linux
It seems to make sense to import pci_regs.h from linux:
why maintain our own?
As a first step, move the header to standard-headers,
and add it to the update script.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: b2101eae63ea57b571cee4a9075a4287d24ba4a4
https://github.com/qemu/qemu/commit/b2101eae63ea57b571cee4a9075a4287d24ba4a4
Author: Benjamin Herrenschmidt <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/pci/pcie.c
Log Message:
-----------
pcie: Set the "link active" in the link status register
Some firmwares can test that and assume the device hasn't come
up if that bit isn't set
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: c36f24a2045d7a002b767ce023acfd9be63df692
https://github.com/qemu/qemu/commit/c36f24a2045d7a002b767ce023acfd9be63df692
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M include/standard-headers/linux/virtio_pci.h
Log Message:
-----------
virtio: define virtio_pci_cfg_cap in header.
Update virtio pci header from linux-next virtio maintainer tree.
We already have VIRTIO_PCI_CAP_PCI_CFG, let's define the structure
that goes with it.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: ada434cd0b44ce984318621e4bb79e067360d737
https://github.com/qemu/qemu/commit/ada434cd0b44ce984318621e4bb79e067360d737
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/virtio/virtio-pci.c
M hw/virtio/virtio-pci.h
Log Message:
-----------
virtio-pci: implement cfg capability
spec says we must, so let's do it!
Note: the implementation is incorrect for BE targets.
Will fix with a patch on top, not a big deal now as
the only user is seabios, used on x86 only.
Tested-by: Gerd Hoffmann <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 1e40356ce5f6ccfa0bb57104a533c62952c560ce
https://github.com/qemu/qemu/commit/1e40356ce5f6ccfa0bb57104a533c62952c560ce
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M hw/virtio/virtio-pci.c
Log Message:
-----------
virtio fix cfg endian-ness for BE targets
address_space_rw assumes data is in target format
and byte-swaps it if target is BE and device is LE.
Use fixed-endian LE APIs instead.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: c4fc82bf1ad088a84ccedf779f6aa928e4fadb5f
https://github.com/qemu/qemu/commit/c4fc82bf1ad088a84ccedf779f6aa928e4fadb5f
Author: Michael S. Tsirkin <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M tests/Makefile
M tests/tco-test.c
Log Message:
-----------
tco-test: fix up config accesses and re-enable
The mistake that made the test fail was that it tried to
use a BAR address as an offset for config accesses to LPC.
Config accesses don't need a BAR, and LPC does not have one. Don't
attempt to map it.
With this change applied, TCO test passes, so re-enable it.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: c8232b39bb18a91cde39b8e0b60e731a4ce782b1
https://github.com/qemu/qemu/commit/c8232b39bb18a91cde39b8e0b60e731a4ce782b1
Author: Peter Maydell <address@hidden>
Date: 2015-07-08 (Wed, 08 Jul 2015)
Changed paths:
M default-configs/i386-softmmu.mak
M default-configs/x86_64-softmmu.mak
M hw/acpi/Makefile.objs
M hw/acpi/ich9.c
A hw/acpi/tco.c
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/isa/lpc_ich9.c
M hw/pci/pcie.c
M hw/virtio/dataplane/vring.c
M hw/virtio/virtio-pci.c
M hw/virtio/virtio-pci.h
M include/hw/acpi/ich9.h
A include/hw/acpi/tco.h
M include/hw/boards.h
M include/hw/i386/ich9.h
M include/hw/i386/pc.h
M include/hw/pci/pci_regs.h
M include/hw/virtio/virtio-net.h
A include/standard-headers/linux/pci_regs.h
M include/standard-headers/linux/virtio_net.h
M include/standard-headers/linux/virtio_pci.h
M scripts/update-linux-headers.sh
M tests/Makefile
A tests/tco-test.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc,virtio,pci: fixes and updates
Most notably, this includes the TCO support for ICH: the last feature for 2.4
as we are entering the hard freeze.
Bugfixes only from now on.
virtio pci also gained cfg access capability - arguably a bugfix
since virtio spec makes it mandatory, but it's a big patch.
Signed-off-by: Michael S. Tsirkin <address@hidden>
# gpg: Signature made Wed Jul 8 10:40:07 2015 BST using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <address@hidden>"
# gpg: aka "Michael S. Tsirkin <address@hidden>"
* remotes/mst/tags/for_upstream:
tco-test: fix up config accesses and re-enable
virtio fix cfg endian-ness for BE targets
virtio-pci: implement cfg capability
virtio: define virtio_pci_cfg_cap in header.
pcie: Set the "link active" in the link status register
pci_regs.h: import from linux
virtio_net: reuse constants from linux
hw/i386/pc: don't carry FDC from pc_basic_device_init() to pc_cmos_init()
hw/i386/pc: reflect any FDC @ ioport 0x3f0 in the CMOS
hw/i386/pc: factor out pc_cmos_init_floppy()
ich9: implement strap SPKR pin logic
tests: add testcase for TCO watchdog emulation
ich9: add TCO interface emulation
acpi: split out ICH ACPI support
Revert "dataplane: allow virtio-1 devices"
dataplane: fix cross-endian issues
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/62a3864eb094...c8232b39bb18
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