[Qemu-commits] [qemu/qemu] 737103: target-arm: Add exception target el infrastructure

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 737103619869600668cc7e8700e4f6eab3943896
      
https://github.com/qemu/qemu/commit/737103619869600668cc7e8700e4f6eab3943896
  Author: Greg Bellows <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/helper.h
    M target-arm/op_helper.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-arm/translate.h

  Log Message:
  -----------
  target-arm: Add exception target el infrastructure

Add a CPU state exception target EL field that will be used for communicating
the EL to which an exception should be routed.

Add a disassembly context field for tracking the EL3 architecture needed for
determining the target exception EL.

Add a target EL argument to the generic exception helper for callers to specify
the EL to which the exception should be routed.  Extended the helper to set
the newly added CPU state exception target el.

Added a function for setting the target exception EL and updated calls to 
helpers
to call it.

Signed-off-by: Greg Bellows <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e3b1d480995f6e2e86ef062038e618c1234dbcf1
      
https://github.com/qemu/qemu/commit/e3b1d480995f6e2e86ef062038e618c1234dbcf1
  Author: Greg Bellows <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Extend helpers to route exceptions

Updated the various helper routines to set the target EL as needed using a
dedicated function.

Signed-off-by: Greg Bellows <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
[PMM: Also set target_el in fault cases in access_check_cp_reg()]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f2932df777dace044719dc2f394f5a5a8aa1b1cd
      
https://github.com/qemu/qemu/commit/f2932df777dace044719dc2f394f5a5a8aa1b1cd
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Set correct syndrome for faults on MSR DAIF*, imm

If the SCTLR.UMA trap bit is set then attempts by EL0 to update
the PSTATE DAIF bits via "MSR DAIFSet, imm" and "MSR DAIFClr, imm"
instructions will raise an exception. We were failing to set
the syndrome information for this exception, which meant that
it would be reported as a repeat of whatever the previous
exception was. Set the correct syndrome information.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 8c6084bf10fe721929ca94cf16acd6687e61d3ec
      
https://github.com/qemu/qemu/commit/8c6084bf10fe721929ca94cf16acd6687e61d3ec
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Move setting of exception info into tlb_fill

Move the code which sets exception information out of
arm_cpu_handle_mmu_fault and into tlb_fill. tlb_fill
is the only caller which wants to raise_exception()
so it makes more sense for it to handle the whole of
the exception setup.

As part of this cleanup, move the user-mode-only
implementation function for the handle_mmu_fault CPU
method into cpu.c so we don't need to make it globally
visible, and rename the softmmu-only utility function
arm_cpu_handle_mmu_fault to arm_tlb_fill so it's clear
that it's not the same thing.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 863b6589d738d0b4c8b283297b0ff228f3d3fb14
      
https://github.com/qemu/qemu/commit/863b6589d738d0b4c8b283297b0ff228f3d3fb14
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Set exception target EL in tlb_fill

Set the exception target EL for MMU faults in tlb_fill.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: c63285991b371c031147ad620dd7671662a90303
      
https://github.com/qemu/qemu/commit/c63285991b371c031147ad620dd7671662a90303
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Make raise_exception() take syndrome and target EL

Rather than making every caller of raise_exception set the
syndrome and target EL by hand, make these arguments to
raise_exception() and have that do the job.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 012a906b19e99b126403ff4a257617dab9b34163
      
https://github.com/qemu/qemu/commit/012a906b19e99b126403ff4a257617dab9b34163
  Author: Greg Bellows <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/helper-a64.c
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Update interrupt handling to use target EL

Updated the interrupt handling to utilize and report through the target EL
exception field.  This includes consolidating and cleaning up code where
needed. Target EL is now calculated once in arm_cpu_exec_interrupt() and
do_interrupt was updated to use the target_el exception field.  The
necessary code from arm_excp_target_el() was merged in where needed and the
function removed.

Signed-off-by: Greg Bellows <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 38836a2cd47c20daaaa84873e3d6020f19e4bfca
      
https://github.com/qemu/qemu/commit/38836a2cd47c20daaaa84873e3d6020f19e4bfca
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Allow cp access functions to indicate traps to EL2 or EL3

Some coprocessor access functions will need to indicate that the
instruction should trap to EL2 or EL3 rather than the default
target exception level; add corresponding CPAccessResult enum
entries and handling code.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: c6f191642a4027909813b4e6e288411f8371e951
      
https://github.com/qemu/qemu/commit/c6f191642a4027909813b4e6e288411f8371e951
  Author: Greg Bellows <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Add AArch64 CPTR registers

Adds CPTR_EL2/3 system registers definitions and access function.

Signed-off-by: Greg Bellows <address@hidden>
[PMM: merge CPTR_EL2 and HCPTR definitions into a single
 def using STATE_BOTH;
 don't use readfn/writefn to implement RAZ/WI registers;
 don't use accessfn for the no-EL2 CPTR_EL2;
 fix cpacr_access logic to catch EL2 accesses to CPACR being
 trapped to EL3;
 use new CP_ACCESS_TRAP_EL[23] rather than setting
 exception.target_el directly]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 3cf6a0fcedd429693d439556543400d5f0e31e1d
      
https://github.com/qemu/qemu/commit/3cf6a0fcedd429693d439556543400d5f0e31e1d
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm: Make singlestate TB flags common between AArch32/64

Currently we keep the TB flags PSTATE_SS and SS_ACTIVE in different
bit positions for AArch64 and AArch32. Replace these separate
definitions with a single common flag in the upper part of the
flags word.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 9dbbc748d671c70599101836cd1c2719d92f3017
      
https://github.com/qemu/qemu/commit/9dbbc748d671c70599101836cd1c2719d92f3017
  Author: Greg Bellows <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-arm/translate.h

  Log Message:
  -----------
  target-arm: Extend FP checks to use an EL

Extend the ARM disassemble context to take a target exception EL instead of a
boolean enable. This change reverses the polarity of the check making a value
of 0 indicate floating point enabled (no exception).

Signed-off-by: Greg Bellows <address@hidden>
[PMM: Use a common TB flag field for AArch32 and AArch64;
 CPTR_EL2 exists in v7; CPTR_EL2 should trap for EL2 accesses;
 CPTR_EL2 should not trap for secure accesses; CPTR_EL3
 should trap for EL3 accesses; CPACR traps for secure
 accesses should trap to EL3 if EL3 is AArch32]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 647f767ba3b37fb229275086187e96242248a4ac
      
https://github.com/qemu/qemu/commit/647f767ba3b37fb229275086187e96242248a4ac
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/cpu.h

  Log Message:
  -----------
  target-arm: Move TB flags down to fill gap

Deleting the now-unused ARM_TBFLAG_CPACR_FPEN left a gap in the
bit usage; move the following ARM_TBFLAG_XSCALE_CPAR and
ARM_TBFLAG_NS_SHIFT down 3 bits to fill the gap.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 84549b6dcf9147559ec08b066de673587be6b763
      
https://github.com/qemu/qemu/commit/84549b6dcf9147559ec08b066de673587be6b763
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/op_helper.c
    M target-arm/translate-a64.c
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Don't halt on WFI unless we don't have any work

Just NOP the WFI instruction if we have work to do.
This doesn't make much difference currently (though it does avoid
jumping out to the top level loop and immediately restarting),
but the distinction between "halt" and "don't halt" will become
more important when the decision to halt requires us to trap
to a higher exception level instead.

Suggested-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: b1eced713d9913a5c58ba9daa795f10e4c856c49
      
https://github.com/qemu/qemu/commit/b1eced713d9913a5c58ba9daa795f10e4c856c49
  Author: Greg Bellows <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Add WFx instruction trap support

Add support for trapping WFI and WFE instructions to the proper EL when
SCTLR/SCR/HCR settings apply.

Signed-off-by: Greg Bellows <address@hidden>
[PMM: removed unnecessary tweaking of syn_wfx() prototype;
 use raise_exception();
 don't trap on WFE (and add comment explaining why not);
 remove unnecessary ARM_FEATURE checks;
 trap to EL3, not EL1, if in S-EL0 and SCTLR check fires]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: ff80dc7fa8045e2b2531888d965424d2b0e1d1b6
      
https://github.com/qemu/qemu/commit/ff80dc7fa8045e2b2531888d965424d2b0e1d1b6
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M hw/i386/acpi-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Make enum values to be upper case to match coding style

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: afe0b3803f1a5fffe618af5a483d4c9567b5c5b7
      
https://github.com/qemu/qemu/commit/afe0b3803f1a5fffe618af5a483d4c9567b5c5b7
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt.c
    A include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt: Move common definitions to virt.h

Move some common definitions to virt.h. These will be used by
generating ACPI tables.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 6a1f001be3ea7478cac803d03149cfcfc1fa2094
      
https://github.com/qemu/qemu/commit/6a1f001be3ea7478cac803d03149cfcfc1fa2094
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt.c
    M include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt: Record PCIe ranges in MemMapEntry array

To generate ACPI table for PCIe controller, we need the base and size of
the PCIe ranges. Record these ranges in MemMapEntry array, then we could
share and use them for generating ACPI table.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f5d8c8cd792b3712f85a1f9a3a9a719015691975
      
https://github.com/qemu/qemu/commit/f5d8c8cd792b3712f85a1f9a3a9a719015691975
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/Makefile.objs
    A hw/arm/virt-acpi-build.c
    A include/hw/arm/virt-acpi-build.h
    M qemu-options.hx
    M trace-events

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Basic framework for building ACPI tables on ARM

Introduce a preliminary framework in virt-acpi-build.c with the main
ACPI build functions. It exposes the generated ACPI contents to
guest over fw_cfg.

The required ACPI v5.1 tables for ARM are:
- RSDP: Initial table that points to XSDT
- RSDT: Points to FADT GTDT MADT tables
- FADT: Generic information about the machine
- GTDT: Generic timer description table
- MADT: Multiple APIC description table
- DSDT: Holds all information about system devices/peripherals, pointed by FADT

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dc17ab1de53d37ddcca81b16dfeae839322fbe5a
      
https://github.com/qemu/qemu/commit/dc17ab1de53d37ddcca81b16dfeae839322fbe5a
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_memory32_fixed() term

Add aml_memory32_fixed() for describing device mmio region in resource
template. These can be used to generating DSDT table for ACPI on ARM.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 205d1d1c04033b1be4c925e687b6865d1fc1b26b
      
https://github.com/qemu/qemu/commit/205d1d1c04033b1be4c925e687b6865d1fc1b26b
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_interrupt() term

Add aml_interrupt() for describing device interrupt in resource template.
These can be used to generating DSDT table for ACPI on ARM.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dfccd8cfd7c5d1b6740463821d84106bbaced44c
      
https://github.com/qemu/qemu/commit/dfccd8cfd7c5d1b6740463821d84106bbaced44c
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generation of DSDT table for virt devices

DSDT consists of the usual common table header plus a definition
block in AML encoding which describes all devices in the platform.

After initializing DSDT with header information the namespace is
created which is followed by the device encodings. The devices are
described using the Resource Template for the 32-Bit Fixed Memory
Range and the Extended Interrupt Descriptors.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c2f7c0c306dcd56725b506d3743eed421e6d0994
      
https://github.com/qemu/qemu/commit/c2f7c0c306dcd56725b506d3743eed421e6d0994
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c
    M include/hw/acpi/acpi-defs.h

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generate FADT table and update ACPI headers

In the case of mach virt, it is used to set the Hardware Reduced bit
and enable PSCI SMP booting through HVC. So ignore FACS and FADT
points to DSDT.

Update the header definitions for FADT taking into account the new
additions of ACPI v5.1 in `include/hw/acpi/acpi-defs.h`

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 982d06c561a62cf7d2a8d31e8a8c107fb3477419
      
https://github.com/qemu/qemu/commit/982d06c561a62cf7d2a8d31e8a8c107fb3477419
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c
    M include/hw/acpi/acpi-defs.h
    M include/hw/arm/virt-acpi-build.h

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generate MADT table

MADT describes GIC enabled ARM platforms. The GICC and GICD
subtables are used to define the GIC regions.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ee246400c1ceef2014e120b718388d5f4aea8a2a
      
https://github.com/qemu/qemu/commit/ee246400c1ceef2014e120b718388d5f4aea8a2a
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M include/hw/acpi/acpi-defs.h
    M include/hw/arm/virt.h

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generate GTDT table

ACPI v5.1 defines GTDT for ARM devices as a place to describe timer
related information in the system. The Arch Timer interrupts must
be provided for GTDT.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 243bdb79fb0b2eda176cdef37700f29068a71d43
      
https://github.com/qemu/qemu/commit/243bdb79fb0b2eda176cdef37700f29068a71d43
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M hw/arm/virt-acpi-build.c
    M hw/i386/acpi-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generate RSDT table

RSDT points to other tables FADT, MADT, GTDT. This code is shared with x86.

Here we still use RSDT as UEFI puts ACPI tables below 4G address space,
and UEFI ignore the RSDT or XSDT.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d4bec5d876b694f7f13ad3fcfe510ff46e9748d0
      
https://github.com/qemu/qemu/commit/d4bec5d876b694f7f13ad3fcfe510ff46e9748d0
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generate RSDP table

RSDP points to RSDT which in turn points to other tables.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 8434488400971c6793893b8c9547bc6b97e076ce
      
https://github.com/qemu/qemu/commit/8434488400971c6793893b8c9547bc6b97e076ce
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Generate MCFG table

Generate MCFG table for PCIe controller.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ed8b5847e46c24d6e9c286892a00a34bee9b0835
      
https://github.com/qemu/qemu/commit/ed8b5847e46c24d6e9c286892a00a34bee9b0835
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Make aml_buffer() definition consistent with the spec

According to ACPI spec, DefBuffer can take two parameters: BufferSize
and ByteList. Make it consistent with the spec. Uninitialized buffer
could be requested by passing ByteList as NULL to reserve space.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b930fb9db4aa07abb8f3871eb7379242edbdf2a5
      
https://github.com/qemu/qemu/commit/b930fb9db4aa07abb8f3871eb7379242edbdf2a5
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add ToUUID macro

Add ToUUID macro, this is useful for generating PCIe ACPI table.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 922cc8823e484733021a7be5b0e876eba2218623
      
https://github.com/qemu/qemu/commit/922cc8823e484733021a7be5b0e876eba2218623
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_or() term

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ea7df04a0217fe6314a1520dde1883c45fefcaaa
      
https://github.com/qemu/qemu/commit/ea7df04a0217fe6314a1520dde1883c45fefcaaa
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_lnot() term

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 467b07dfae6087381d0993ab910253a6c1850457
      
https://github.com/qemu/qemu/commit/467b07dfae6087381d0993ab910253a6c1850457
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_else() term

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ed8176a37a8f227e61daddbcf92dc5d1cad45818
      
https://github.com/qemu/qemu/commit/ed8176a37a8f227e61daddbcf92dc5d1cad45818
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_create_dword_field() term

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 616ef329adbb671be783a1dba96d881b9218ff80
      
https://github.com/qemu/qemu/commit/616ef329adbb671be783a1dba96d881b9218ff80
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add aml_dword_io() term

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e1f776c434f8f18079b82d8121c166fb53a63451
      
https://github.com/qemu/qemu/commit/e1f776c434f8f18079b82d8121c166fb53a63451
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/acpi/aml-build.c
    M include/hw/acpi/aml-build.h

  Log Message:
  -----------
  hw/acpi/aml-build: Add Unicode macro

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d4e5de1ae02f6b47eb088531d3d4d047b4db6cfa
      
https://github.com/qemu/qemu/commit/d4e5de1ae02f6b47eb088531d3d4d047b4db6cfa
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt-acpi-build.c

  Log Message:
  -----------
  hw/arm/virt-acpi-build: Add PCIe controller in ACPI DSDT table

Add PCIe controller in ACPI DSDT table, so the guest can detect
the PCIe.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 135a67a692bedb952ea720351026247104da8645
      
https://github.com/qemu/qemu/commit/135a67a692bedb952ea720351026247104da8645
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M default-configs/i386-softmmu.mak
    M default-configs/mips-softmmu.mak
    M default-configs/mips64-softmmu.mak
    M default-configs/mips64el-softmmu.mak
    M default-configs/mipsel-softmmu.mak
    M default-configs/x86_64-softmmu.mak
    M hw/acpi/Makefile.objs
    M hw/i2c/Makefile.objs

  Log Message:
  -----------
  ACPI: split CONFIG_ACPI into 4 pieces

As core.c, piix4.c, ich9.c and pcihp.c are for x86, add CONFIG_ACPI_X86
to make it only for x86. ARM doesn't support cpu and memory hotplug, add
CONFIG_ACPI_CPU_HOTPLUG and CONFIG_ACPI_MEMORY_HOTPLUG to exclude them
for target-arm.

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d7c2e2db28eb7e8f2ed7467fa2f2c59026b206d1
      
https://github.com/qemu/qemu/commit/d7c2e2db28eb7e8f2ed7467fa2f2c59026b206d1
  Author: Shannon Zhao <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Enable dynamic generation of ACPI v5.1 tables

Initialize VirtGuestInfoState and register a machine_init_done notify to
call virt_acpi_build().

Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 3960c336ad96c2183549c8bf32bbff93ecda7ea4
      
https://github.com/qemu/qemu/commit/3960c336ad96c2183549c8bf32bbff93ecda7ea4
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd

A LDRD or STRD where rd is not an even number is UNPREDICTABLE.
We were letting this fall through, which is OK unless rd is 15,
in which case we would attempt to do a load_reg or store_reg
to a nonexistent r16 for the second half of the double-word.
Catch the odd-numbered-rd cases and UNDEF them instead.

To do this we rearrange the structure of the code a little
so we can put the UNDEF catches at the top before we've
allocated TCG temporaries.

Cc: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 97af820f539efe80b87615a04f9de11ea585f725
      
https://github.com/qemu/qemu/commit/97af820f539efe80b87615a04f9de11ea585f725
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-29 (Fri, 29 May 2015)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M default-configs/i386-softmmu.mak
    M default-configs/mips-softmmu.mak
    M default-configs/mips64-softmmu.mak
    M default-configs/mips64el-softmmu.mak
    M default-configs/mipsel-softmmu.mak
    M default-configs/x86_64-softmmu.mak
    M hw/acpi/Makefile.objs
    M hw/acpi/aml-build.c
    M hw/arm/Makefile.objs
    A hw/arm/virt-acpi-build.c
    M hw/arm/virt.c
    M hw/i2c/Makefile.objs
    M hw/i386/acpi-build.c
    M include/hw/acpi/acpi-defs.h
    M include/hw/acpi/aml-build.h
    A include/hw/arm/virt-acpi-build.h
    A include/hw/arm/virt.h
    M qemu-options.hx
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/helper-a64.c
    M target-arm/helper.c
    M target-arm/helper.h
    M target-arm/internals.h
    M target-arm/op_helper.c
    M target-arm/translate-a64.c
    M target-arm/translate.c
    M target-arm/translate.h
    M trace-events

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150529' 
into staging

target-arm:
 * Support ACPI for ARMv8 systems using the 'virt' board
   (and a UEFI boot image, typically)
 * avoid buffer overrun in some UNPREDICTABLE ldrd/strd cases
 * further work preparing for 64-bit EL2/EL3 support

# gpg: Signature made Fri May 29 12:14:06 2015 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20150529: (39 commits)
  target-arm: Avoid buffer overrun on UNPREDICTABLE ldrd/strd
  hw/arm/virt: Enable dynamic generation of ACPI v5.1 tables
  ACPI: split CONFIG_ACPI into 4 pieces
  hw/arm/virt-acpi-build: Add PCIe controller in ACPI DSDT table
  hw/acpi/aml-build: Add Unicode macro
  hw/acpi/aml-build: Add aml_dword_io() term
  hw/acpi/aml-build: Add aml_create_dword_field() term
  hw/acpi/aml-build: Add aml_else() term
  hw/acpi/aml-build: Add aml_lnot() term
  hw/acpi/aml-build: Add aml_or() term
  hw/acpi/aml-build: Add ToUUID macro
  hw/acpi/aml-build: Make aml_buffer() definition consistent with the spec
  hw/arm/virt-acpi-build: Generate MCFG table
  hw/arm/virt-acpi-build: Generate RSDP table
  hw/arm/virt-acpi-build: Generate RSDT table
  hw/arm/virt-acpi-build: Generate GTDT table
  hw/arm/virt-acpi-build: Generate MADT table
  hw/arm/virt-acpi-build: Generate FADT table and update ACPI headers
  hw/arm/virt-acpi-build: Generation of DSDT table for virt devices
  hw/acpi/aml-build: Add aml_interrupt() term
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/2cc3bdbe2d39...97af820f539e