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[Qemu-commits] [qemu/qemu] 935445: target-alpha: Move VAX helpers to a n

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 935445: target-alpha: Move VAX helpers to a new file
Date: Fri, 22 May 2015 03:30:06 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 9354452c39fef1ab2491da5989e6944d8bb2e16a
      
https://github.com/qemu/qemu/commit/9354452c39fef1ab2491da5989e6944d8bb2e16a
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/Makefile.objs
    M target-alpha/fpu_helper.c
    A target-alpha/vax_helper.c

  Log Message:
  -----------
  target-alpha: Move VAX helpers to a new file

Keep the IEEE and VAX floating point emulation separate.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3da653fa05579579b0ba55a02ffa2aa3d466f01b
      
https://github.com/qemu/qemu/commit/3da653fa05579579b0ba55a02ffa2aa3d466f01b
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c
    M target-alpha/helper.h
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Rename floating-point subroutines

... to match the instructions, which have no leading "f".

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 9d5a626b2c3fa98761b35b5e2ac86f7adb231002
      
https://github.com/qemu/qemu/commit/9d5a626b2c3fa98761b35b5e2ac86f7adb231002
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Forget installed round mode after MT_FPCR

When we use QUAL_RM_D, we copy fpcr_dyn_round to float_status.
When we install a new FPCR value, we update fpcr_dyn_round.
Reset the status of the cache so that we re-copy for the next
fp insn that requires dynamic rounding.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: ba9c5de5f2d33d468a07a8794121472ea031a0b5
      
https://github.com/qemu/qemu/commit/ba9c5de5f2d33d468a07a8794121472ea031a0b5
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/helper.c
    M target-alpha/mem_helper.c

  Log Message:
  -----------
  target-alpha: Set PC correctly for floating-point exceptions

PC should be one past the faulting insn.  Add better commentary
for the machine-check exception path.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f3d3aad4a920a4436a9f5397d7a2963aefe141a9
      
https://github.com/qemu/qemu/commit/f3d3aad4a920a4436a9f5397d7a2963aefe141a9
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/cpu.h
    M target-alpha/fpu_helper.c
    M target-alpha/helper.c
    M target-alpha/helper.h
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Tidy FPCR representation

Store the fpcr as the hardware represents it.  Convert the softfpu
representation of exceptions into the fpcr representation.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 471d4930470aee38dffe6fc4890ede3d8eaf23c4
      
https://github.com/qemu/qemu/commit/471d4930470aee38dffe6fc4890ede3d8eaf23c4
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Set fpcr_exc_status even for disabled exceptions

The qualifiers can suppress the raising of exceptions, but real
hardware still records that the exceptions occurred.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: f6b6b7b8a775f97edab43eb672d5991f534c2e61
      
https://github.com/qemu/qemu/commit/f6b6b7b8a775f97edab43eb672d5991f534c2e61
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c

  Log Message:
  -----------
  target-alpha: Set EXC_M_SWC for exceptions from /S insns

Previously forgotten, the kernel needs the software completion bit to
know that it needs to emulate software completion qualified insns.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: c24a8a0b6dad5a33d84f5fb846edb28c43312c71
      
https://github.com/qemu/qemu/commit/c24a8a0b6dad5a33d84f5fb846edb28c43312c71
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c
    M target-alpha/helper.h
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Raise IOV from CVTTQ

Floating-point overflow is a different bit from integer overflow.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7f2e40020cfc827f7e59670f8c400b0b9a704481
      
https://github.com/qemu/qemu/commit/7f2e40020cfc827f7e59670f8c400b0b9a704481
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c

  Log Message:
  -----------
  target-alpha: Fix cvttq vs large integers

The range +- 2**63 - 2**64 was returning the wrong truncated
result.  We also incorrectly signaled overflow for -2**63.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 7b4dde839e86ca6c254d4e3cd28260e9d668afb5
      
https://github.com/qemu/qemu/commit/7b4dde839e86ca6c254d4e3cd28260e9d668afb5
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c

  Log Message:
  -----------
  target-alpha: Fix cvttq vs inf

We should raise INV for infinities as well, not OVR+INE.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 4d1628e832dfc6ec02b0d196f6cc250aaa7bf3b3
      
https://github.com/qemu/qemu/commit/4d1628e832dfc6ec02b0d196f6cc250aaa7bf3b3
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/helper.h
    M target-alpha/int_helper.c
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Fix integer overflow checking insns

We need to write the result to the destination register before
raising any exception.  Thus inline the code for each insn, and
check for any exception after we're done.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2517def6f82bec9eba9333a37f85a6f368ba52ee
      
https://github.com/qemu/qemu/commit/2517def6f82bec9eba9333a37f85a6f368ba52ee
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Implement WH64EN

Backward compatible cache insn introduced for EV7.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ed0851380c8ed181ddd6ed3542b14fcb0bca6700
      
https://github.com/qemu/qemu/commit/ed0851380c8ed181ddd6ed3542b14fcb0bca6700
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Disallow literal operand to 1C.30 to 1C.37

Before 64f45e49 we used to have literal checks for 4 of these 8 opcodes.
Confirmed that real hardware doesn't allow them.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: b99e80694cc635aa6ed5a3716e89645a8afa261c
      
https://github.com/qemu/qemu/commit/b99e80694cc635aa6ed5a3716e89645a8afa261c
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c
    M target-alpha/helper.h
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Raise EXC_M_INV properly for fp inputs

Ignore DNZ if software completion isn't used.  Raise INV for
denormals in system mode so the OS completion handler sees them.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 4ed069ab5334a495b49d0704795524fa34e8dbfc
      
https://github.com/qemu/qemu/commit/4ed069ab5334a495b49d0704795524fa34e8dbfc
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c

  Log Message:
  -----------
  target-alpha: Suppress underflow from CVTTQ if DNZ

I.e. respect flush_inputs_to_zero.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 57a808b6d7f52a62111f6070933dfca6cd88a0fd
      
https://github.com/qemu/qemu/commit/57a808b6d7f52a62111f6070933dfca6cd88a0fd
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-18 (Mon, 18 May 2015)

  Changed paths:
    M target-alpha/fpu_helper.c
    M target-alpha/helper.h
    M target-alpha/translate.c

  Log Message:
  -----------
  target-alpha: Raise IOV from CVTQL

Even if an exception isn't taken, the status flags need updating
and the result should be written to the destination.  Move the body
of cvtql out of line, since we now always need a call.

Reported-by: Al Viro <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 8d8d324e3424bf891d41e9c7758dcc09cf3c38b9
      
https://github.com/qemu/qemu/commit/8d8d324e3424bf891d41e9c7758dcc09cf3c38b9
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-21 (Thu, 21 May 2015)

  Changed paths:
    M target-alpha/int_helper.c

  Log Message:
  -----------
  target-alpha: Rewrite helper_zapnot

This form produces significantly smaller code on x86_64.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 32ad48abd74a997220b841e4e913edeb267aa362
      
https://github.com/qemu/qemu/commit/32ad48abd74a997220b841e4e913edeb267aa362
  Author: Richard Henderson <address@hidden>
  Date:   2015-05-21 (Thu, 21 May 2015)

  Changed paths:
    M target-alpha/int_helper.c

  Log Message:
  -----------
  target-alpha: Add vector implementation for CMPBGE

While conditionalized on SSE2, it's a "portable" gcc generic vector
implementation, which could be enabled on other hosts.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 27e1259a69c49ee2dd53385f4ca4ca14b822191d
      
https://github.com/qemu/qemu/commit/27e1259a69c49ee2dd53385f4ca4ca14b822191d
  Author: Peter Maydell <address@hidden>
  Date:   2015-05-22 (Fri, 22 May 2015)

  Changed paths:
    M target-alpha/Makefile.objs
    M target-alpha/cpu.h
    M target-alpha/fpu_helper.c
    M target-alpha/helper.c
    M target-alpha/helper.h
    M target-alpha/int_helper.c
    M target-alpha/mem_helper.c
    M target-alpha/translate.c
    A target-alpha/vax_helper.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-axp-20150521' into staging

Rewrite fp exceptions

# gpg: Signature made Thu May 21 18:35:52 2015 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"

* remotes/rth/tags/pull-axp-20150521:
  target-alpha: Add vector implementation for CMPBGE
  target-alpha: Rewrite helper_zapnot
  target-alpha: Raise IOV from CVTQL
  target-alpha: Suppress underflow from CVTTQ if DNZ
  target-alpha: Raise EXC_M_INV properly for fp inputs
  target-alpha: Disallow literal operand to 1C.30 to 1C.37
  target-alpha: Implement WH64EN
  target-alpha: Fix integer overflow checking insns
  target-alpha: Fix cvttq vs inf
  target-alpha: Fix cvttq vs large integers
  target-alpha: Raise IOV from CVTTQ
  target-alpha: Set EXC_M_SWC for exceptions from /S insns
  target-alpha: Set fpcr_exc_status even for disabled exceptions
  target-alpha: Tidy FPCR representation
  target-alpha: Set PC correctly for floating-point exceptions
  target-alpha: Forget installed round mode after MT_FPCR
  target-alpha: Rename floating-point subroutines
  target-alpha: Move VAX helpers to a new file

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/9e549d36e989...27e1259a69c4
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