[Qemu-commits] [qemu/qemu] 2eaaac: PPC: e500: Move CCSR definition to params

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 2eaaac1f01014bc7a3597847646a814539494fca
      
https://github.com/qemu/qemu/commit/2eaaac1f01014bc7a3597847646a814539494fca
  Author: Alexander Graf <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c
    M hw/ppc/mpc8544ds.c

  Log Message:
  -----------
  PPC: e500: Move CCSR definition to params

We want to have different MMIO region offsets for the mpc8544ds machine
and our e500 PV machine, so move the definitions of those into the machine
specific params struct.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: e6b4e5f4795b2591fd91bea671e3e22e08fd0e75
      
https://github.com/qemu/qemu/commit/e6b4e5f4795b2591fd91bea671e3e22e08fd0e75
  Author: Alexander Graf <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/e500plat.c

  Log Message:
  -----------
  PPC: e500: Move CCSR and MMIO space to upper end of address space

On e500 we're basically guaranteed to have 36bits of physical address space
available for our enjoyment. Older chips (like the mpc8544) only had 32bits,
but everything from e500v2 onwards bumped it up.

It's reasonably safe to assume that if you're using the PV machine, your guest
kernel is configured to support 36bit physical address space. So in order to
support more guest RAM, we can move CCSR and other MMIO windows right below the
end of our 36bit address space, just like later SoC versions of e500 do.

With this patch, I'm able to successfully spawn an e500 VM with -m 48G.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 44045ce9740945056a58ecb53d2af9ae00083632
      
https://github.com/qemu/qemu/commit/44045ce9740945056a58ecb53d2af9ae00083632
  Author: Alexander Graf <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/mpc8544ds.c

  Log Message:
  -----------
  PPC: mpc8554ds: Tell user about exceeding RAM limits

The mpc8544ds board only supports up to 3GB of RAM due to its limited
address space.

When the user requests more, abort and tell him that he should use less.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: cb3778a0455a2e5a48d7ef0ec8dc656313820389
      
https://github.com/qemu/qemu/commit/cb3778a0455a2e5a48d7ef0ec8dc656313820389
  Author: Alexander Graf <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/pci-host/ppce500.c
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c
    M hw/ppc/mpc8544ds.c

  Log Message:
  -----------
  PPC: e500 pci host: Add support for ATMUs

The e500 PCI controller has configurable windows that allow a guest OS
to selectively map parts of the PCI bus space to CPU address space and
to selectively map parts of the CPU address space for DMA requests into
PCI visible address ranges.

So far, we've simply assumed that this mapping is 1:1 and ignored it.

However, the PCICSRBAR (CCSR mapped in PCI bus space) always has to live
inside the first 32bits of address space. This means if we always treat
all mappings as 1:1, this map will collide with our RAM map from the CPU's
point of view.

So this patch adds proper ATMU support which allows us to keep the PCICSRBAR
below 32bits local to the PCI bus and have another, different window to PCI
BARs at the upper end of address space. We leverage this on e500plat though,
mpc8544ds stays virtually 1:1 like it was before, but now also goes via ATMU.

With this patch, I can run guests with lots of RAM and not coincidently access
MSI-X mappings while I really want to access RAM.

Signed-off-by: Alexander Graf <address@hidden>


  Commit: 2791128e2fa8b96d0b81622404655529b0b4fd4d
      
https://github.com/qemu/qemu/commit/2791128e2fa8b96d0b81622404655529b0b4fd4d
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Load/Store Vector Element Storage Alignment

The Load Vector Element Indexed and Store Vector Element Indexed
instructions compute an effective address in the usual manner.
However, they truncate that address to the natural boundary.
For example, the lvewx instruction will ignore the least significant
two bits of the address and thus load the aligned word of storage.

Fix the generators for these instruction to properly perform this
truncation.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: b748863a7f7d2996255dd2cb5a20e49785cc7387
      
https://github.com/qemu/qemu/commit/b748863a7f7d2996255dd2cb5a20e49785cc7387
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/fpu_helper.c

  Log Message:
  -----------
  target-ppc: VXSQRT Should Not Be Set for NaNs

The Power ISA square root instructions (fsqrt[s], frsqrte[s]) must
set the FPSCR[VXSQRT] flag when operating on a negative value.
However, NaNs have no sign and therefore this flag should not
be set when operating on one.

Change the order of the checks in the helper code.  Move the
SNaN-to-QNaN macro to the top of the file so that it can be
re-used.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 4814f2d116c057d6fdfd57f3b979c77d5668e878
      
https://github.com/qemu/qemu/commit/4814f2d116c057d6fdfd57f3b979c77d5668e878
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Fix Floating Point Move Instructions That Set CR1

The Floating Point Move instructions (fmr., fabs., fnabs., fneg.,
and fcpsgn.) incorrectly copy FPSCR[FPCC] instead of [FX,FEX,VX,OX].
Furthermore, the current code does this via a call to gen_compute_fprf,
which is awkward since these instructions do not actually set FPRF.

Change the code to use the gen_set_cr1_from_fpscr utility.

Signed-off-by: Tom Musta <address@hidden>
[agraf: whitespace fixes]
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 14ba79c73a1c2db78becef171ec2f73606c1d7e1
      
https://github.com/qemu/qemu/commit/14ba79c73a1c2db78becef171ec2f73606c1d7e1
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: mffs. Should Set CR1 from FPSCR Bits

Update the Move From FPSCR (mffs.) instruction to correctly
set CR[1] from FPSCR[FX,FEX,VX,OX].

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 00e6fd3e03b8df5553c6ea02bd95630549b0e2d1
      
https://github.com/qemu/qemu/commit/00e6fd3e03b8df5553c6ea02bd95630549b0e2d1
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Fully Migrate to gen_set_cr1_from_fpscr

Eliminate the set_rc argument from the gen_compute_fprf utility and
the corresponding (and incorrect) implementation.  Replace it with
calls to the gen_set_cr1_from_fpscr() utility.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 7d45556effa4bf1557ba765b6b94390fb7d06615
      
https://github.com/qemu/qemu/commit/7d45556effa4bf1557ba765b6b94390fb7d06615
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Eliminate set_fprf Argument From gen_compute_fprf

The set_fprf argument to the gen_compute_fprf() utility is no longer
needed -- gen_compute_fprf() is now called only when FPRF is actually
computed and set.  Eliminate the obsolete argument.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 58dd0a478784d4b732a695eb23bf88f4bbf33f5f
      
https://github.com/qemu/qemu/commit/58dd0a478784d4b732a695eb23bf88f4bbf33f5f
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/fpu_helper.c
    M target-ppc/helper.h
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Eliminate set_fprf Argument From helper_compute_fprf

The set_fprf argument to the helper_compute_fprf helper function
is no longer necessary -- the helper is only invoked when FPSCR[FPRF]
is going to be set.

Eliminate the unnecessary argument from the function signature and
its corresponding implementation.  Change the return value of the
helper to "void".  Update the name of the local variable "ret" to
"fprf", which now makes more sense.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: e094c4c12f33a1c965f5af02f33968a337348739
      
https://github.com/qemu/qemu/commit/e094c4c12f33a1c965f5af02f33968a337348739
  Author: Cédric Le Goater <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/kvm.c

  Log Message:
  -----------
  target-ppc: explicitly save page table headers in big endian

Currently, when the page tables are saved, the kvm_get_htab_header structs
and the ptes are assumed being big endian and dumped as a indistinct blob
in the statefile. This is no longer true when the host is little endian
and this breaks restoration.

This patch unfolds the kvmppc_save_htab routine to write explicitly the
kvm_get_htab_header structs in big endian. The ptes are left untouched.

Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 01a579729b2e614bd02b25c8504976eeecb64eff
      
https://github.com/qemu/qemu/commit/01a579729b2e614bd02b25c8504976eeecb64eff
  Author: Samuel Mendoza-Jonas <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/spapr.c
    M include/hw/ppc/spapr.h

  Log Message:
  -----------
  spapr: Fix stale HTAB during live migration (KVM)

If a guest reboots during a running migration, changes to the
hash page table are not necessarily updated on the destination.
Opening a new file descriptor to the HTAB forces the migration
handler to resend the entire table.

Signed-off-by: Samuel Mendoza-Jonas <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 338c25b6929b5436a42aaa106c7e9136cf1ff4dc
      
https://github.com/qemu/qemu/commit/338c25b6929b5436a42aaa106c7e9136cf1ff4dc
  Author: Samuel Mendoza-Jonas <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: Fix integer overflow during migration (TCG)

The n_valid and n_invalid fields are unsigned short integers but it is
possible to have more than 65535 entries in a contiguous hunk, overflowing
the field. This results in an incorrect HTAB being sent to the destination
during migration.

Signed-off-by: Samuel Mendoza-Jonas <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: e6b8fd246c19701b05f5b65a56b0cc91bbd05ac6
      
https://github.com/qemu/qemu/commit/e6b8fd246c19701b05f5b65a56b0cc91bbd05ac6
  Author: Samuel Mendoza-Jonas <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: Fix stale HTAB during live migration (TCG)

If a TCG guest reboots during a running migration HTAB entries are not
marked dirty, and the destination boots with an invalid HTAB.

When a reboot occurs, explicitly mark the current HTAB dirty after
clearing it.

Signed-off-by: Samuel Mendoza-Jonas <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 2bf9febc95e5bcef8edb10ebc967325917b9c958
      
https://github.com/qemu/qemu/commit/2bf9febc95e5bcef8edb10ebc967325917b9c958
  Author: Sergey Fedorov <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M device_tree.c

  Log Message:
  -----------
  device-tree: fix memory leak

Signed-off-by: Sergey Fedorov <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 77bad151fbd2b2eed1e959ecc2c3f2ee2f080f6c
      
https://github.com/qemu/qemu/commit/77bad151fbd2b2eed1e959ecc2c3f2ee2f080f6c
  Author: Paolo Bonzini <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/ppc.c

  Log Message:
  -----------
  ppc: do not use get_clock_realtime()

Use the external qemu-timer API instead.

Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 5f9490de566c5b092a6cfedc3c7a37a9c9dee917
      
https://github.com/qemu/qemu/commit/5f9490de566c5b092a6cfedc3c7a37a9c9dee917
  Author: David Gibson <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/spapr_iommu.c

  Log Message:
  -----------
  PPC: Fix crash on spapr_tce_table_finalize()

spapr_tce_table_finalize() can SEGV if the object was not previously
realized.  In particular this can be triggered by running
   qemu-system-ppc -device spapr-tce-table,?

The basic problem is that we have mismatched initialization versus
finalization: spapr_tce_table_finalize() is attempting to undo things that
are done in spapr_tce_table_realize(), not an instance_init function.

Therefore, replace spapr_tce_table_finalize() with
spapr_tce_table_unrealize().

Signed-off-by: David Gibson <address@hidden>
Cc: address@hidden
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 549cfe5d5d315babec92d4e7043bb872f61c838a
      
https://github.com/qemu/qemu/commit/549cfe5d5d315babec92d4e7043bb872f61c838a
  Author: Alexey Kardashevskiy <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M pc-bios/README
    M pc-bios/slof.bin
    M roms/SLOF

  Log Message:
  -----------
  pseries: Update SLOF firmware image to 20141202

The changelog is:
  > version: update to 20141202
  > ipv4: Fix send packet across a subnet
  > pci: scan only type 0 and type 1
  > usb-xhci: support xhci extended capabilities
  > Fix term-io-key to also work when stdin has not been set yet
  > net-snk: llfw startup is using the wrong offset to handler
  > net-snk: Make call_client_interface() a bit more ABI compliant
  > net-snk: Remove custom printf version
  > net-snk: Sanitize our .lds file
  > net-snk: Avoid type clash for stdin & stdout
  > net-snk: use socket descriptor in the network stack
  > net-snk: Remove printk() in favor of printf()
  > net-snk: Remove redundant prototypes
  > net-snk: Remove unused timer functions
  > net-snk: Remove some unused PCI functions
  > net-snk: Remove module system
  > net-snk: Remove insmod/rmmod
  > net-snk: Remove snk_kernel_interface and related definitions
  > net-snk: Remove pci/vio_config gunk
  > js2x: Fix build
  > net-snk: Remoe some now unused "kernel" functions
  > rtas: Improve error handling in instantiate-rtas
  > version: update to 20140827
  > Add private HCALL to inform updated RTAS base and entry
  > xhci: fix port assignment

Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: f90468b6465f64d4f5cf24ad81142c51f37320cf
      
https://github.com/qemu/qemu/commit/f90468b6465f64d4f5cf24ad81142c51f37320cf
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/cpu.h

  Log Message:
  -----------
  target-ppc: Introduce Instruction Type for Transactional Memory

Add a category (PPC2_TM) for the Transactional Memory instructions
introduced in Power ISA 2.07.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: e43668a7d20e5d2dfe92b2f3426280b2a351333c
      
https://github.com/qemu/qemu/commit/e43668a7d20e5d2dfe92b2f3426280b2a351333c
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/cpu.h

  Log Message:
  -----------
  target-ppc: Introduce Feature Flag for Transactional Memory

Add a flag (POWERPC_FLAG_TM) for the Transactional Memory
Facility introduced in Power ISA 2.07.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 69d1a9377453d78ba2279fa56ae9623b3cd98673
      
https://github.com/qemu/qemu/commit/69d1a9377453d78ba2279fa56ae9623b3cd98673
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Introduce tm_enabled Bit to CPU State

Add a bit (tm_enabled) to CPU state that mirrors the MSR[TM] bit.
This is analogous to the other "available" bits in the MSR (FP,
VSX, etc.).

NOTE: Since MSR[TM] occupies big-endian bit 31, the code is wrapped
with a PPC64 bit check.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 3e28c5e363aaf3de8b99acb662b7488ed6b49197
      
https://github.com/qemu/qemu/commit/3e28c5e363aaf3de8b99acb662b7488ed6b49197
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate_init.c

  Log Message:
  -----------
  target-ppc: Power8 Supports Transactional Memory

The Power8 processor implements the Transactional Memory Facility
as defined in Power ISA 2.07.  Update the initialization code to
indicate this.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: aac862379ceaa724aba2ba9f4b825479c1401b1a
      
https://github.com/qemu/qemu/commit/aac862379ceaa724aba2ba9f4b825479c1401b1a
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/cpu.h

  Log Message:
  -----------
  target-ppc: Introduce TEXASRU Bit Fields

Define mnemonics for the various bit fields in the Transaction
EXception And Summary Register (TEXASR).
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 0ff93d11bc0890b2569f748266c04f4417ec3233
      
https://github.com/qemu/qemu/commit/0ff93d11bc0890b2569f748266c04f4417ec3233
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/helper.h
    M target-ppc/mem_helper.c
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Introduce tbegin

Provide a degenerate implementation of the tbegin instruction.  This
implementation always fails the transaction, recording the failure
per Book II Section 5.3.2 of the Power ISA V2.07.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 56a846157edaba3389eb141e104774451d82ce51
      
https://github.com/qemu/qemu/commit/56a846157edaba3389eb141e104774451d82ce51
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Introduce TM Noops

Add degenerate implementations of the non-privileged Transactional
Memory instructions tend., tabort*. and tsr.  This implementation
simply checks the MSR[TM] bit and then sets CR0 to 0b0000.  This
is a reasonable degenerate implementation since transactions are
never allowed to begin and hence MSR[TS] is always 0b00.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: aeedd58234e7f211bcd6d0ad04cdc60c2a967aca
      
https://github.com/qemu/qemu/commit/aeedd58234e7f211bcd6d0ad04cdc60c2a967aca
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Introduce tcheck

Add a degenerate implementation of the Transaction Check (tcheck)
instruction.  Since transaction always immediately fail, this
implementation simply sets CR[BF] to 0b1000, i.e. TDOOMED = 1
and MSR[TS] == 0.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: f83c2378bb412b205e9d14dca2f7758d3d23cc88
      
https://github.com/qemu/qemu/commit/f83c2378bb412b205e9d14dca2f7758d3d23cc88
  Author: Tom Musta <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Introduce Privileged TM Noops

Add the supervisory Transactional Memory instructions treclaim. and
trechkpt.  The implementation is a degenerate one that simply
checks privileged state, TM availability and then sets CR[0] to
0b0000, just like the unprivileged noops.

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 82e345f57e6482cef960677613125c5aaf2b1654
      
https://github.com/qemu/qemu/commit/82e345f57e6482cef960677613125c5aaf2b1654
  Author: Amit Tomar <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/e500.c

  Log Message:
  -----------
  PPC: e500: Fix GPIO controller interrupt number

The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a problem
because IRQ 43 is occupied by the I2C controller which we want to implement
next, so we'd have a conflict on that IRQ number.

Move the GPIO controller to IRQ 47 where it belongs.

Signed-off-by: Amit Singh Tomar <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 466976d9eed8d618aed93cb1fac04845e86253cf
      
https://github.com/qemu/qemu/commit/466976d9eed8d618aed93cb1fac04845e86253cf
  Author: Peter Maydell <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLY

The functions SR() and gen_sync_exception() are only used in softmmu
configs; wrap them in #ifndef CONFIG_USER_ONLY to suppress clang warnings
on the linux-user builds.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 2f285bdd54bb2ff25a213b3b77e9bf46f4306320
      
https://github.com/qemu/qemu/commit/2f285bdd54bb2ff25a213b3b77e9bf46f4306320
  Author: Peter Maydell <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  target-ppc: Cast ssize_t to size_t before printing with %zx

The mingw32 compiler complains about trying to print variables of type
ssize_t with the %z format string specifier. Since we're printing it
as unsigned hex anyway, cast to size_t to silence the warning.

Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: c760dbb9dc4dfceeb5d4ae07876b10da58d4c630
      
https://github.com/qemu/qemu/commit/c760dbb9dc4dfceeb5d4ae07876b10da58d4c630
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/mac_newworld.c
    M hw/ppc/spapr.c
    M include/sysemu/sysemu.h
    M vl.c

  Log Message:
  -----------
  hw/ppc: modified the condition for usb controllers to be created for some ppc 
machines

Some ppc machines create a default usb controller based on a 'machine 
condition'.
Until now the logic was: create the usb controller if:
 -  the usb option was supplied in cli and value is true or
 -  the usb option was absent and both set_defaults and the machine
    condition were true.

Modified the logic to:
Create the usb controller if:
 - the machine condition is true and defaults are enabled or
 - the usb option is supplied and true.

The main for this is to simplify the usb_enabled method.

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 759bf45d81a892c359fa1a3848c36dcd74b6a42b
      
https://github.com/qemu/qemu/commit/759bf45d81a892c359fa1a3848c36dcd74b6a42b
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/core/machine.c
    M include/hw/boards.h

  Log Message:
  -----------
  hw/machine: added machine_usb wrapper

Following QOM convention, object properties should
not be accessed directly.

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 09f28e5b51e0fb822021efd8396057c818927775
      
https://github.com/qemu/qemu/commit/09f28e5b51e0fb822021efd8396057c818927775
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/arm/nseries.c
    M hw/arm/pxa2xx.c
    M hw/arm/realview.c
    M hw/arm/versatilepb.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M hw/ppc/mac_newworld.c
    M hw/ppc/mac_oldworld.c
    M hw/ppc/prep.c
    M hw/ppc/spapr.c
    M include/sysemu/sysemu.h
    M vl.c

  Log Message:
  -----------
  hw/usb: simplified usb_enabled

The argument is not longer used and the implementation
uses now QOM instead of QemuOpts.

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: b8cbc738de38f2a669de9920fc0b0ee14c1d2dd8
      
https://github.com/qemu/qemu/commit/b8cbc738de38f2a669de9920fc0b0ee14c1d2dd8
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/mac_newworld.c

  Log Message:
  -----------
  hw/ppc/mac_newworld: QOMified mac99 machines

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 4ee9ced979e68522ee38ea759e7630ac70f15fa8
      
https://github.com/qemu/qemu/commit/4ee9ced979e68522ee38ea759e7630ac70f15fa8
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  hw/ppc/spapr: simplify usb controller creation logic

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 75c74ccbe1d4175edb79c6f810c2207dcf5edb22
      
https://github.com/qemu/qemu/commit/75c74ccbe1d4175edb79c6f810c2207dcf5edb22
  Author: Marcel Apfelbaum <address@hidden>
  Date:   2015-01-07 (Wed, 07 Jan 2015)

  Changed paths:
    M hw/ppc/mac_newworld.c

  Log Message:
  -----------
  hw/ppc/mac_newworld: simplify usb controller creation logic

Signed-off-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>


  Commit: 97052d64e4fb934bcf25f4a6b42dc06f6ecbf9eb
      
https://github.com/qemu/qemu/commit/97052d64e4fb934bcf25f4a6b42dc06f6ecbf9eb
  Author: Peter Maydell <address@hidden>
  Date:   2015-01-10 (Sat, 10 Jan 2015)

  Changed paths:
    M device_tree.c
    M hw/pci-host/ppce500.c
    M hw/ppc/e500.c
    M hw/ppc/e500.h
    M hw/ppc/e500plat.c
    M hw/ppc/mpc8544ds.c
    M hw/ppc/ppc.c
    M hw/ppc/spapr.c
    M hw/ppc/spapr_iommu.c
    M include/hw/ppc/spapr.h
    M pc-bios/README
    M pc-bios/slof.bin
    M roms/SLOF
    M target-ppc/cpu.h
    M target-ppc/fpu_helper.c
    M target-ppc/helper.h
    M target-ppc/kvm.c
    M target-ppc/mem_helper.c
    M target-ppc/translate.c
    M target-ppc/translate_init.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' 
into staging

Patch queue for ppc - 2015-01-07

New year's release. This time's highlights:

  - E500: More RAM support
  - pseries: New SLOF release
  - Migration fixes
  - Simplify USB spawning logic, removes support for explicit usb=off
  - TCG: Simple untansactional TM emulation

# gpg: Signature made Wed 07 Jan 2015 15:19:37 GMT using RSA key ID 03FEDC60
# gpg: Good signature from "Alexander Graf <address@hidden>"
# gpg:                 aka "Alexander Graf <address@hidden>"

* remotes/agraf/tags/signed-ppc-for-upstream: (37 commits)
  hw/ppc/mac_newworld: simplify usb controller creation logic
  hw/ppc/spapr: simplify usb controller creation logic
  hw/ppc/mac_newworld: QOMified mac99 machines
  hw/usb: simplified usb_enabled
  hw/machine: added machine_usb wrapper
  hw/ppc: modified the condition for usb controllers to be created for some ppc 
machines
  target-ppc: Cast ssize_t to size_t before printing with %zx
  target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLY
  PPC: e500: Fix GPIO controller interrupt number
  target-ppc: Introduce Privileged TM Noops
  target-ppc: Introduce tcheck
  target-ppc: Introduce TM Noops
  target-ppc: Introduce tbegin
  target-ppc: Introduce TEXASRU Bit Fields
  target-ppc: Power8 Supports Transactional Memory
  target-ppc: Introduce tm_enabled Bit to CPU State
  target-ppc: Introduce Feature Flag for Transactional Memory
  target-ppc: Introduce Instruction Type for Transactional Memory
  pseries: Update SLOF firmware image to 20141202
  PPC: Fix crash on spapr_tce_table_finalize()
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/e77d927f1a18...97052d64e4fb