qemu-commits
[Top][All Lists]
Advanced
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 48e06f: target-tricore: Add target stubs and

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 48e06f: target-tricore: Add target stubs and qom-cpu
Date: Mon, 01 Sep 2014 08:30:04 -0700 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 48e06fe0ed8c265336bb7320c3a294fd0d082c04
      
https://github.com/qemu/qemu/commit/48e06fe0ed8c265336bb7320c3a294fd0d082c04
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M MAINTAINERS
    M arch_init.c
    M cpu-exec.c
    M cpus.c
    M include/elf.h
    M include/sysemu/arch_init.h
    A target-tricore/Makefile.objs
    A target-tricore/cpu-qom.h
    A target-tricore/cpu.c
    A target-tricore/cpu.h
    A target-tricore/helper.c
    A target-tricore/helper.h
    A target-tricore/op_helper.c
    A target-tricore/translate.c
    A target-tricore/tricore-defs.h

  Log Message:
  -----------
  target-tricore: Add target stubs and qom-cpu

Add TriCore target stubs, and QOM cpu, and Maintainer

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: e2d05011030d99fa0db1eeab1ca3c8fc497a6c95
      
https://github.com/qemu/qemu/commit/e2d05011030d99fa0db1eeab1ca3c8fc497a6c95
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    A hw/tricore/Makefile.objs
    A hw/tricore/tricore_testboard.c
    A include/hw/tricore/tricore.h

  Log Message:
  -----------
  target-tricore: Add board for systemmode

Add basic board to allow systemmode emulation

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2d30267e8e8ea61a8ee7cf48392d993699cbb114
      
https://github.com/qemu/qemu/commit/2d30267e8e8ea61a8ee7cf48392d993699cbb114
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/helper.c
    M target-tricore/op_helper.c

  Log Message:
  -----------
  target-tricore: Add softmmu support

Add basic softmmu support for TriCore

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0aaeb118b33fbad49e66af1cf7f43b1a99db741d
      
https://github.com/qemu/qemu/commit/0aaeb118b33fbad49e66af1cf7f43b1a99db741d
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M configure
    A default-configs/tricore-softmmu.mak
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add initialization for translation and activate target

Add tcg and cpu model initialization.
Add gen_intermediate_code function.
Activate target in configure and add softmmu config.

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 7c87d074d2cabd1f0dc5a21ef615089f2453d0d4
      
https://github.com/qemu/qemu/commit/7c87d074d2cabd1f0dc5a21ef615089f2453d0d4
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/translate.c
    A target-tricore/tricore-opcodes.h

  Log Message:
  -----------
  target-tricore: Add masks and opcodes for decoding

Add masks and opcodes for decoding TriCore instructions.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0707ec1bea17bb006ba362f2cd6ec7b2fb94f789
      
https://github.com/qemu/qemu/commit/0707ec1bea17bb006ba362f2cd6ec7b2fb94f789
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SRC opcode format

Add instructions of SRC opcode format.
Add micro-op generator functions for add, conditional add/sub and shi/shai.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2692802a37a53a832c76d9beec88c65972bc2a91
      
https://github.com/qemu/qemu/commit/2692802a37a53a832c76d9beec88c65972bc2a91
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SRR opcode format

Add instructions of SRR opcode format.
Add helper for add/sub_ssov.

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 46aa848ffb008ac7da4b3760a38eb7e9a2075308
      
https://github.com/qemu/qemu/commit/46aa848ffb008ac7da4b3760a38eb7e9a2075308
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SSR opcode format

Add instructions of SSR opcode format.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d279821074b74a80f984579fd4dfecc87cb8a899
      
https://github.com/qemu/qemu/commit/d279821074b74a80f984579fd4dfecc87cb8a899
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SRRS and SLRO opcode format

Add instructions of SSRS and SLRO opcode format.
Add micro-op generator functions for offset loads.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9a31922b0868b847d3b9a12c4b0ecb45f2ad1e2f
      
https://github.com/qemu/qemu/commit/9a31922b0868b847d3b9a12c4b0ecb45f2ad1e2f
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SB opcode format

Add instructions of SB opcode format.
Add helper call/ret.
Add micro-op generator functions for branches.
Add makro to generate helper functions.

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 70b0226250db5ea5ec6c0bbc13514a3e27081c28
      
https://github.com/qemu/qemu/commit/70b0226250db5ea5ec6c0bbc13514a3e27081c28
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SBC and SBRN opcode format

Add instructions of SBC and SBRN opcode format.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a47b50db609f95edf5b2f964a7a8087f094cfcfa
      
https://github.com/qemu/qemu/commit/a47b50db609f95edf5b2f964a7a8087f094cfcfa
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SBR opcode format

Add instructions of SBR opcode format.
Add gen_loop micro-op generator function.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5de93515f995066f709f6e1af5531a36ce6766bd
      
https://github.com/qemu/qemu/commit/5de93515f995066f709f6e1af5531a36ce6766bd
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SC opcode format

Add instructions of SC opcode format.
Add helper for begin interrupt service routine.

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5a7634a28c3d30fec53df9cbd27e0317679e78c9
      
https://github.com/qemu/qemu/commit/5a7634a28c3d30fec53df9cbd27e0317679e78c9
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SLR, SSRO and SRO opcode format

Add instructions of SLR, SSRO and SRO opcode format.

Signed-off-by: Bastian Koppelmann <address@hidden>

Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 44ea34309e38ce1bcb7d2c8816c6b0baaee7979c
      
https://github.com/qemu/qemu/commit/44ea34309e38ce1bcb7d2c8816c6b0baaee7979c
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-09-01 (Mon, 01 Sep 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of SR opcode format

Add instructions of SR opcode format.
Add micro-op generator functions for saturate.
Add helper return from exception (rfe).

Signed-off-by: Bastian Koppelmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/5cd1475d28fc...44ea34309e38
reply via email to
[Prev in Thread] Current Thread [Next in Thread]