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[Qemu-commits] [qemu/qemu] 374044: qga: Fix handle fd leak in acquire_pr
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[Qemu-commits] [qemu/qemu] 374044: qga: Fix handle fd leak in acquire_privilege() |
Date: |
Thu, 05 Jun 2014 15:30:07 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 374044f08fe18a18469b981812cd8695f5b3569c
https://github.com/qemu/qemu/commit/374044f08fe18a18469b981812cd8695f5b3569c
Author: Gonglei <address@hidden>
Date: 2014-06-03 (Tue, 03 Jun 2014)
Changed paths:
M qga/commands-win32.c
Log Message:
-----------
qga: Fix handle fd leak in acquire_privilege()
token should be closed in all conditions.
So move CloseHandle(token) to "out" branch.
Signed-off-by: Wang Rui <address@hidden>
Signed-off-by: Gonglei <address@hidden>
Signed-off-by: Michael Roth <address@hidden>
Commit: e09c49f40de32620e99f67a71d4508c7fe97dd84
https://github.com/qemu/qemu/commit/e09c49f40de32620e99f67a71d4508c7fe97dd84
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/display/cg3.c
Log Message:
-----------
cg3: move initialisation from realizefn to initfn
Initialisation cleanup as suggested by Andreas.
Signed-off-by: Mark Cave-Ayland <address@hidden>
CC: Andreas Färber <address@hidden>
Commit: 366d4f7e0007a5540897fbac6e377c57d8c79a73
https://github.com/qemu/qemu/commit/366d4f7e0007a5540897fbac6e377c57d8c79a73
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/display/cg3.c
Log Message:
-----------
cg3: add extra check to prevent CG3 register array overflow
The case statements in the CG3 read and write register routines have a maximum
value of CG3_REG_SIZE, so if a value were written to this offset then it
would overflow the register array.
Currently this cannot be exploited since the MemoryRegion restricts accesses
to the range 0 ... CG3_REG_SIZE - 1, but it seems worth clarifying this for
future review and/or static analysis.
Signed-off-by: Mark Cave-Ayland <address@hidden>
CC: Paolo Bonzini <address@hidden>
Commit: d4ad9dec14aef3a61a23c2787bb660d07c943f04
https://github.com/qemu/qemu/commit/d4ad9dec14aef3a61a23c2787bb660d07c943f04
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/display/tcx.c
Log Message:
-----------
tcx: move initialisation from SysBusDevice class to TCX class realizefn
This is an intermediate step to bring TCX in line with CG3.
Signed-off-by: Mark Cave-Ayland <address@hidden>
CC: Andreas Färber <address@hidden>
Commit: 01b91ac2be83e321853851437f69c0bc57ea4162
https://github.com/qemu/qemu/commit/01b91ac2be83e321853851437f69c0bc57ea4162
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/display/tcx.c
M hw/sparc/sun4m.c
Log Message:
-----------
tcx: move initialisation from realizefn to initfn
Initialisation cleanup as suggested by Andreas.
Signed-off-by: Mark Cave-Ayland <address@hidden>
CC: Andreas Färber <address@hidden>
Commit: ea9a6606b1559baaf4ddeba3cdce9858055f4044
https://github.com/qemu/qemu/commit/ea9a6606b1559baaf4ddeba3cdce9858055f4044
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/pci-host/apb.c
Log Message:
-----------
apb: Move IOMMU registers into a separate IOMMUState struct
Signed-off-by: Mark Cave-Ayland <address@hidden>
Commit: fd7fbc8ff713ebf8fa2ae5078f1024079bde90b1
https://github.com/qemu/qemu/commit/fd7fbc8ff713ebf8fa2ae5078f1024079bde90b1
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/pci-host/apb.c
Log Message:
-----------
apb: fix IOMMU register sizes
According to the referenced documentation, the IOMMU has 3 64-bit registers
consisting of a control register, base register and flush register.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Commit: f38b161203a4aa71853a3be60fda69b5f40f1bb3
https://github.com/qemu/qemu/commit/f38b161203a4aa71853a3be60fda69b5f40f1bb3
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/pci-host/apb.c
Log Message:
-----------
apb: handle reading/writing of IOMMU control registers
While the registers are documented as being 64-bit, Linux seems to access
them in two halves as 2 x 32-bit accesses. Make sure that we can correctly
handle this case.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Commit: ae74bbe7c5b070d26852d6673759d47cd3569722
https://github.com/qemu/qemu/commit/ae74bbe7c5b070d26852d6673759d47cd3569722
Author: Mark Cave-Ayland <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/pci-host/apb.c
Log Message:
-----------
apb: implement IOMMU translation for PCI host bridge
Signed-off-by: Mark Cave-Ayland <address@hidden>
Commit: 4e627aeef8353a2af151cd2c82aa5eedf79e5534
https://github.com/qemu/qemu/commit/4e627aeef8353a2af151cd2c82aa5eedf79e5534
Author: Peter Maydell <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M qga/commands-win32.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/mdroth/qga-pull-2014-06-05' into staging
* remotes/mdroth/qga-pull-2014-06-05:
qga: Fix handle fd leak in acquire_privilege()
Signed-off-by: Peter Maydell <address@hidden>
Commit: 50809c8b9288a9bfe1fdec926b7ef985608a7ea6
https://github.com/qemu/qemu/commit/50809c8b9288a9bfe1fdec926b7ef985608a7ea6
Author: Peter Maydell <address@hidden>
Date: 2014-06-05 (Thu, 05 Jun 2014)
Changed paths:
M hw/display/cg3.c
M hw/display/tcx.c
M hw/pci-host/apb.c
M hw/sparc/sun4m.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into staging
* remotes/mcayland/qemu-sparc:
apb: implement IOMMU translation for PCI host bridge
apb: handle reading/writing of IOMMU control registers
apb: fix IOMMU register sizes
apb: Move IOMMU registers into a separate IOMMUState struct
tcx: move initialisation from realizefn to initfn
tcx: move initialisation from SysBusDevice class to TCX class realizefn
cg3: add extra check to prevent CG3 register array overflow
cg3: move initialisation from realizefn to initfn
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/26edf8cc08e2...50809c8b9288
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