[Qemu-commits] [qemu/qemu] 16c358: target-sparc: Add and use CPU_FEATURE_CASA

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 16c358e96e0597b7d60754547166ad05ecc6d93d
      
https://github.com/qemu/qemu/commit/16c358e96e0597b7d60754547166ad05ecc6d93d
  Author: Sebastian Huber <address@hidden>
  Date:   2014-03-12 (Wed, 12 Mar 2014)

  Changed paths:
    M target-sparc/cpu.c
    M target-sparc/cpu.h
    M target-sparc/helper.h
    M target-sparc/ldst_helper.c
    M target-sparc/translate.c

  Log Message:
  -----------
  target-sparc: Add and use CPU_FEATURE_CASA

The LEON3 processor has support for the CASA instruction which is
normally only available for SPARC V9 processors.  Binutils 2.24
and GCC 4.9 will support this instruction for LEON3.  GCC uses it to
generate C11 atomic operations.

The CAS synthetic instruction uses an ASI of 0x80.  If TARGET_SPARC64 is
not defined use a supervisor data load/store for an ASI of 0x80 in
helper_ld_asi()/helper_st_asi().  The supervisor data load/store was
choosen according to the LEON3 documentation.

The ASI 0x80 is defined in the SPARC V9 manual, Table 12—Address Space
Identifiers (ASIs).  Here we have: 0x80, ASI_PRIMARY, Unrestricted
access, Primary address space.

Tested with the following program:

  #include <assert.h>
  #include <stdatomic.h>

  void test(void)
  {
    atomic_int a;
    int e;
    _Bool b;

    atomic_store(&a, 1);
    e = 1;
    b = atomic_compare_exchange_strong(&a, &e, 2);
    assert(b);
    assert(atomic_load(&a) == 2);

    atomic_store(&a, 3);
    e = 4;
    b = atomic_compare_exchange_strong(&a, &e, 5);
    assert(!b);
    assert(atomic_load(&a) == 3);
  }

Tested also on a NGMP board with a LEON4 processor.

Reviewed-by: Fabien Chouteau <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Tested-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Sebastian Huber <address@hidden>
Signed-off-by: Mark Cave-Ayland <address@hidden>


  Commit: 7602e3e4a36715f8de9932dfd489cc4a2c6a7807
      
https://github.com/qemu/qemu/commit/7602e3e4a36715f8de9932dfd489cc4a2c6a7807
  Author: Peter Maydell <address@hidden>
  Date:   2014-03-12 (Wed, 12 Mar 2014)

  Changed paths:
    M target-sparc/cpu.c
    M target-sparc/cpu.h
    M target-sparc/helper.h
    M target-sparc/ldst_helper.c
    M target-sparc/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into staging

* remotes/mcayland/qemu-sparc:
  target-sparc: Add and use CPU_FEATURE_CASA

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/613c12ec2857...7602e3e4a367