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[Qemu-commits] [qemu/qemu] 8b9dfe: block/iscsi: use a bh to schedule co
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[Qemu-commits] [qemu/qemu] 8b9dfe: block/iscsi: use a bh to schedule co reentrance |
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Date: |
Fri, 10 Jan 2014 11:30:11 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 8b9dfe9098d91e06a3dd6376624307fe5fa13be8
https://github.com/qemu/qemu/commit/8b9dfe9098d91e06a3dd6376624307fe5fa13be8
Author: Peter Lieven <address@hidden>
Date: 2013-12-16 (Mon, 16 Dec 2013)
Changed paths:
M block/iscsi.c
Log Message:
-----------
block/iscsi: use a bh to schedule co reentrance
this fixes a potential segfault and performance regression.
If the coroutine is reentered directly in the iscsi_co_generic_cb
iscsi_process_{read,write} are interrupted and reentered any
time later. One the one hand this could happen after an iscsi_close
where the iscsi context is already gone (segfault). On the
other hand this limits the number of processed callbacks
in each aio_dispatch to one (potential performance regression).
Cc: address@hidden
Signed-off-by: Peter Lieven <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
Commit: e50d7607f1800c9f9c576229c6119e4c82f456d6
https://github.com/qemu/qemu/commit/e50d7607f1800c9f9c576229c6119e4c82f456d6
Author: Liu Yuan <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/sheepdog.c
Log Message:
-----------
sheepdog: fix dynamic grow for running qcow2 format
When running qcow2 over sheepdog, we might meet following problem
qemu-system-x86_64: shrinking is not supported
And cause IO errors to Guest. This is because we abuse bs->total_sectors, which
is manipulated by generic block layer and race with sheepdog code.
We should directly check if offset > vdi_size to dynamically enlarge the volume
instead of 'offset > bs->total_sectors', which will cause problem when following
case happens:
vdi_size > offset > bs->total_sectors
# then trigger sd_truncate() to shrink the volume wrongly.
Cc: address@hidden
Cc: Kevin Wolf <address@hidden>
Cc: Stefan Hajnoczi <address@hidden>
Reported-by: Hadrien KOHL <address@hidden>
Signed-off-by: Liu Yuan <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 4d684832e54afe971fd8f94cb830ec1e135648e7
https://github.com/qemu/qemu/commit/4d684832e54afe971fd8f94cb830ec1e135648e7
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M hw/virtio/dataplane/vring.c
Log Message:
-----------
vring: create a common function to parse descriptors
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 781c117f3758bdb21e982d2aebba81febceccfe5
https://github.com/qemu/qemu/commit/781c117f3758bdb21e982d2aebba81febceccfe5
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M hw/block/dataplane/virtio-blk.c
M hw/virtio/dataplane/vring.c
Log Message:
-----------
vring: factor common code for error exits
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 8c1b566fd165af6cb12d6ef69eb554a347641e20
https://github.com/qemu/qemu/commit/8c1b566fd165af6cb12d6ef69eb554a347641e20
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M hw/block/dataplane/virtio-blk.c
M hw/virtio/dataplane/vring.c
M include/hw/virtio/dataplane/vring.h
Log Message:
-----------
dataplane: change vring API to use VirtQueueElement
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 87b7f2f8c8da4d2da2728f0f1ad207973f1ea834
https://github.com/qemu/qemu/commit/87b7f2f8c8da4d2da2728f0f1ad207973f1ea834
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M hw/virtio/dataplane/Makefile.objs
R hw/virtio/dataplane/hostmem.c
M hw/virtio/dataplane/vring.c
R include/hw/virtio/dataplane/hostmem.h
M include/hw/virtio/dataplane/vring.h
Log Message:
-----------
dataplane: replace hostmem with memory_region_find
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: c27de2a3e9c8664116287d639bacd600e61a6b45
https://github.com/qemu/qemu/commit/c27de2a3e9c8664116287d639bacd600e61a6b45
Author: Stefan Hajnoczi <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M qapi-schema.json
Log Message:
-----------
qapi-schema: fix QEMU 1.8 references
We are moving boldly on to QEMU 2.0 in the next release. Some patches
written at a time where we assumed 1.8 would be the next version number
managed to sneak in.
s/1.8/2.0/ in qapi-schema.json
Signed-off-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Fam Zheng <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Commit: 219c252193862898430e5dea5efb7447877aaa85
https://github.com/qemu/qemu/commit/219c252193862898430e5dea5efb7447877aaa85
Author: Stefan Weil <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/iscsi.c
M configure
Log Message:
-----------
block/iscsi: Fix compilation for libiscsi 1.4.0 (API change)
Function iscsi_read10_task got additional parameters starting with version
libiscsi 1.5.0.
libiscsi 1.4.0 is still widely used (Debian wheezy, jessie and other Linux
distributions currently provide packages for QEMU which use it), so we
still need support for this older API.
Reviewed-by: Peter Lieven <address@hidden>
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 7e30e6a6746b417c7e0dbc9af009560fbb63f336
https://github.com/qemu/qemu/commit/7e30e6a6746b417c7e0dbc9af009560fbb63f336
Author: Jeff Cody <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/vhdx-log.c
M block/vhdx.c
M block/vhdx.h
Log Message:
-----------
block: vhdx - improve error message, and .bdrv_check implementation
If there is a dirty log file to be replayed in a VHDX image, it is
replayed in .vhdx_open(). However, if the file is opened read-only,
then a somewhat cryptic error message results.
This adds a more helpful error message for the user. If an image file
contains a log to be replayed, and is opened read-only, the user is
instructed to run 'qemu-img check -r all' on the image file.
Running qemu-img check -r all will cause the image file to be opened
r/w, which will replay the log file. If a log file replay is detected,
this is flagged, and bdrv_check will increase the corruptions_fixed
count for the image.
[Fixed typo in error message that was pointed out by Eric Blake
<address@hidden>.
--Stefan]
Signed-off-by: Jeff Cody <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 8282db1b2e7394574cb55fcc608c5cb0df159d8f
https://github.com/qemu/qemu/commit/8282db1b2e7394574cb55fcc608c5cb0df159d8f
Author: Jeff Cody <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M qemu-doc.texi
M qemu-img.texi
Log Message:
-----------
docs: updated qemu-img man page and qemu-doc to reflect VHDX support.
The man page for qemu-img, and the qemu-doc, did not mention VHDX
as a supported format. This adds in reference to VHDX in those
documents.
[Stefan Weil <address@hidden> suggested s/Block Size/Block size/ for
consistency. I have made this change.
--Stefan]
Signed-off-by: Jeff Cody <address@hidden>
Reviewed-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: b47053bd0359c68094d7a25a65687c0844771e34
https://github.com/qemu/qemu/commit/b47053bd0359c68094d7a25a65687c0844771e34
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/vmdk.c
M tests/qemu-iotests/059
M tests/qemu-iotests/059.out
Log Message:
-----------
vmdk: Check VMFS extent line field number
VMFS extent line in description file should be with 4 fields:
RW <size> VMFS "file-name.vmdk"
Check the number explicitly and report error if offset is appended as
FLAT, which should be invalid format.
Reported-by: Paolo Bonzini <address@hidden>
Signed-off-by: Fam Zheng <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 917703c179d4483d050fe112a2a81acec3d6ffd7
https://github.com/qemu/qemu/commit/917703c179d4483d050fe112a2a81acec3d6ffd7
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/vmdk.c
Log Message:
-----------
vmdk: Allow vmdk_create to work with protocol
This improves vmdk_create to use bdrv_* functions to replace qemu_open
and other fd functions. The error handling are improved as well. One
difference is that bdrv_pwrite will round up buffer to sectors, so for
description file, an extra bdrv_truncate is used in the end to drop
inding zeros.
Notes:
- A bonus bug fix is correct endian is used in initializing GD entries.
- ROUND_UP and DIV_ROUND_UP are used where possible.
I tested that new code produces exactly the same file as previously.
Signed-off-by: Fam Zheng <address@hidden>
Tested-by: Peter Lieven <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: de99c417f6208a64b68e3b35d2aecbca1f60eae0
https://github.com/qemu/qemu/commit/de99c417f6208a64b68e3b35d2aecbca1f60eae0
Author: Stefan Hajnoczi <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M tests/qemu-iotests/051.out
Log Message:
-----------
qemu-iotests: drop duplicate virtio-blk initialization failure
Commit 75884afd5c6c42e523b08565e289dbe319e17ad9 ("virtio-blk: Convert to
QOM realize") dropped a duplicate error_report() call. Now we no longer
get the following error message twice:
QEMU_PROG: -drive if=virtio: Device initialization failed.
Update qemu-iotests 051.
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: f95c625ce4cb7863795fcc36502ac58a44fdb2f1
https://github.com/qemu/qemu/commit/f95c625ce4cb7863795fcc36502ac58a44fdb2f1
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/mirror.c
Log Message:
-----------
mirror: Don't close target
Let reference count manage target and don't call bdrv_close here.
Signed-off-by: Fam Zheng <address@hidden>
Reviewed-by: Kevin Wolf <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 5bc361b8134eff68e2c40916d1cf58b3523d223b
https://github.com/qemu/qemu/commit/5bc361b8134eff68e2c40916d1cf58b3523d223b
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/mirror.c
Log Message:
-----------
mirror: Move base to MirrorBlockJob
This allows setting the base before entering mirror_run, commit will
make use of it.
Signed-off-by: Fam Zheng <address@hidden>
Reviewed-by: Kevin Wolf <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 03544a6e9ecc1be115e8a29bd929f83b467d4816
https://github.com/qemu/qemu/commit/03544a6e9ecc1be115e8a29bd929f83b467d4816
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/mirror.c
M include/block/block_int.h
Log Message:
-----------
block: Add commit_active_start()
commit_active_start is implemented in block/mirror.c, It will create a
job with "commit" type and designated base in block-commit command. This
will be used for committing active layer of device.
Sync mode is removed from MirrorBlockJob because there's no proper type
for commit. The used information is is_none_mode.
The common part of mirror_start and commit_active_start is moved to
mirror_start_job().
Fix the comment wording for commit_start.
Signed-off-by: Fam Zheng <address@hidden>
Reviewed-by: Kevin Wolf <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 20a63d2cec838c2dde4d246c4d7abe747d9b7a11
https://github.com/qemu/qemu/commit/20a63d2cec838c2dde4d246c4d7abe747d9b7a11
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/mirror.c
M blockdev.c
M qapi-schema.json
Log Message:
-----------
commit: Support commit active layer
If active is top, it will be mirrored to base, (with block/mirror.c
code), then the image is switched when user completes the block job.
QMP documentation is updated.
Signed-off-by: Fam Zheng <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 4de43470f2f35762b4b3e6a59b4aed55e239024a
https://github.com/qemu/qemu/commit/4de43470f2f35762b4b3e6a59b4aed55e239024a
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M tests/qemu-iotests/040
Log Message:
-----------
qemu-iotests: Update test cases for commit active
Factor out commit test common logic into super class, and update test
of committing the active image.
Signed-off-by: Fam Zheng <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 18da7f94cdce130f2a71387de4980ffa817181a1
https://github.com/qemu/qemu/commit/18da7f94cdce130f2a71387de4980ffa817181a1
Author: Fam Zheng <address@hidden>
Date: 2013-12-20 (Fri, 20 Dec 2013)
Changed paths:
M block/commit.c
Log Message:
-----------
commit: Remove unused check
We support top == active for commit now, remove the check and add an
assertion here.
Signed-off-by: Fam Zheng <address@hidden>
Reviewed-by: Kevin Wolf <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 8a1bd2973ed5f99a3c37c9afdff823c4a22152b1
https://github.com/qemu/qemu/commit/8a1bd2973ed5f99a3c37c9afdff823c4a22152b1
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-22 (Sun, 22 Dec 2013)
Changed paths:
M hw/scsi/scsi-disk.c
Log Message:
-----------
scsi-disk: add UNMAP limits to block limits VPD page
Linux prefers WRITE SAME to UNMAP if the limits are zero, and WRITE
SAME does not discard anything unless the device can guarantee that
the resulting block is zero.
Setting the maximum unmap block and descriptor counts to non-zero
makes Linux choose UNMAP and fixes thin provisioning on glusterfs.
While the maximum unmap block count can have some effect on performance,
the (suggested) maximum number of descriptors is not particularly
important so I didn't add a customization option. SCSI drivers are
used to online firmware updates so I'm not yet adding versioning support
for SCSI, but we're probably getting close to the point when it's worth
thinking about it.
Reported-by: Bharata B Rao <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
Commit: bb43d3839c29b17a2f5c122114cd4ca978065a18
https://github.com/qemu/qemu/commit/bb43d3839c29b17a2f5c122114cd4ca978065a18
Author: Gerd Hoffmann <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/i386/pc_piix.c
Log Message:
-----------
piix: gigabyte alignment for ram
Map 3G (i440fx) of memory below 4G, so the RAM pieces
are nicely aligned to gigabyte borders.
Keep old memory layout for (a) old machine types and (b) in case all
memory fits below 4G and thus we don't have to split RAM into pieces
in the first place. The later makes sure this change doesn't take
away memory from 32bit guests.
So, with i440fx and up to 3.5 GB of memory, all of it will be mapped
below 4G. With more than 3.5 GB of memory 3 GB will be mapped below
4G and the remaining amount will be mapped above 4G.
Signed-off-by: Gerd Hoffmann <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: ecdbfceb0f20a3ef784bf522ed7264660aa3d150
https://github.com/qemu/qemu/commit/ecdbfceb0f20a3ef784bf522ed7264660aa3d150
Author: Michael S. Tsirkin <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/i386/pc_piix.c
Log Message:
-----------
pc_piix: document gigabyte_align
Document the logic behind the below/above 4G split.
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 637a5acb46b36a25b506ba6545e9a53350585b03
https://github.com/qemu/qemu/commit/637a5acb46b36a25b506ba6545e9a53350585b03
Author: Laszlo Ersek <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/i386/pc_sysfw.c
Log Message:
-----------
hw/i386/pc_sysfw: support two flash drives
This patch allows the user to usefully specify
-drive file=img_1,if=pflash,format=raw,readonly \
-drive file=img_2,if=pflash,format=raw
on the command line. The flash images will be mapped under 4G in their
reverse unit order -- that is, with their base addresses progressing
downwards, in increasing unit order.
(The unit number increases with command line order if not explicitly
specified.)
This accommodates the following use case: suppose that OVMF is split in
two parts, a writeable host file for non-volatile variable storage, and a
read-only part for bootstrap and decompressible executable code.
The binary code part would be read-only, centrally managed on the host
system, and passed in as unit 0. The variable store would be writeable,
VM-specific, and passed in as unit 1.
00000000ffe00000-00000000ffe1ffff (prio 0, R-): system.flash1
00000000ffe20000-00000000ffffffff (prio 0, R-): system.flash0
(If the guest tries to write to the flash range that is backed by the
read-only drive, pflash_update() is never called; various flash
programming/erase errors are returned to the guest instead. See the
callers of pflash_update(), and the initialization of "pfl->ro", in
"hw/block/pflash_cfi01.c".)
Signed-off-by: Laszlo Ersek <address@hidden>
Reviewed-by: Markus Armbruster <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: b817e3fb5401bfab49e3c212e6daa1ff1f5a4c9a
https://github.com/qemu/qemu/commit/b817e3fb5401bfab49e3c212e6daa1ff1f5a4c9a
Author: Laszlo Ersek <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M tests/i440fx-test.c
Log Message:
-----------
i440fx-test: qtest_start() should be paired with qtest_end()
Similarly to commit 1d9358e6
("libqtest: New qtest_end() to go with qtest_start()").
Signed-off-by: Laszlo Ersek <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: c37805b6724e5d4c3ad41653630b72b43619474e
https://github.com/qemu/qemu/commit/c37805b6724e5d4c3ad41653630b72b43619474e
Author: Laszlo Ersek <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M tests/i440fx-test.c
Log Message:
-----------
i440fx-test: give each GTest case its own qtest
The current two GTest cases, /i440fx/defaults and /i440fx/pam can share a
qemu process, but the next two cases will need dedicated instances. It is
messy (and order-dependent) to dynamically configure GTest cases one by
one to start, stop, or keep the current qtest (*); let's just have each
GTest work with its own qtest. The performance difference should be
negligible.
(*) As g_test_run() can be invoked at most once per process startup, and
it runs GTest cases in sequence, we'd need clumsy data structures to
control each GTest case to start/stop/keep the qemu instance. Or, we'd
have to code the same information into the test methods themselves, which
would make them even more order-dependent.
Signed-off-by: Laszlo Ersek <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 27d59ccd89a5b112e5a5804250440ea30dbfb891
https://github.com/qemu/qemu/commit/27d59ccd89a5b112e5a5804250440ea30dbfb891
Author: Laszlo Ersek <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M tests/i440fx-test.c
Log Message:
-----------
i440fx-test: generate temporary firmware blob
The blob is 64K in size and contains 0x00..0xFF repeatedly.
The client code added to main() wouldn't make much sense in the long term.
It helps with debugging and it silences gcc about create_blob_file() being
unused, and we'll replace it in the next patch anyway.
Signed-off-by: Laszlo Ersek <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 3bcc77ae9935c8c3d10f63492af81f1d7d99d492
https://github.com/qemu/qemu/commit/3bcc77ae9935c8c3d10f63492af81f1d7d99d492
Author: Laszlo Ersek <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M tests/i440fx-test.c
Log Message:
-----------
i440fx-test: verify firmware under 4G and 1M, both -bios and -pflash
Check whether the firmware is not hidden by other memory regions.
Qemu is started in paused mode: it shouldn't try to interpret generated
garbage.
Signed-off-by: Laszlo Ersek <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: e4f308bbf9f360ee2af5b94b87aef170d8f20dc4
https://github.com/qemu/qemu/commit/e4f308bbf9f360ee2af5b94b87aef170d8f20dc4
Author: Igor Mammedov <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/acpi/piix4.c
Log Message:
-----------
acpi: piix4: remove not needed GPE0 mask
Hardcoded GPE0 mask isn't really needed. Since GPE0_STS initialized
with all bits cleared and only QEMU itself can set bits there (i.e.
guest can only clear bits in it). So guest can't triger SCI
by setting _STS & _EN bits and there is not reason to mask out not
supported _STS bits since they shouldn't be set by QEMU in the first
place.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 063135032808700a5a6b0b4a781f31252da2e762
https://github.com/qemu/qemu/commit/063135032808700a5a6b0b4a781f31252da2e762
Author: Igor Mammedov <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/acpi/core.c
M hw/acpi/ich9.c
M hw/acpi/piix4.c
M include/hw/acpi/acpi.h
Log Message:
-----------
acpi: factor out common pm_update_sci() into acpi core
... and rename it into acpi_update_sci() since it changes
SCI on only on PM registers status.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 2c047956f3b27048883350c071bcd33ef8331d13
https://github.com/qemu/qemu/commit/2c047956f3b27048883350c071bcd33ef8331d13
Author: Igor Mammedov <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/acpi/ich9.c
Log Message:
-----------
acpi: ich9: allow guest to clear SCI rised by GPE
it fixes IRQ storm since guest isn't able to lower SCI IRQ
after it has been handled when it clears GPE event.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: c1a1af87d8d5dce93328bbe8c3db70ff29275069
https://github.com/qemu/qemu/commit/c1a1af87d8d5dce93328bbe8c3db70ff29275069
Author: Igor Mammedov <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/i386/q35-acpi-dsdt.dsl
Log Message:
-----------
ACPI: Q35 DSDT: fix CPU hotplug GPE0.2 handler
Fix bogus CPU hotplug GPE handler.
Make Q35 CPU hotplug GPE handler match PIIX4 one, since
CPU hotplug event is triggered by GPE0.2 register.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: aef52ee87f324fb03e0dcd88a84bdd50c8339a5f
https://github.com/qemu/qemu/commit/aef52ee87f324fb03e0dcd88a84bdd50c8339a5f
Author: Igor Mammedov <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/i386/acpi-dsdt-cpu-hotplug.dsl
Log Message:
-----------
ACPI/DSDT-CPU: cleanup bogus comment
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 81e3e75b6461c53724fe7c7918bc54468fcdaf9d
https://github.com/qemu/qemu/commit/81e3e75b6461c53724fe7c7918bc54468fcdaf9d
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/pci/pci.c
M hw/pci/pci_bridge.c
M include/hw/pci/pci.h
Log Message:
-----------
pci: do not export pci_bus_reset
qbus_reset_all can be used instead. There is no semantic change
because pcibus_reset returns 1 and takes care of the device
tree traversal.
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 9bdbbfc3a04c28dc43af5afffb32066623cb0022
https://github.com/qemu/qemu/commit/9bdbbfc3a04c28dc43af5afffb32066623cb0022
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/pci/pci.c
Log Message:
-----------
pci: clean up resetting of IRQs
pci_device_reset will deassert the INTX pins, and this will make the
irq_count array all-zeroes. Check that this is the case, and remove
the existing loop which might even unsync irq_count and irq_state.
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 0293214b8c5bf56a095d0a39c5821c9da66dd566
https://github.com/qemu/qemu/commit/0293214b8c5bf56a095d0a39c5821c9da66dd566
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/core/qdev.c
M include/hw/qdev-core.h
Log Message:
-----------
qdev: allow both pre- and post-order vists in qdev walking functions
Resetting should be done in post-order, not pre-order. However,
qdev_walk_children and qbus_walk_children do not allow this. Fix
it by adding two extra arguments to the functions.
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: dcc209314afdaeec42f1e2a7bbf37eec3ace23de
https://github.com/qemu/qemu/commit/dcc209314afdaeec42f1e2a7bbf37eec3ace23de
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/core/qdev.c
M hw/pci/pci.c
M hw/s390x/virtio-ccw.c
M include/hw/qdev-core.h
Log Message:
-----------
qdev: switch reset to post-order
Post-order is the only sensible direction for the reset signals.
For example, suppose pre-order is used and the parent has some data
structures that cache children state (for example a list of active
requests). When the reset method is invoked on the parent, these caches
could be in any state.
If post-order is used, on the other hand, these will be in a known state
when the reset method is invoked on the parent.
This change means that it is no longer possible to block the visit of
the devices, so the callback is changed to return void. This is not
a problem, because PCI was returning 1 exactly in order to achieve the
same ordering that this patch implements.
PCI can then rely on the qdev core having sent a "reset signal" (whatever
that means) to the device, and only do the PCI-specific initialization
with pci_do_device_reset.
MST: fixed up virtio-ccw
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 4fadb3bb570c5a665bd6f7e300d63c306e67b668
https://github.com/qemu/qemu/commit/4fadb3bb570c5a665bd6f7e300d63c306e67b668
Author: Richard Henderson <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M cputlb.c
Log Message:
-----------
cputlb: Use memset() when flushing entries
The size of tlb_table is 4k on a 64-bit host. For overwriting
memory at this size, cacheline tricks can help.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: eb2535f411c2201cd6f79e8d2b4e3f4c5b765729
https://github.com/qemu/qemu/commit/eb2535f411c2201cd6f79e8d2b4e3f4c5b765729
Author: Richard Henderson <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M cputlb.c
M translate-all.c
Log Message:
-----------
cputlb: Tidy memset() of arrays
Don't duplicate the array length computation in the memset()
when plain sizeof() can produce the correct results.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: 02e51483341a371b508c1a529782d83064c93596
https://github.com/qemu/qemu/commit/02e51483341a371b508c1a529782d83064c93596
Author: Chen Fan <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M cpu-exec.c
M cpus.c
M hw/i386/kvmvapic.c
M hw/i386/pc.c
M target-i386/cpu-qom.h
M target-i386/cpu.c
M target-i386/cpu.h
M target-i386/helper.c
M target-i386/kvm.c
M target-i386/misc_helper.c
Log Message:
-----------
target-i386: Move apic_state field from CPUX86State to X86CPU
This motion is preparing for refactoring vCPU APIC subsequently.
Signed-off-by: Chen Fan <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: ddaaefb4dd427d6d2e41c1cfbe0cd8d8e8d6aad9
https://github.com/qemu/qemu/commit/ddaaefb4dd427d6d2e41c1cfbe0cd8d8e8d6aad9
Author: Gerd Hoffmann <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/i386/pc_piix.c
M hw/pci-host/piix.c
M include/hw/i386/pc.h
Log Message:
-----------
piix: fix 32bit pci hole
Make the 32bit pci hole start at end of ram, so all possible address
space is covered.
We used to try and make addresses aligned so they are easier to cover
with MTRRs, but since they are cosmetic on KVM, this is probably not
worth worrying about.
Of course the firmware can use less than that. Leaving space unused is
no problem, mapping pci bars outside the hole causes problems though.
Signed-off-by: Gerd Hoffmann <address@hidden>
Signed-off-by: Laszlo Ersek <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 83d0704734955bf1aa7697af7be2a50e11a80a42
https://github.com/qemu/qemu/commit/83d0704734955bf1aa7697af7be2a50e11a80a42
Author: Paolo Bonzini <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M hw/virtio/virtio.c
Log Message:
-----------
virtio: add back call to virtio_bus_device_unplugged
This got lost in a rebase.
Reported-by: Stefan Hajnoczi <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Commit: 5bf58abf1cb7220d9f7d8e18f113a353cd6f260d
https://github.com/qemu/qemu/commit/5bf58abf1cb7220d9f7d8e18f113a353cd6f260d
Author: Michael S. Tsirkin <address@hidden>
Date: 2013-12-23 (Mon, 23 Dec 2013)
Changed paths:
M target-arm/cpu64.c
Log Message:
-----------
target-arm: fix build with gcc 4.8.2
commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3
"target-arm: A64: add set_pc cpu method"
introduces an array aarch64_cpus which is zero
size if this code is built without CONFIG_USER_ONLY.
In particular an attempt to iterate over this array produces a warning
under gcc 4.8.2:
CC aarch64-softmmu/target-arm/cpu64.o
/scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
/scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
expression < 0 is always false [-Werror=type-limits]
for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
^
cc1: all warnings being treated as errors
This is the result of ARRAY_SIZE being an unsigned type,
causing "i" to be promoted to unsigned int as well.
As zero size arrays are a gcc extension, it seems
cleanest to add a dummy element with NULL name,
and test for it during registration.
We'll be able to drop this when we add more CPUs.
Cc: Alexander Graf <address@hidden>
Cc: Peter Maydell <address@hidden>
Cc: Richard Henderson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Stefan Weil <address@hidden>
Commit: 693fa551f96cc4b7a6647f6f55636ee0b6d3a04b
https://github.com/qemu/qemu/commit/693fa551f96cc4b7a6647f6f55636ee0b6d3a04b
Author: Andreas Färber <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M cpu-exec.c
Log Message:
-----------
cpu-exec: Optimize X86CPU usage in cpu_exec()
Replace growing numbers of inline x86_env_get_cpu() with x86_cpu variable.
Reviewed-by: Chen Fan <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: 89314504197b305173e3f2d23ce541898ef2691c
https://github.com/qemu/qemu/commit/89314504197b305173e3f2d23ce541898ef2691c
Author: Igor Mammedov <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M target-i386/cpu.c
Log Message:
-----------
target-i386: Convert 'hv_relaxed' to static property
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: 0f46685d1b03efaaf5189f0e9af8754cb8f8979c
https://github.com/qemu/qemu/commit/0f46685d1b03efaaf5189f0e9af8754cb8f8979c
Author: Igor Mammedov <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M target-i386/cpu.c
Log Message:
-----------
target-i386: Convert 'hv_vapic' to static property
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: c8f0f88e2a4cf27bde27a31a98badd61fe212652
https://github.com/qemu/qemu/commit/c8f0f88e2a4cf27bde27a31a98badd61fe212652
Author: Igor Mammedov <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M target-i386/cpu.c
Log Message:
-----------
target-i386: Convert 'hv_spinlocks' to static property
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: 912ffc479c0008bd983f5733daa52438b359be6f
https://github.com/qemu/qemu/commit/912ffc479c0008bd983f5733daa52438b359be6f
Author: Igor Mammedov <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M target-i386/cpu-qom.h
M target-i386/cpu.c
Log Message:
-----------
target-i386: Convert 'check' and 'enforce' to static properties
* Additionally convert check_cpuid & enforce_cpuid to bool and make them
members of X86CPU
* Make 'enforce' feature independent from 'check'
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: 258f5abe9a8786c410f98367e9e042ee16c249f2
https://github.com/qemu/qemu/commit/258f5abe9a8786c410f98367e9e042ee16c249f2
Author: Igor Mammedov <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M target-i386/cpu.c
Log Message:
-----------
target-i386: Cleanup 'foo' feature handling
Features check, enforce, hv_relaxed and hv_vapic are treated as boolean
set to 'on' when passed from command line, so it's not necessary to
handle each of them separately. Collapse them to one catch-all branch
which will treat any feature in format 'foo' as boolean set to 'on'.
Any unknown feature will be rejected by CPU property setter so there is no
need to check for unknown feature in cpu_x86_parse_featurestr(), therefore
it's replaced by above mentioned catch-all handler.
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: d024d209045b912eb6127861fab2af6c64880efd
https://github.com/qemu/qemu/commit/d024d209045b912eb6127861fab2af6c64880efd
Author: Igor Mammedov <address@hidden>
Date: 2013-12-24 (Tue, 24 Dec 2013)
Changed paths:
M target-i386/cpu.c
Log Message:
-----------
target-i386: Cleanup 'foo=val' feature handling
Features family, model, stepping, level, hv_spinlocks are treated similarly
when passed from command line, so it's not necessary to handle each of them
individually. Collapse them to one catch-all branch which will treat
any not explicitly handled feature in format 'foo=val'.
Any unknown feature will be rejected by property setter so there is no
need to check for unknown feature in cpu_x86_parse_featurestr(), therefore
it's replaced by above mentioned catch-all handler.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
Commit: 19917791fd1433b79d20b26440ec321d71dcfc01
https://github.com/qemu/qemu/commit/19917791fd1433b79d20b26440ec321d71dcfc01
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M linux-user/aarch64/target_cpu.h
M linux-user/arm/target_cpu.h
M linux-user/main.c
M target-arm/cpu.h
M target-arm/helper.c
Log Message:
-----------
target-arm: Widen thread-local register state fields to 64 bits
The common pattern for system registers in a 64-bit capable ARM
CPU is that when in AArch32 the cp15 register is a view of the
bottom 32 bits of the 64-bit AArch64 system register; writes in
AArch32 leave the top half unchanged. The most natural way to
model this is to have the state field in the CPU struct be a
64 bit value, and simply have the AArch32 TCG code operate on
a pointer to its lower half.
For aarch64-linux-user the only registers we need to share like
this are the thread-local-storage ones. Widen their fields to
64 bits and provide the 64 bit reginfo struct to make them
visible in AArch64 state. Note that minor cleanup of the AArch64
system register encoding space means We can share the TPIDR_EL1
reginfo but need split encodings for TPIDR_EL0 and TPIDRRO_EL0.
Since we're touching almost every line in QEMU that uses the
c13_tls* fields in this patch anyway, we take the opportunity
to rename them in line with the standard ARM architectural names
for these registers.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 03468633b16e96176ffbe7fd1943f7014e63ccde
https://github.com/qemu/qemu/commit/03468633b16e96176ffbe7fd1943f7014e63ccde
Author: Claudio Fontana <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: add support for add/sub with carry
This patch adds support for C3.5.3 Add/subtract (with carry):
instructions ADC, ADCS, SBC, SBCS.
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: fc514b094e8f5aa211a36925b62348ab52243762
https://github.com/qemu/qemu/commit/fc514b094e8f5aa211a36925b62348ab52243762
Author: Claudio Fontana <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: add support for conditional compare insns
this patch adds support for C3.5.4 - C3.5.5
Conditional compare (both immediate and register)
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 66759c063c3472fe70df0c8489ecc6fd7dc1a843
https://github.com/qemu/qemu/commit/66759c063c3472fe70df0c8489ecc6fd7dc1a843
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: aarch64: add support for ld lit
Adds support for Load Register (literal), both normal
and SIMD/FP forms.
Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 90ba562c61b15f418f284751faa81aca25de2d95
https://github.com/qemu/qemu/commit/90ba562c61b15f418f284751faa81aca25de2d95
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M linux-user/main.c
M target-arm/cpu.h
M target-arm/machine.c
M target-arm/translate.c
Log Message:
-----------
target-arm: Widen exclusive-access support struct fields to 64 bits
In preparation for adding support for A64 load/store exclusive instructions,
widen the fields in the CPU state struct that deal with address and data values
for exclusives from 32 to 64 bits. Although in practice AArch64 and AArch32
exclusive accesses will be generally separate there are some odd theoretical
corner cases (eg you should be able to do the exclusive load in AArch32, take
an exception to AArch64 and successfully do the store exclusive there), and it's
also easier to reason about.
The changes in semantics for the variables are:
exclusive_addr -> extended to 64 bits; -1ULL for "monitor lost",
otherwise always < 2^32 for AArch32
exclusive_val -> extended to 64 bits. 64 bit exclusives in AArch32 now
use the high half of exclusive_val instead of a separate exclusive_high
exclusive_high -> is no longer used in AArch32; extended to 64 bits as
it will be needed for AArch64's pair-of-64-bit-values exclusives.
exclusive_test -> extended to 64 bits, as it is an address. Since this is
a linux-user-only field, in arm-linux-user it will always have the top
32 bits zero.
exclusive_info -> stays 32 bits, as it is neither data nor address, but
simply holds register indexes etc. AArch64 will be able to fit all its
information into 32 bits as well.
Note that the refactoring of gen_store_exclusive() coincidentally fixes
a minor bug where ldrexd would incorrectly update the first CPU register
even if the load for the second register faulted.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 2df7566445c8b0934030627dff2c2417ec6d8e27
https://github.com/qemu/qemu/commit/2df7566445c8b0934030627dff2c2417ec6d8e27
Author: Michael Matz <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M linux-user/main.c
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: support for ld/st/cl exclusive
This implement exclusive loads/stores for aarch64 along the lines of
arm32 and ppc implementations. The exclusive load remembers the address
and loaded value. The exclusive store throws an an exception which uses
those values to check for equality in a proper exclusive region.
This is not actually the architecture mandated semantics (for either
AArch32 or AArch64) but it is close enough for typical guest code
sequences to work correctly, and saves us from having to monitor all
guest stores. It's fairly easy to come up with test cases where we
don't behave like hardware - we don't for example model cache line
behaviour. However in the common patterns this works, and the existing
32 bit ARM exclusive access implementation has the same limitations.
AArch64 also implements new acquire/release loads/stores (which may be
either exclusive or non-exclusive). These imposes extra ordering
constraints on memory operations (ie they act as if they have an implicit
barrier built into them). As TCG is single-threaded all our barriers
are no-ops, so these just behave like normal loads and stores.
Signed-off-by: Michael Matz <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 749c7970d00cdb2be71ce66d65b9eb2ade668832
https://github.com/qemu/qemu/commit/749c7970d00cdb2be71ce66d65b9eb2ade668832
Author: Claudio Fontana <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M linux-user/aarch64/syscall.h
Log Message:
-----------
linux-user: AArch64: define TARGET_CLONE_BACKWARDS
The AArch64 linux-user support was written before but merged after
commit 4ce6243dc621 which cleaned up the handling of the clone()
syscall argument order, so we failed to notice that AArch64 also needs
TARGET_CLONE_BACKWARDS to be defined. Add this define so that clone
and fork syscalls work correctly.
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: e0350d0c17d31b276812e659d8bdf9fc48a59951
https://github.com/qemu/qemu/commit/e0350d0c17d31b276812e659d8bdf9fc48a59951
Author: Will Newton <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M linux-user/signal.c
Log Message:
-----------
linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontext
Use the helpers provided for getting the correct FPSR and FPCR
values for the signal context.
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 2d123ad256fb47bac33c38f90dafb4280879aee5
https://github.com/qemu/qemu/commit/2d123ad256fb47bac33c38f90dafb4280879aee5
Author: Alex Bennée <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M .travis.yml
Log Message:
-----------
.travis.yml: Add aarch64-* targets
Now the AArch64 targets are in mainline we can include them in our
Travis test matrix.
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 0f64fdaf7bd11a9165cc4b7461fb5a316819d257
https://github.com/qemu/qemu/commit/0f64fdaf7bd11a9165cc4b7461fb5a316819d257
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
A default-configs/aarch64-linux-user.mak
Log Message:
-----------
default-configs: Add config for aarch64-linux-user
Add a config for aarch64-linux-user, thereby enabling it as
a valid target.
Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 83d210fb670862e9df5ca19d260fd7628cd67843
https://github.com/qemu/qemu/commit/83d210fb670862e9df5ca19d260fd7628cd67843
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add support for dumping AArch64 VFP register state
When dumping the current CPU state, we can also get a request
to dump the FPU state along with the CPU's integer state.
Add support to dump the VFP state when that flag is set, so that
we can properly debug code that modifies floating point registers.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, rebased. Output all registers, two per-line.]
Signed-off-by: Will Newton <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 76afb0d5967ebee59efbf3bfc6a2a042f3cb06f6
https://github.com/qemu/qemu/commit/76afb0d5967ebee59efbf3bfc6a2a042f3cb06f6
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Fix vector register access on bigendian hosts
The A64 128 bit vector registers are stored as a pair of
uint64_t values in the register array. This means that if
we're directly loading or storing a value of size less than
64 bits we must adjust the offset appropriately to account
for whether the host is bigendian or not. Provide utility
functions to abstract away the offsetof() calculations for
the FP registers.
For do_fp_st() we can sidestep most of the issues for 64 bit
and smaller reg-to-mem transfers by always doing a 64 bit
load from the register and writing just the piece we need
to memory.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 286cb8b9cb04048b940bd9f385404781a42c6cff
https://github.com/qemu/qemu/commit/286cb8b9cb04048b940bd9f385404781a42c6cff
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
M target-arm/helper.h
M target-arm/neon_helper.c
M target-arm/translate.c
Log Message:
-----------
target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Use the VFP_BINOP macro to provide helpers for min, max, minnum
and maxnum, rather than hand-rolling them. (The float64 max
version is not used by A32 but will be needed for A64.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 459cc34290b2823403f9820345c8a83f66495e1d
https://github.com/qemu/qemu/commit/459cc34290b2823403f9820345c8a83f66495e1d
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add "Floating-point data-processing (2 source)" insns
This patch adds emulation for the "Floating-point data-processing (2 source)"
group of instructions.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, merge single and double precision patches. Rebase
and update to new infrastructure. Incorporate FMIN/FMAX support patch by
Michael Matz.]
Signed-off-by: Will Newton <address@hidden>
[PMM:
* added convenience accessors for FP s and d regs
* pulled the field decode and opcode validity check up a level]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: cd54be5fdbded3346a94fcf71f4a1d9aed340d40
https://github.com/qemu/qemu/commit/cd54be5fdbded3346a94fcf71f4a1d9aed340d40
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add "Floating-point data-processing (3 source)" insns
This patch adds emulation for the "Floating-point data-processing (3 source)"
group of instructions.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, merged single and double precision patches.
Implement using muladd as suggested by Richard Henderson.]
Signed-off-by: Will Newton <address@hidden>
[PMM: pull field decode up a level, use register accessors]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 624490c33ccd803b730d3600d943472bfcc5fa59
https://github.com/qemu/qemu/commit/624490c33ccd803b730d3600d943472bfcc5fa59
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add fmov (scalar, immediate) instruction
This patch adds emulation for the fmov instruction working on scalars
with an immediate payload.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, rebase and use new infrastructure.]
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 244976576d47543901c8d5ccb7f1f191f74b46f5
https://github.com/qemu/qemu/commit/244976576d47543901c8d5ccb7f1f191f74b46f5
Author: Claudio Fontana <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper-a64.c
M target-arm/helper-a64.h
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add support for floating point compare
Add decoding support for C3.6.22 Floating-point compare.
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 32ca04a60fa1ab1b08bcdb9474af3ecf036f8f0f
https://github.com/qemu/qemu/commit/32ca04a60fa1ab1b08bcdb9474af3ecf036f8f0f
Author: Claudio Fontana <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add support for floating point conditional compare
This adds decoding support for C3.6.23 FP Conditional Compare.
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 7b2440e4384e59a3d5228cbd53b76089075e9e71
https://github.com/qemu/qemu/commit/7b2440e4384e59a3d5228cbd53b76089075e9e71
Author: Claudio Fontana <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add support for floating point cond select
This adds decoding support for C3.6.24 FP conditional select.
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: f9dfa55857f4f172d4c23011d18f260c875e4bfb
https://github.com/qemu/qemu/commit/f9dfa55857f4f172d4c23011d18f260c875e4bfb
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/cpu.h
M target-arm/helper.c
Log Message:
-----------
target-arm: Give the FPSCR rounding modes names
When setting rounding modes we currently just hardcode the numeric values
for rounding modes in a big switch statement.
With AArch64 support coming, we will need to refer to these rounding modes
at different places throughout the code though, so let's better give them
names so we don't get confused by accident.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, use names from ARM ARM.]
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 2c7fd04c9348abada0be331b04f9e5cbeeb2ac18
https://github.com/qemu/qemu/commit/2c7fd04c9348abada0be331b04f9e5cbeeb2ac18
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Mark struct fields as public/private
As per current QOM conventions.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 362f656878345e9e50b6f7c676a1961d9ecaa355
https://github.com/qemu/qemu/commit/362f656878345e9e50b6f7c676a1961d9ecaa355
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Add missing uart_update_state
This should be rechecked on bus write accesses as such accesses may
change the underlying state that generates the interrupt. Particular
relevant for when the guest touches the interrupt status or mask.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: b56fab8847e5746085c46a5bf6b5903b3b9fe957
https://github.com/qemu/qemu/commit/b56fab8847e5746085c46a5bf6b5903b3b9fe957
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Fix reset.
Don't reset the uart as an init step. Register the reset function as a
proper reset fn instead.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 8998a3c0ceb174d1c6089361efe870bb4f40a27c
https://github.com/qemu/qemu/commit/8998a3c0ceb174d1c6089361efe870bb4f40a27c
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: s/r_fifo/rx_fifo
Rename this field to match the many other uses of "rx". Xilinx
docmentation (UG585) also refers to this as "RxFIFO".
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: a24234cad03d70612e30494f21062fcee5eb9f0e
https://github.com/qemu/qemu/commit/a24234cad03d70612e30494f21062fcee5eb9f0e
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Simplify status generation
The status register bits are always pure functions of other device
state. Move the generation of these bits to the update_status()
function to simplify. Makes developing much easier as theres now no need
to recheck status bits on all the changes to rx/tx fifo state.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 2c628d98989fa224dc3c07033ba4d89562a9bb5f
https://github.com/qemu/qemu/commit/2c628d98989fa224dc3c07033ba4d89562a9bb5f
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Define Missing SR/ISR fields
Some (interrupt) status register bits relating to the TxFIFO path were
not defined. Define them. This prepares support for proper Tx data path
flow control.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: faa79359cdb28916b102024e49916af212b344bf
https://github.com/qemu/qemu/commit/faa79359cdb28916b102024e49916af212b344bf
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Remove TX timer & add TX FIFO state
This tx timer implementation is flawed. Despite the controller
attempting to time the guest visable assertion of the TX-empty status
bit (and corresponding interrupt) the controller is still transmitting
characters instantaneously. There is also no sense of multiple character
delay.
The only side effect of this timer is assertion of tx-empty status. So
just remove the timer completely and hold tx-empty as permanently
asserted (its reset status). This matches the actual behaviour of
instantaneous transmission.
While we are VMSD version bumping, add the tx_fifo as device state to
prepare for upcomming TxFIFO flow control. Implement the interrupt
generation logic for the TxFIFO occupancy.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 61654c77413d1bccb69b384d891d0c688a31430b
https://github.com/qemu/qemu/commit/61654c77413d1bccb69b384d891d0c688a31430b
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Fix can_receive logic
The can_receive logic was only taking into account the RxFIFO
occupancy. RxFIFO population is only used for the echo and normal modes
however. Improve the logic to correctly return the true number of
receivable characters based on the current mode:
Normal mode: RxFIFO vacancy.
Remote loopback: TxFIFO vacancy.
Echo mode: The min of the TxFIFO and RxFIFO vacancies.
Local Loopback: Return non-zero (to implement droppage)
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 9e263f73912ba35510d7d7be4c40ba871d4b57e2
https://github.com/qemu/qemu/commit/9e263f73912ba35510d7d7be4c40ba871d4b57e2
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Use the TX fifo for transmission
Populate the TxFIFO with the Tx data before sending. Prepares
support for proper Tx flow control implementation.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: a33f37a1784691556ed6fd3f58badfce22b761ad
https://github.com/qemu/qemu/commit/a33f37a1784691556ed6fd3f58badfce22b761ad
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Delete redundant rx rst logic
uart_rx_reset() called immediately above already does this. Remove.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 294cdac2a02d3172b69c84dec727d6ac6006bb59
https://github.com/qemu/qemu/commit/294cdac2a02d3172b69c84dec727d6ac6006bb59
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/char/cadence_uart.c
Log Message:
-----------
char/cadence_uart: Implement Tx flow control
If the UART back-end blocks, buffer in the Tx FIFO to try again later.
This stops the IO-thread busy waiting on char back-ends (which causes
all sorts of performance problems).
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: d045815a5712afbeb8d2c76d8b624c91cfda777c
https://github.com/qemu/qemu/commit/d045815a5712afbeb8d2c76d8b624c91cfda777c
Author: Sergey Fedorov <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
Log Message:
-----------
target-arm: use c13_context field for CONTEXTIDR
Use c13_context field instead of c13_fcse for CONTEXTIDR register
definition.
Signed-off-by: Sergey Fedorov <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 8455bc76c76c5246694290a28c6ebd6797011c18
https://github.com/qemu/qemu/commit/8455bc76c76c5246694290a28c6ebd6797011c18
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
Log Message:
-----------
target-arm: remove raw_read|write duplication
There is an inline duplication of the raw_read and raw_write function
bodies. Fix by just calling raw_read/raw_write instead.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: ec0e68ef1da316b3ead1943d8f607cc68b13e0d1
https://github.com/qemu/qemu/commit/ec0e68ef1da316b3ead1943d8f607cc68b13e0d1
Author: Peter Crosthwaite <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/arm/xilinx_zynq.c
Log Message:
-----------
arm/xilinx_zynq: Always instantiate the GEMs
Don't conditionalise GEM instantiation on networking attachments. The
device should always be present even if not attached to a network.
This allows for probing of the device by expectant guests (such as
OS's). This is needed because sysbus (or AXI in Xilinx's real hw case)
is not self identifying so the guest has no dynamic way of detecting
device absence.
Also allows for testing of the GEM in loopback mode with -net none.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 455e1e14bbfaf72275efeddaa7bc5d6294253eff
https://github.com/qemu/qemu/commit/455e1e14bbfaf72275efeddaa7bc5d6294253eff
Author: Michael S. Tsirkin <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/cpu64.c
Log Message:
-----------
target-arm: fix build with gcc 4.8.2
commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3
"target-arm: A64: add set_pc cpu method"
introduces an array aarch64_cpus which is zero
size if this code is built without CONFIG_USER_ONLY.
In particular an attempt to iterate over this array produces a warning
under gcc 4.8.2:
CC aarch64-softmmu/target-arm/cpu64.o
/scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
/scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
expression < 0 is always false [-Werror=type-limits]
for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
^
cc1: all warnings being treated as errors
This is the result of ARRAY_SIZE being an unsigned type,
causing "i" to be promoted to unsigned int as well.
As zero size arrays are a gcc extension, it seems
cleanest to add a dummy element with NULL name,
and test for it during registration.
We'll be able to drop this when we add more CPUs.
Cc: Alexander Graf <address@hidden>
Cc: Peter Maydell <address@hidden>
Cc: Richard Henderson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
Reviewed-by: Stefan Weil <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 07c935087a5541fb167fecf3bef810de2605f93f
https://github.com/qemu/qemu/commit/07c935087a5541fb167fecf3bef810de2605f93f
Author: Christoffer Dall <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/intc/arm_gic.c
M hw/intc/arm_gic_common.c
M hw/intc/gic_internal.h
M include/hw/intc/arm_gic_common.h
Log Message:
-----------
arm_gic: Rename GIC_X_TRIGGER to GIC_X_EDGE_TRIGGER
TRIGGER can really mean mean anything (e.g. was it triggered, is it
level-triggered, is it edge-triggered, etc.). Rename to EDGE_TRIGGER to
make the code comprehensible without looking up the data structure.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Christoffer Dall <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: e3d8cc0536699b66f58b0e3a13a70ee007f61647
https://github.com/qemu/qemu/commit/e3d8cc0536699b66f58b0e3a13a70ee007f61647
Author: Christoffer Dall <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M hw/intc/arm_gic.c
M hw/intc/gic_internal.h
Log Message:
-----------
hw: arm_gic: Introduce gic_set_priority function
To make the code slightly cleaner to look at and make the save/restore
code easier to understand, introduce this function to set the priority of
interrupts.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Christoffer Dall <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 1bf6beec8a012cae4bb6fbc89c465127e9650c92
https://github.com/qemu/qemu/commit/1bf6beec8a012cae4bb6fbc89c465127e9650c92
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Fix exception flag handling for float32_to_float16()
Our float32 to float16 conversion routine was generating the correct
numerical answers, but not always setting the right set of exception
flags. Fix this, mostly by rearranging the code to more closely
resemble RoundAndPackFloat*, and in particular:
* non-IEEE halfprec always raises Invalid for input NaNs
* we need to check for the overflow case before underflow
* we weren't getting the tininess-detected-after-rounding
case correct (somewhat academic since only ARM uses halfprec
and it is always tininess-detected-before-rounding)
* non-IEEE halfprec overflow raises only Invalid, not
Invalid + Inexact
* we weren't setting Inexact when we should
Also add some clarifying comments about what the code is doing.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: e0a2db7128626a795c3657ffcaff40514e998e2f
https://github.com/qemu/qemu/commit/e0a2db7128626a795c3657ffcaff40514e998e2f
Author: Will Newton <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Add float to 16bit integer conversions.
ARMv8 requires support for converting 32 and 64bit floating point
values to signed and unsigned 16bit integers.
Signed-off-by: Will Newton <address@hidden>
[PMM: updated not to incorrectly set Inexact for Invalid inputs]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 44e09132cae159ce1e2f3d0aebd62c8298224a6d
https://github.com/qemu/qemu/commit/44e09132cae159ce1e2f3d0aebd62c8298224a6d
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Add 16 bit integer to float conversions
Add the float to 16 bit integer conversion routines. These can be
trivially implemented in terms of the int32_to_float* routines, but
providing them makes our API more symmetrical and can simplify callers.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 564658dc8c5fabdc73702967590a5652bc45107f
https://github.com/qemu/qemu/commit/564658dc8c5fabdc73702967590a5652bc45107f
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Make the int-to-float functions take exact-width types
Currently the int-to-float functions take types which are specified
as "at least X bits wide", rather than "exactly X bits wide". This is
confusing and unhelpful since it means that the callers have to include
an explicit cast to [u]intXX_t to ensure the correct behaviour. Fix
them all to take the exactly-X-bits-wide types instead.
Note that this doesn't change behaviour at all since at the moment
we happen to define the 'int32' and 'uint32' types as exactly 32 bits
wide, and the 'int64' and 'uint64' types as exactly 64 bits wide.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: f883b3896ed5e180f234613aadca019fdbe7c49c
https://github.com/qemu/qemu/commit/f883b3896ed5e180f234613aadca019fdbe7c49c
Author: Tom Musta <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests that
the implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floating
point number to an unsigned, 64 bit integer.
This contribution can be licensed under either the softfloat-2a or -2b
license.
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: f2e933d20d5fd6c38bda227359b79bcc81654f99
https://github.com/qemu/qemu/commit/f2e933d20d5fd6c38bda227359b79bcc81654f99
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Only raise Invalid when conversions to int are out of range
We implement a number of float-to-integer conversions using conversion
to an integer type with a wider range and then a check against the
narrower range we are actually converting to. If we find the result to
be out of range we correctly raise the Invalid exception, but we must
also suppress other exceptions which might have been raised by the
conversion function we called.
This won't throw away exceptions we should have preserved, because for
the 'core' exception flags the IEEE spec mandates that the only valid
combinations of exception that can be raised by a single operation are
Inexact + Overflow and Inexact + Underflow. For the non-IEEE softfloat
flag for input denormals, we can guarantee that that flag won't have
been set for out of range float-to-int conversions because a squashed
denormal by definition goes to plus or minus zero, which is always in
range after conversion to integer zero.
This bug has been fixed for some of the float-to-int conversion routines
by previous patches; fix it for the remaining functions as well, so
that they all restore the pre-conversion status flags prior to raising
Invalid.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 0ace25a5676af233a9b5abf48599dbcc45f92dcf
https://github.com/qemu/qemu/commit/0ace25a5676af233a9b5abf48599dbcc45f92dcf
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Fix factor 2 error for scalbn on denormal inputs
If the input to float*_scalbn() is denormal then it represents
a number 0.[mantissabits] * 2^(1-exponentbias) (and the actual
exponent field is all zeroes). This means that when we convert
it to our unpacked encoding the unpacked exponent must be one
greater than for a normal number, which represents
1.[mantissabits] * 2^(e-exponentbias) for an exponent field e.
This meant we were giving answers too small by a factor of 2 for
all denormal inputs.
Note that the float-to-int routines also have this behaviour
of not adjusting the exponent for denormals; however there it is
harmless because denormals will all convert to integer zero anyway.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 47a34e009de2f4a99862e71e1d15d178dac5f259
https://github.com/qemu/qemu/commit/47a34e009de2f4a99862e71e1d15d178dac5f259
Author: Tom Musta <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Add float32_to_uint64()
This patch adds the float32_to_uint64() routine, which converts a
32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed under either the softfloat-2a or -2b
license.
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[PMM: removed harmless but silly int64_t casts]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: a757f1c2deb6c8eac4a75f8e817fa2d7c8cd2527
https://github.com/qemu/qemu/commit/a757f1c2deb6c8eac4a75f8e817fa2d7c8cd2527
Author: Tom Musta <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Fix float64_to_uint64_round_to_zero
The float64_to_uint64_round_to_zero routine is incorrect.
For example, the following test pattern:
46697351FF4AEC29 / 0x1.97351ff4aec29p+103
currently produces 8000000000000000 instead of FFFFFFFFFFFFFFFF.
This patch re-implements the routine to temporarily force the
rounding mode and use the float64_to_uint64 routine.
This contribution can be licensed under either the softfloat-2a or -2b
license.
Signed-off-by: Tom Musta <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 8d551c988e96ac4cfe462e6b34d513bba2da572f
https://github.com/qemu/qemu/commit/8d551c988e96ac4cfe462e6b34d513bba2da572f
Author: Tom Musta <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Fix float64_to_uint32
The float64_to_uint32 has several flaws:
- for numbers between 2**32 and 2**64, the inexact exception flag
may get incorrectly set. In this case, only the invalid flag
should be set.
test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
- for numbers between 2**63 and 2**64, incorrect results may
be produced:
test pattern: 43EAAF73F1F0B8BD / 0x1.aaf73f1f0b8bdp+63
This patch re-implements float64_to_uint32 to re-use the
float64_to_uint64 routine (instead of float64_to_int64). For the
saturation case, we ignore any flags which the conversion routine
has set and raise only the invalid flag.
This contribution can be licensed under either the softfloat-2a or -2b
license.
Signed-off-by: Tom Musta <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 2958f14d75b9c2ef9a68f41a3101884af307e4f8
https://github.com/qemu/qemu/commit/2958f14d75b9c2ef9a68f41a3101884af307e4f8
Author: Tom Musta <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Fix float64_to_uint32_round_to_zero
The float64_to_uint32_round_to_zero routine is incorrect.
For example, the following test pattern:
425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
will erroneously set the inexact flag.
This patch re-implements the routine to use the float64_to_uint64_round_to_zero
routine. If saturation occurs we ignore any flags set by the
conversion function and raise only Invalid.
This contribution can be licensed under either the softfloat-2a or -2b
license.
Signed-off-by: Tom Musta <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: e9ef30c079354db6a8eb5bd6574b948288a55b94
https://github.com/qemu/qemu/commit/e9ef30c079354db6a8eb5bd6574b948288a55b94
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Provide complete set of accessors for fp state
Tidy up the get/set accessors for the fp state to add missing ones
and make them all inline in softfloat.h rather than some inline and
some not.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 84c6b75d8557a6e638dc72343428b0a78b66923f
https://github.com/qemu/qemu/commit/84c6b75d8557a6e638dc72343428b0a78b66923f
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
In preparation for adding conversions between float16 and float64,
factor out code currently done inline in the float16<=>float32
conversion functions into functions RoundAndPackFloat16 and
NormalizeFloat16Subnormal along the lines of the existing versions
for the other float types.
Note that we change the handling of zExp from the inline code
to match the API of the other RoundAndPackFloat functions; however
we leave the positioning of the binary point between bits 22 and 23
rather than shifting it up to the high end of the word.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 7b378119bd67609f25bd78b714d0fab922600f40
https://github.com/qemu/qemu/commit/7b378119bd67609f25bd78b714d0fab922600f40
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Add float16 <=> float64 conversion functions
Add the conversion functions float16_to_float64() and
float64_to_float16(), which will be needed for the ARM
A64 instruction set.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 01a0b83cdb1c29a0066cfee3445a34280b3ac03a
https://github.com/qemu/qemu/commit/01a0b83cdb1c29a0066cfee3445a34280b3ac03a
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
softfloat: Refactor code handling various rounding modes
Refactor the code in various functions which calculates rounding
increments given the current rounding mode, so that instead of a
set of nested if statements we have a simple switch statement.
This will give us a clean place to add the case for the new
tiesAway rounding mode.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: dcc69632089fece07a0bb4fd859b010659569fda
https://github.com/qemu/qemu/commit/dcc69632089fece07a0bb4fd859b010659569fda
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
softfloat: Add support for ties-away rounding
IEEE754-2008 specifies a new rounding mode:
"roundTiesToAway: the floating-point number nearest to the infinitely
precise result shall be delivered; if the two nearest floating-point
numbers bracketing an unrepresentable infinitely precise result are
equally near, the one with larger magnitude shall be delivered."
Implement this new mode (it is needed for ARM). The general principle
is that the required code is exactly like the ties-to-even code,
except that we do not need to do the "in case of exact tie clear LSB
to round-to-even", because the rounding operation naturally causes
the exact tie to round up in magnitude.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 59af2dc86866dc14a42eec596f3d100dd3a24d1e
https://github.com/qemu/qemu/commit/59af2dc86866dc14a42eec596f3d100dd3a24d1e
Author: Will Newton <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
Log Message:
-----------
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
Make the VFP_CONV_FIX helpers a little more flexible in
preparation for the A64 uses. This requires two changes:
* use the correct softfloat conversion function based on itype
rather than always the int32 one; this is possible now that
softfloat provides int16 versions and necessary for the
future conversion-to-int64 A64 variants. This also allows
us to drop the awkward 'sign' macro argument.
* split the 'fsz' argument which currently controls both
width of the input float type and width of the output
integer type into two; this will allow us to specify the
A64 64-bit-int-to-single conversion function, where the
two widths are different.
We can also drop the (itype##_t) cast now that softfloat
guarantees that all the itype##_to_float* functions take
an integer argument of exactly the correct type.
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 6ab748af130912b92decfb1fa411ebdfd7cf8d87
https://github.com/qemu/qemu/commit/6ab748af130912b92decfb1fa411ebdfd7cf8d87
Author: Will Newton <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
M target-arm/helper.h
M target-arm/translate.c
Log Message:
-----------
target-arm: Rename A32 VFP conversion helpers
The VFP conversion helpers for A32 round to zero as this is the only
rounding mode supported. Rename these helpers to make it clear that
they round to zero and are not suitable for use in the AArch64 code.
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 39905e53db75b6df0cfdb65644056a9f1cd10069
https://github.com/qemu/qemu/commit/39905e53db75b6df0cfdb65644056a9f1cd10069
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
Log Message:
-----------
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
The VFP fixed point conversion helpers first call float_scalbn and
then convert the result to an integer. This scalbn operation may
set floating point exception flags for:
* overflow & inexact (if it overflows to infinity)
* input denormal squashed to zero
* output denormal squashed to zero
Of these, we only care about the input-denormal flag, since
the output of the whole scale-and-convert operation will be
an integer (so squashed-output-denormal and overflow don't
apply). Suppress the others by saving the pre-scalb exception
flags and only copying across a potential input-denormal flag.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 8fe2a36f33f44e9d1333c851762ac463ad528233
https://github.com/qemu/qemu/commit/8fe2a36f33f44e9d1333c851762ac463ad528233
Author: Will Newton <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
M target-arm/helper.h
Log Message:
-----------
target-arm: A64: Add extra VFP fixed point conversion helpers
Define the full set of floating point to fixed point conversion
helpers required to support AArch64.
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 3617f86ba87a0f54b74dbaed0d92da13beb14e45
https://github.com/qemu/qemu/commit/3617f86ba87a0f54b74dbaed0d92da13beb14e45
Author: Alexander Graf <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
M target-arm/helper.h
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add floating-point<->fixed-point instructions
This patch adds emulation for the instruction group labeled
"Floating-point <-> fixed-point conversions" in the ARM ARM.
Namely this includes the instructions SCVTF, UCVTF, FCVTZS, FCVTZU
(scalar, fixed-point).
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, rebased, updated to new infrastructure.
Applied bug fixes from Michael Matz and Janne Grunau.]
Signed-off-by: Will Newton <address@hidden>
[PMM: significant cleanup]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 6a7413385d731a97cbd45c7c4b1c2cbd73d94409
https://github.com/qemu/qemu/commit/6a7413385d731a97cbd45c7c4b1c2cbd73d94409
Author: Will Newton <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add floating-point<->integer conversion instructions
Add support for the AArch64 floating-point <-> integer conversion
instructions to disas_fpintconv. In the process we can rearrange
and simplify the detection of unallocated encodings a little.
We also correct a typo in the instruction encoding diagram for this
instruction group: bit 21 is 1, not 0.
Signed-off-by: Will Newton <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: e97db91cbf7df456a35996d7243cd0f55d23ca1a
https://github.com/qemu/qemu/commit/e97db91cbf7df456a35996d7243cd0f55d23ca1a
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
M target-arm/helper.h
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
This patch adds support for those instructions in the "Floating-point
data-processing (1 source)" group which are simple 32-bit-to-32-bit
or 64-bit-to-64-bit operations (ie everything except FCVT between
single/double/half precision).
We put the new round-to-int helpers in helper.c because they will
also be used by the new ARMv8 A32/T32 rounding instructions.
Signed-off-by: Alexander Graf <address@hidden>
[WN: Commit message tweak, merged single and double precision patches,
updated to new infrastructure.]
Signed-off-by: Will Newton <address@hidden>
[PMM: reworked decode, split FCVT out into their own patch]
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 096fc768184d5e9c47ccc4dd95d9f983fa83b9e1
https://github.com/qemu/qemu/commit/096fc768184d5e9c47ccc4dd95d9f983fa83b9e1
Author: Peter Maydell <address@hidden>
Date: 2014-01-07 (Tue, 07 Jan 2014)
Changed paths:
M target-arm/helper.c
M target-arm/helper.h
M target-arm/translate-a64.c
Log Message:
-----------
target-arm: A64: Add support for FCVT between half, single and double
Add support for FCVT between half, single and double precision.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: b9d36eb2c7d73875ef44182f18d625f1bc4c7fda
https://github.com/qemu/qemu/commit/b9d36eb2c7d73875ef44182f18d625f1bc4c7fda
Author: André Hentschel <address@hidden>
Date: 2014-01-09 (Thu, 09 Jan 2014)
Changed paths:
M linux-user/syscall.c
M linux-user/syscall_defs.h
Log Message:
-----------
linux-user: Support the accept4 socketcall
Cc: Riku Voipio <address@hidden>
Signed-off-by: André Hentschel <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Erik de Castro Lopo <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Signed-off-by: Riku Voipio <address@hidden>
Commit: f0116c5458dc3be398ee7ef8daeaa02ba738bdc1
https://github.com/qemu/qemu/commit/f0116c5458dc3be398ee7ef8daeaa02ba738bdc1
Author: Will Newton <address@hidden>
Date: 2014-01-09 (Thu, 09 Jan 2014)
Changed paths:
M linux-user/elfload.c
M linux-user/flatload.c
M linux-user/linuxload.c
M linux-user/qemu.h
Log Message:
-----------
linux-user: Remove regs parameter of load_elf_binary and load_flt_binary
The regs parameter is not used anywhere, so remove it.
Signed-off-by: Will Newton <address@hidden>
Reviewed-by: Erik de Castro Lopo <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Riku Voipio <address@hidden>
Commit: 205b6b617519d53f17ef2158ff18cb0fe50f5d6c
https://github.com/qemu/qemu/commit/205b6b617519d53f17ef2158ff18cb0fe50f5d6c
Author: Anthony Liguori <address@hidden>
Date: 2014-01-10 (Fri, 10 Jan 2014)
Changed paths:
M linux-user/elfload.c
M linux-user/flatload.c
M linux-user/linuxload.c
M linux-user/qemu.h
M linux-user/syscall.c
M linux-user/syscall_defs.h
Log Message:
-----------
Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging
* riku/linux-user-for-upstream:
linux-user: Remove regs parameter of load_elf_binary and load_flt_binary
linux-user: Support the accept4 socketcall
Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>
Commit: 62a6a1fb895b881a938426fadb808f78a86ee222
https://github.com/qemu/qemu/commit/62a6a1fb895b881a938426fadb808f78a86ee222
Author: Anthony Liguori <address@hidden>
Date: 2014-01-10 (Fri, 10 Jan 2014)
Log Message:
-----------
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140107' into
staging
target-arm queue:
* further A64 decoder patches, including enabling the aarch64-linux-user
target; this includes full floating point support. Neon is not yet
supported.
* cadence UART model fixes.
* some minor bug fixes and cleanups.
* all the softfloat fixes required by the new A64 instructions;
several of these will also be used by PPC.
* pmaydell/tags/pull-target-arm-20140107: (61 commits)
target-arm: A64: Add support for FCVT between half, single and double
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
target-arm: A64: Add floating-point<->integer conversion instructions
target-arm: A64: Add floating-point<->fixed-point instructions
target-arm: A64: Add extra VFP fixed point conversion helpers
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
target-arm: Rename A32 VFP conversion helpers
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
softfloat: Add support for ties-away rounding
softfloat: Refactor code handling various rounding modes
softfloat: Add float16 <=> float64 conversion functions
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
softfloat: Provide complete set of accessors for fp state
softfloat: Fix float64_to_uint32_round_to_zero
softfloat: Fix float64_to_uint32
softfloat: Fix float64_to_uint64_round_to_zero
softfloat: Add float32_to_uint64()
softfloat: Fix factor 2 error for scalbn on denormal inputs
softfloat: Only raise Invalid when conversions to int are out of range
softfloat: Fix float64_to_uint64
...
Conflicts:
target-arm/cpu.h
aliguori: resolved trivial conflict
Signed-off-by: Anthony Liguori <address@hidden>
Commit: 4cddc7f44ff83ff3545059f1b8648b8bd7fe0e72
https://github.com/qemu/qemu/commit/4cddc7f44ff83ff3545059f1b8648b8bd7fe0e72
Author: Anthony Liguori <address@hidden>
Date: 2014-01-10 (Fri, 10 Jan 2014)
Changed paths:
M cpu-exec.c
M cpus.c
M cputlb.c
M hw/i386/kvmvapic.c
M hw/i386/pc.c
M target-i386/cpu-qom.h
M target-i386/cpu.c
M target-i386/cpu.h
M target-i386/helper.c
M target-i386/kvm.c
M target-i386/misc_helper.c
M translate-all.c
Log Message:
-----------
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings / X86CPU
* TLB invalidation optimizations
* X86CPU initialization cleanups
* Preparations for X86CPU hot-unplug
# gpg: Signature made Tue 24 Dec 2013 04:51:52 AM PST using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <address@hidden>"
# gpg: aka "Andreas Färber <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 174F 0347 1BCC 221A 6175 6F96 FA2E D12D 3E7E 013F
* afaerber/tags/qom-cpu-for-anthony:
target-i386: Cleanup 'foo=val' feature handling
target-i386: Cleanup 'foo' feature handling
target-i386: Convert 'check' and 'enforce' to static properties
target-i386: Convert 'hv_spinlocks' to static property
target-i386: Convert 'hv_vapic' to static property
target-i386: Convert 'hv_relaxed' to static property
cpu-exec: Optimize X86CPU usage in cpu_exec()
target-i386: Move apic_state field from CPUX86State to X86CPU
cputlb: Tidy memset() of arrays
cputlb: Use memset() when flushing entries
Commit: d1819762fcf5d50f30df603eb606eb31bf62e29d
https://github.com/qemu/qemu/commit/d1819762fcf5d50f30df603eb606eb31bf62e29d
Author: Anthony Liguori <address@hidden>
Date: 2014-01-10 (Fri, 10 Jan 2014)
Changed paths:
M hw/acpi/core.c
M hw/acpi/ich9.c
M hw/acpi/piix4.c
M hw/core/qdev.c
M hw/i386/acpi-dsdt-cpu-hotplug.dsl
M hw/i386/pc_piix.c
M hw/i386/pc_sysfw.c
M hw/i386/q35-acpi-dsdt.dsl
M hw/pci-host/piix.c
M hw/pci/pci.c
M hw/pci/pci_bridge.c
M hw/s390x/virtio-ccw.c
M hw/virtio/virtio.c
M include/hw/acpi/acpi.h
M include/hw/i386/pc.h
M include/hw/pci/pci.h
M include/hw/qdev-core.h
M tests/i440fx-test.c
Log Message:
-----------
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
acpi,pci,pc,fedora,virtio fixes and enhancements
This includes some Preparatory patches for cpu hotplug for q25 and memory
hotplug by Igor, tests and memory mapping change
by Laszlo and pci reset cleanup by Paolo.
There are also some fixes for fedora and virtio:
included here since they are test blockers for me.
Signed-off-by: Michael S. Tsirkin <address@hidden>
# gpg: Signature made Mon 23 Dec 2013 08:07:18 AM PST using RSA key ID D28D5469
# gpg: Can't check signature: public key not found
* mst/tags/for_anthony:
target-arm: fix build with gcc 4.8.2
virtio: add back call to virtio_bus_device_unplugged
piix: fix 32bit pci hole
qdev: switch reset to post-order
qdev: allow both pre- and post-order vists in qdev walking functions
pci: clean up resetting of IRQs
pci: do not export pci_bus_reset
ACPI/DSDT-CPU: cleanup bogus comment
ACPI: Q35 DSDT: fix CPU hotplug GPE0.2 handler
acpi: ich9: allow guest to clear SCI rised by GPE
acpi: factor out common pm_update_sci() into acpi core
acpi: piix4: remove not needed GPE0 mask
i440fx-test: verify firmware under 4G and 1M, both -bios and -pflash
i440fx-test: generate temporary firmware blob
i440fx-test: give each GTest case its own qtest
i440fx-test: qtest_start() should be paired with qtest_end()
hw/i386/pc_sysfw: support two flash drives
pc_piix: document gigabyte_align
piix: gigabyte alignment for ram
Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>
Commit: debe40fbc5f112672d0ab8f7f393e483304059f4
https://github.com/qemu/qemu/commit/debe40fbc5f112672d0ab8f7f393e483304059f4
Author: Anthony Liguori <address@hidden>
Date: 2014-01-10 (Fri, 10 Jan 2014)
Changed paths:
M block/commit.c
M block/iscsi.c
M block/mirror.c
M block/sheepdog.c
M block/vhdx-log.c
M block/vhdx.c
M block/vhdx.h
M block/vmdk.c
M blockdev.c
M configure
M hw/block/dataplane/virtio-blk.c
M hw/virtio/dataplane/Makefile.objs
R hw/virtio/dataplane/hostmem.c
M hw/virtio/dataplane/vring.c
M include/block/block_int.h
R include/hw/virtio/dataplane/hostmem.h
M include/hw/virtio/dataplane/vring.h
M qapi-schema.json
M qemu-doc.texi
M qemu-img.texi
M tests/qemu-iotests/040
M tests/qemu-iotests/051.out
M tests/qemu-iotests/059
M tests/qemu-iotests/059.out
Log Message:
-----------
Merge remote-tracking branch 'stefanha/block' into staging
* stefanha/block:
commit: Remove unused check
qemu-iotests: Update test cases for commit active
commit: Support commit active layer
block: Add commit_active_start()
mirror: Move base to MirrorBlockJob
mirror: Don't close target
qemu-iotests: drop duplicate virtio-blk initialization failure
vmdk: Allow vmdk_create to work with protocol
vmdk: Check VMFS extent line field number
docs: updated qemu-img man page and qemu-doc to reflect VHDX support.
block: vhdx - improve error message, and .bdrv_check implementation
block/iscsi: Fix compilation for libiscsi 1.4.0 (API change)
qapi-schema: fix QEMU 1.8 references
dataplane: replace hostmem with memory_region_find
dataplane: change vring API to use VirtQueueElement
vring: factor common code for error exits
vring: create a common function to parse descriptors
sheepdog: fix dynamic grow for running qcow2 format
Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>
Commit: eedc1a5db5e4d941e39e54344322c0b1e89dfdcd
https://github.com/qemu/qemu/commit/eedc1a5db5e4d941e39e54344322c0b1e89dfdcd
Author: Anthony Liguori <address@hidden>
Date: 2014-01-10 (Fri, 10 Jan 2014)
Changed paths:
M block/iscsi.c
M hw/scsi/scsi-disk.c
Log Message:
-----------
Merge remote-tracking branch 'bonzini/scsi-next' into staging
* bonzini/scsi-next:
scsi-disk: add UNMAP limits to block limits VPD page
block/iscsi: use a bh to schedule co reentrance
Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>
Compare: https://github.com/qemu/qemu/compare/1d327fb4c72b...eedc1a5db5e4
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