[Qemu-commits] [qemu/qemu] a2b881: mips_malta: fix BIOS endianness swapping

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: a2b8813d62fa5a35adc1a7bf58de5b2ffb754f5d
      
https://github.com/qemu/qemu/commit/a2b8813d62fa5a35adc1a7bf58de5b2ffb754f5d
  Author: Paul Burton <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: fix BIOS endianness swapping

If the target is little endian (mipsel) then the BIOS image endianness
is swapped so that the big endian BIOS binaries commonly produced can be
loaded correctly.

When using the -bios argument the BIOS is loaded using
load_image_targphys, however this doesn't perform the load to target
memory immediately. Instead it loads the BIOS file into a struct Rom
which will later be written to target memory upon reset. However the
endianness conversion was being performed before this, on init, and
operating on the target memory which at this point is blank & will later
be overwritten by the (big endian) BIOS image. Correct this by operating
on the data referenced by struct Rom rather than the target memory when
the -bios argument is used.

Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: a427338b222b43197c2776cbc996936df0302f51
      
https://github.com/qemu/qemu/commit/a427338b222b43197c2776cbc996936df0302f51
  Author: Paul Burton <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: correct reading MIPS revision at 0x1fc00010

Rather than modifying the BIOS code at its original location, copy it
for the 0x1fc00000 region & modify the copy. This means the original
ROM code is correctly readable at 0x1e000010 whilst the MIPS revision
is readable at 0x1fc00010.

Additionally the code previously operated on target memory which would
later be overwritten by the BIOS image upon CPU reset if the -bios
argument was used to specify the BIOS image. This led to the written
MIPS revision being lost. Copying using rom_copy when -bios is used
fixes this issue.

Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 02bccc7796fec8b39dca9affc8bff8edebe0a867
      
https://github.com/qemu/qemu/commit/02bccc7796fec8b39dca9affc8bff8edebe0a867
  Author: Paul Burton <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: generate SPD EEPROM data at runtime

The SPD EEPROM specifies the amount of memory present in the system and
thus its correct contents can only be known at runtime. Calculating
parts of the data on init allows the data to accurately reflect the
amount of target memory present and allow YAMON to boot with an
arbitrary amount of SDRAM.

Where possible the SPD data will favor indicating 2 banks of SDRAM
rather than 1. For example the default 128MB of target memory will be
represented as 2x64MB banks rather than 1x128MB bank. This allows
versions of MIPS BIOS code (such as YAMON 2.22 and older) to boot
despite a bug preventing them from handling a single bank of SDRAM with
the Galileo GT64120 system controller emulated by QEMU.

Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 1817f56a834f55311af20d1c004b259c16fb1515
      
https://github.com/qemu/qemu/commit/1817f56a834f55311af20d1c004b259c16fb1515
  Author: Paul Burton <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: cap BIOS endian swap length at 0x3e0000 bytes

This preserves the final sector of the pflash which is used by YAMON to
hold environment variables. If the endianness of the environment data
is swapped then YAMON will fail to load environment variables from
pflash.

Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 35c648078aa493c3b976840eb7cf2e53ab5b7a2d
      
https://github.com/qemu/qemu/commit/35c648078aa493c3b976840eb7cf2e53ab5b7a2d
  Author: Paul Burton <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/mips/mips_malta.c

  Log Message:
  -----------
  mips_malta: generate SMBUS EEPROM data

The malta contains 2 EEPROMs, one containing SPD data for the SDRAM and
another containing board information such as serial number and MAC
address. These are both exposed via the PIIX4 SMBUS. Generating this
data and providing it to smbus_eeprom_init will allow YAMON to read a
serial number for the board and prevent it from warning that the EEPROM
data is invalid.

We already have the contents of the SPD EEPROM which are exposed via
FPGA I2C accesses, this is provided as part of the SMBUS EEPROM data
too for consistency.

Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: ea0a4f34418c9f2cad9722bb27acd6349148fac0
      
https://github.com/qemu/qemu/commit/ea0a4f34418c9f2cad9722bb27acd6349148fac0
  Author: Paul Burton <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/block/pflash_cfi01.c

  Log Message:
  -----------
  pflash_cfi01: duplicate status byte from bits 23:16 for 32bit reads

The firmware commonly used with MIPS Malta boards (YAMON) reads the
status of the pflash with a 32bit memory access. On real hardware
this results in the status byte being mirrored in the upper 16 bits
of the read value. For example if the status byte is represented by
SS then the hardware reads 0x00SS00SS. The YAMON firmware compares the
status against 32bit values expecting the mirrored value and fails
without it.

Signed-off-by: Paul Burton <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 05b3274b6bedb68ff78b76c642e17e97f3181c2f
      
https://github.com/qemu/qemu/commit/05b3274b6bedb68ff78b76c642e17e97f3181c2f
  Author: James Hogan <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M hw/mips/mips_fulong2e.c
    M hw/mips/mips_malta.c
    M hw/mips/mips_mipssim.c
    M hw/mips/mips_r4k.c
    M include/hw/mips/mips.h

  Log Message:
  -----------
  hw/mips: align initrd to 64KB to avoid kernel error

The Linux kernel can be configured to use 64KB pages, but it also
requires initrd to be page aligned. Therefore, to be safe, align the
initrd to 64KB using a new INITRD_PAGE_MASK rather than
TARGET_PAGE_MASK.

Signed-off-by: James Hogan <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: d36c231f4b7386bd8230aa17d362b925aa419b2f
      
https://github.com/qemu/qemu/commit/d36c231f4b7386bd8230aa17d362b925aa419b2f
  Author: Petar Jovanovic <address@hidden>
  Date:   2013-07-28 (Sun, 28 Jul 2013)

  Changed paths:
    M target-mips/dsp_helper.c
    M tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c

  Log Message:
  -----------
  target-mips: fix mipsdsp_trunc16_sat16_round

This change corrects rounding and saturation of Q31 fractional value in
mipsdsp_trunc16_sat16_round(). Overflow detection was incorrect for the
corner case for PRECRQ_RS.PH, and this test case is also part of the change.

Signed-off-by: Petar Jovanovic <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


Compare: https://github.com/qemu/qemu/compare/cba5cb67becd...d36c231f4b73