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[Qemu-commits] [qemu/qemu] 056e6b: hw/alpha: Don't use get_system_io


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 056e6b: hw/alpha: Don't use get_system_io
Date: Mon, 15 Jul 2013 13:00:11 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 056e6bae1c91f47165d962564f82f5176bae47f0
      
https://github.com/qemu/qemu/commit/056e6bae1c91f47165d962564f82f5176bae47f0
  Author: Richard Henderson <address@hidden>
  Date:   2013-07-13 (Sat, 13 Jul 2013)

  Changed paths:
    M hw/alpha/alpha_sys.h
    M hw/alpha/pci.c
    M hw/alpha/typhoon.c

  Log Message:
  -----------
  hw/alpha: Don't use get_system_io

Advancements in the ioport subsystem mean that we need no longer
thunk memory-mapped i/o through the system-io address space.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3661049fec64ffd7ab008e57e396881c6a4b53a4
      
https://github.com/qemu/qemu/commit/3661049fec64ffd7ab008e57e396881c6a4b53a4
  Author: Richard Henderson <address@hidden>
  Date:   2013-07-13 (Sat, 13 Jul 2013)

  Changed paths:
    M hw/alpha/alpha_sys.h
    M hw/alpha/pci.c
    M hw/alpha/typhoon.c

  Log Message:
  -----------
  hw/alpha: Don't machine check on missing pci i/o

Not really correct, but we don't implement all of the random devices
that the kernel looks for.  This is good enough to keep us booting.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 23326164ae6fe8d94b7eff123e03f97ca6978d33
      
https://github.com/qemu/qemu/commit/23326164ae6fe8d94b7eff123e03f97ca6978d33
  Author: Richard Henderson <address@hidden>
  Date:   2013-07-14 (Sun, 14 Jul 2013)

  Changed paths:
    M exec.c

  Log Message:
  -----------
  exec: Support 64-bit operations in address_space_rw

Honor the implementation maximum access size, and at least check
the minimum access size.

Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 678421650dc166cd6cb35bb2bc0baf1b481b40ca
      
https://github.com/qemu/qemu/commit/678421650dc166cd6cb35bb2bc0baf1b481b40ca
  Author: Richard Henderson <address@hidden>
  Date:   2013-07-14 (Sun, 14 Jul 2013)

  Changed paths:
    M hw/alpha/typhoon.c

  Log Message:
  -----------
  hw/alpha: Drop latch_tmp hack

The memory and i/o core now support passing 64-bit accesses along
from the guest, so we no longer need to emulate them.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: e605e969953d793036dbd450da6b59bb434fb3d8
      
https://github.com/qemu/qemu/commit/e605e969953d793036dbd450da6b59bb434fb3d8
  Author: Richard Henderson <address@hidden>
  Date:   2013-07-14 (Sun, 14 Jul 2013)

  Changed paths:
    M hw/alpha/dp264.c

  Log Message:
  -----------
  hw/alpha: Use SRM epoch

The 1980 epoch is used by the ARC PALcode for NT.  But we're emulating
a system using the SRM PALcode.  Using the proper epoch results in less
confusion in the guest userland.

Signed-off-by: Richard Henderson <address@hidden>


  Commit: b53169eae06d6cf6f512a8b1fdd5424a0a6aab85
      
https://github.com/qemu/qemu/commit/b53169eae06d6cf6f512a8b1fdd5424a0a6aab85
  Author: Stefan Hajnoczi <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M blockdev.c
    M qapi-schema.json
    M qmp-commands.hx
    M tests/qemu-iotests/055

  Log Message:
  -----------
  blockdev: add sync mode to drive-backup QMP command

The drive-backup command is similar to the drive-mirror command, except
no guest data written after the command executes gets copied.  Add a
sync mode argument which determines whether the entire disk is copied,
just allocated clusters, or only clusters being written to by the guest.

Currently only sync mode 'full' is supported - it copies the entire disk.
For read-only point-in-time snapshots we may only need sync mode 'none'
since the target can be a qcow2 file using the guest's disk as its
backing file (no need to copy the entire disk).  Finally, sync mode
'top' is useful if we wish to preserve the backing chain.

Note that this patch just adds the sync mode argument to drive-backup.
It does not implement sync modes 'top' or 'none'.  This patch is
necessary so we can add a drive-backup HMP command that behaves like the
existing drive-mirror HMP command and takes a sync mode.

Signed-off-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Signed-off-by: Kevin Wolf <address@hidden>


  Commit: de90930a0c45760e7523138fac57ff07312bf51d
      
https://github.com/qemu/qemu/commit/de90930a0c45760e7523138fac57ff07312bf51d
  Author: Stefan Hajnoczi <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hmp-commands.hx
    M hmp.c
    M hmp.h

  Log Message:
  -----------
  block: add drive_backup HMP command

Make "drive_backup" available on the HMP monitor:

  drive_backup [-n] [-f] device target [format]

The -n flag requests QEMU to reuse the image found in new-image-file,
instead of recreating it from scratch.

The -f flag requests QEMU to copy the whole disk, so that the result
does not need a backing file.  Note that this flag *must* currently be
passed since the other sync modes ('none' and 'top') have not been
implemented yet.  Requiring it ensures that "drive_backup" behaves like
"drive_mirror".

Signed-off-by: Stefan Hajnoczi <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Signed-off-by: Kevin Wolf <address@hidden>


  Commit: 98289620e0460fa595581020ab20127da4a2fc44
      
https://github.com/qemu/qemu/commit/98289620e0460fa595581020ab20127da4a2fc44
  Author: Kevin Wolf <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M block.c
    M block/sheepdog.c
    M include/block/block.h
    M qemu-img.c
    M tests/qemu-iotests/051
    M tests/qemu-iotests/051.out

  Log Message:
  -----------
  block: Don't parse protocol from file.filename

One of the major reasons for doing something new for -blockdev and
blockdev-add was that the old block layer code parses filenames instead
of just taking them literally. So we should really leave it untouched
when it's passing using the new interfaces (like -drive
file.filename=...).

This allows opening relative file names that contain a colon.

Signed-off-by: Kevin Wolf <address@hidden>
Reviewed-by: Eric Blake <address@hidden>


  Commit: 7a370406bdd13b1d46230d1cbca308d984d0dcae
      
https://github.com/qemu/qemu/commit/7a370406bdd13b1d46230d1cbca308d984d0dcae
  Author: Kevin Wolf <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M tests/qemu-iotests/051.out
    M tests/qemu-iotests/common.filter

  Log Message:
  -----------
  qemu-iotests: Update 051 reference output

This has been broken by commit bd5c51ee.

Signed-off-by: Kevin Wolf <address@hidden>


  Commit: f0f0fdfeec6c67ad374114ecc4b3e3ccde5e94d2
      
https://github.com/qemu/qemu/commit/f0f0fdfeec6c67ad374114ecc4b3e3ccde5e94d2
  Author: Kevin Wolf <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M block.c
    M include/block/block.h

  Log Message:
  -----------
  block: Add return value for bdrv_flush_all()

bdrv_flush() can fail, and bdrv_flush_all() should return an error as
well if this happens for a block device. It returns the first error
return now, but still at least tries to flush the remaining devices even
in error cases.

Signed-off-by: Kevin Wolf <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>


  Commit: 5698346391b306c2c84358c68ee897c095d714cc
      
https://github.com/qemu/qemu/commit/5698346391b306c2c84358c68ee897c095d714cc
  Author: Kevin Wolf <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M cpus.c
    M include/sysemu/sysemu.h
    M stubs/vm-stop.c

  Log Message:
  -----------
  cpus: Add return value for vm_stop()

If flushing the block devices fails, return an error. The VM is stopped
anyway.

Signed-off-by: Kevin Wolf <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>


  Commit: 0e1146a7a011a69d8cbc958b4f7ebad186730fc3
      
https://github.com/qemu/qemu/commit/0e1146a7a011a69d8cbc958b4f7ebad186730fc3
  Author: Kevin Wolf <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M migration.c

  Log Message:
  -----------
  migration: Fail migration on bdrv_flush_all() error

If bdrv_flush_all() returns an error, there is an inconsistency in the
view of an image file between the source and the destination host.
Completing the migration would lead to corruption. Better abort
migration in this case.

To reproduce this case, try the following (ensures that there is
something to flush, and then fails that flush):

$ qemu-img create -f qcow2 test.qcow2 1G
$ cat blkdebug.cfg
[inject-error]
event = "flush_to_os"
errno = "5"
$ qemu-system-x86_64 -hda blkdebug:blkdebug.cfg:test.qcow2 -monitor stdio
(qemu) qemu-io ide0-hd0 "write 0 4k"
(qemu) migrate ...

Signed-off-by: Kevin Wolf <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>


  Commit: a62eaa26c1d6d48fbdc3ac1d32bd1314f5fdc8c9
      
https://github.com/qemu/qemu/commit/a62eaa26c1d6d48fbdc3ac1d32bd1314f5fdc8c9
  Author: Kevin Wolf <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/ide/ahci.c
    M hw/ide/core.c
    M hw/ide/internal.h

  Log Message:
  -----------
  ahci: Fix FLUSH command

AHCI couldn't cope with asynchronous commands that aren't doing DMA, it
simply wouldn't complete them. Due to the bug fixed in commit f68ec837,
FLUSH commands would seem to have completed immediately even if they
were still running on the host. After the commit, they would simply hang
and never unset the BSY bit, rendering AHCI unusable on any OS sending
flushes.

This patch adds another callback for the completion of asynchronous
commands. This is what AHCI really wants to use for its command
completion logic rather than an DMA completion callback.

Cc: address@hidden
Signed-off-by: Kevin Wolf <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>


  Commit: 9121d02cb33c96b444a3973579f5edc119597e81
      
https://github.com/qemu/qemu/commit/9121d02cb33c96b444a3973579f5edc119597e81
  Author: Peter Crosthwaite <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/char/cadence_uart.c

  Log Message:
  -----------
  char/cadence_uart: Fix reset for unattached instances

commit 1db8b5efe0c2b5000e50691eea61264a615f43de introduced an issue
where QEMU would segfault if you have an unattached Cadence UART.

Fix by guarding the flush-on-reset logic on there being a qemu_chr
attachment.

Reported-by: Soren Brinkmann <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Tested-by: Soren Brinkmann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 81e69fb093099ec5dccd61c92cec308f83091511
      
https://github.com/qemu/qemu/commit/81e69fb093099ec5dccd61c92cec308f83091511
  Author: Mans Rullgard <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: add feature flag for ARMv8

Signed-off-by: Mans Rullgard <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 528622421eb1be95eaadfe91e8e11729d1e46431
      
https://github.com/qemu/qemu/commit/528622421eb1be95eaadfe91e8e11729d1e46431
  Author: Peter Maydell <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/cpu/a15mpcore.c

  Log Message:
  -----------
  hw/cpu/a15mpcore: Correct default value for num-irq

The a15mpcore device claims that its default value for num-irq
is the number of interrupts used by the A15MP in the vexpress-a15
board. However that chip has 128 external interrupts, not 64.
Since there is only one A15 based model in QEMU currently, we
can fix this by simply changing the default value.

This error was causing recent (3.10) Linux kernels to print
warnings/backtraces when the number of interrupts reported
by the GIC was smaller than an interrupt number they wanted
to use.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 8827b0fb66cab9f7978c4e66dad4cf3c0989a72e
      
https://github.com/qemu/qemu/commit/8827b0fb66cab9f7978c4e66dad4cf3c0989a72e
  Author: Peter Maydell <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/sd/pl181.c

  Log Message:
  -----------
  sd/pl181.c: Avoid undefined shift behaviour in RWORD macro

Add a cast to avoid potentially shifting into the sign bit of
a signed value, which is undefined behaviour in C.

(Detected with clang's -fsanitize=undefined.)

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 7648673636bbd7dcb9abf3cc87a8ba7a65b85436
      
https://github.com/qemu/qemu/commit/7648673636bbd7dcb9abf3cc87a8ba7a65b85436
  Author: Peter Maydell <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/dma/omap_dma.c

  Log Message:
  -----------
  hw/dma/omap_dma: Fix bugs with DMA requests above 32

The drqbmp field of struct soc_dma_s is a uint64_t; however several
places in the code attempt to set bits in it using "(1 << drq)",
which will fail if drq is large enough that the 1 bit gets shifted
off the top of a 32 bit integer.  Change these to "(1ULL << drq)" so
that the promotion to 64 bit happens before the shift rather than
afterwards.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 8941d6ce25b43824cf96d30cb94742e02e80b2f2
      
https://github.com/qemu/qemu/commit/8941d6ce25b43824cf96d30cb94742e02e80b2f2
  Author: Peter Maydell <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/arm/vexpress.c

  Log Message:
  -----------
  hw/arm/vexpress: Add alias for flash at address 0 on A15 board

The A15 Versatile Express board can remap a variety of things at address
0. We don't currently emulate the Serial Configuration Controller which
is how the guest can control this remapping, but we can provide the
initial default mapping of the first flash device into this space.
In particular this allows QEMU to boot flash images such as UEFI which
expect to include an exception vector table.

Signed-off-by: Peter Maydell <address@hidden>
Tested-by: Grant Likely <address@hidden>
Message-id: address@hidden


  Commit: 574f66bcbe10cd8fbf8bbf6d87451a944ae421bd
      
https://github.com/qemu/qemu/commit/574f66bcbe10cd8fbf8bbf6d87451a944ae421bd
  Author: Andre Przywara <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/arm/highbank.c

  Log Message:
  -----------
  ARM/highbank: prepare for adding similar machines

To allow the modelling of machines similar to Calxeda Highbank,
introduce a parameter to the init function and call it from a
wrapper. This allows to tweak the definition for individual machines
later on.

Signed-off-by: Andre Przywara <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b25a83f0538fceede15cba6cfd6ea0f1ffc9d777
      
https://github.com/qemu/qemu/commit/b25a83f0538fceede15cba6cfd6ea0f1ffc9d777
  Author: Andre Przywara <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/arm/highbank.c

  Log Message:
  -----------
  ARM/highbank: add support for Calxeda ECX-2000 / Midway

The Calxeda ECX-2000 chip (aka. Midway) is model-wise quite similar
to the Highbank. The most prominent difference is the Cortex-A15 CPU
core in it, together with the associated core peripherals.

Add a new ARM machine type called "midway".
Move the L2 cache controller device into the Highbank specific part,
since Midway does not have (and need) it.

Signed-off-by: Andre Przywara <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: bf72d89f0a8fb27a6bfde1a689690fd577227762
      
https://github.com/qemu/qemu/commit/bf72d89f0a8fb27a6bfde1a689690fd577227762
  Author: Dominik Dingel <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/s390x/virtio-ccw.c

  Log Message:
  -----------
  virtio-ccw: Enable x-data-plane for virtio-ccw-blk

Add property x-data-plane to virtio-ccw-blk devices.

Signed-off-by: Dominik Dingel <address@hidden>
Signed-off-by: Cornelia Huck <address@hidden>


  Commit: 2359bf80c1c4e8ed1e7ddb03661fec6bace82a87
      
https://github.com/qemu/qemu/commit/2359bf80c1c4e8ed1e7ddb03661fec6bace82a87
  Author: Mans Rullgard <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: implement LDA/STL instructions

This adds support for the ARMv8 load acquire/store release instructions.
Since qemu does nothing special for memory barriers, these can be
emulated like their non-acquire/release counterparts.

Signed-off-by: Mans Rullgard <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 12b10571141a20e1c23d3b597e55d5d1a3113265
      
https://github.com/qemu/qemu/commit/12b10571141a20e1c23d3b597e55d5d1a3113265
  Author: Mans Rullgard <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: explicitly decode SEVL instruction

The ARMv8 SEVL instruction is in the architectural hint space already
emulated as nop.  This makes the decoding of SEVL explicit for clarity.

Signed-off-by: Mans Rullgard <address@hidden>
Message-id: address@hidden
[PMM: added 'SEVL' to the TODO comment]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: a703eda18a5c3e9b45f2b9a337a3e1e16c836cf9
      
https://github.com/qemu/qemu/commit/a703eda18a5c3e9b45f2b9a337a3e1e16c836cf9
  Author: Peter Crosthwaite <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup

The if block detecting OMAP/StrongARM modifies the id_cp_reginfo
.access fields in place. So there is no need to replicate the call
to define_arm_cp_reg(). Dropped, and let the OMAP case fall through
to the normal behaviour after the in-place modification.

Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 97ce8d61559b99492b4d389eba51a198e55b8455
      
https://github.com/qemu/qemu/commit/97ce8d61559b99492b4d389eba51a198e55b8455
  Author: Peter Crosthwaite <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm/helper.c: Implement MIDR aliases

Unimplemented registers in the cp15, CRn=0, opc1=0, CRm=0 space default
to aliasing the MIDR register. Set all registers in the space to access
MIDR by default.

Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 204a9c43afb92e2ff44fc9d1d377bc98ee97e3d7
      
https://github.com/qemu/qemu/commit/204a9c43afb92e2ff44fc9d1d377bc98ee97e3d7
  Author: Peter Crosthwaite <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm/helper.c: Allow const opaques in arm CP

Allow for defining const opaque data in ARM CP register definitions by
setting .opaque = foo. If non null opaque is passed into
define_one_arm_cp_reg_with_opaque then that opaque will take
precedence, otherwise if null opaque is passed, the original opaque
data will be used.

Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 2ebcebe262e88111ff583f97bc5fe0aae64b8940
      
https://github.com/qemu/qemu/commit/2ebcebe262e88111ff583f97bc5fe0aae64b8940
  Author: Peter Maydell <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: avoid undefined behaviour when writing TTBCR

LPAE CPUs have more potentially valid bits in the TTBCR, and so the
simple masking out of invalid bits is no longer sufficient to obtain
the base address width field of the register, which is what we use to
precalculate c2_mask and c2_base_mask.  Explicitly extract the
relevant register field rather than simply shifting by the register
value.

This bug would have had no ill effects in practice, since if the
EAE bit (TTBCR bit 31) is set then we don't use the precalculated
masks, and if EAE is zero then bits 30..3 are all UNK/SBZP, so
well-behaved guests won't set them. However the shift is undefined
behaviour, so we should avoid it.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 82a3a11897308b606120f7235001e87809708f85
      
https://github.com/qemu/qemu/commit/82a3a11897308b606120f7235001e87809708f85
  Author: Peter Maydell <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Avoid g_hash_table_get_keys()

g_hash_table_get_keys() was only introduced in glib 2.14, and we're
still targeting a minimum version of 2.12.  Rewrite the offending
code (introduced in commit 721fae1) to use g_hash_table_foreach()
to build the list of keys.

Signed-off-by: Peter Maydell <address@hidden>
Tested-by: Laurent Desnogues <address@hidden>
Tested-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: 5699a02e01a4d046652bc6e77abd67e887ae209c
      
https://github.com/qemu/qemu/commit/5699a02e01a4d046652bc6e77abd67e887ae209c
  Author: Anthony Liguori <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M block.c
    M block/sheepdog.c
    M blockdev.c
    M cpus.c
    M hmp-commands.hx
    M hmp.c
    M hmp.h
    M hw/ide/ahci.c
    M hw/ide/core.c
    M hw/ide/internal.h
    M include/block/block.h
    M include/sysemu/sysemu.h
    M migration.c
    M qapi-schema.json
    M qemu-img.c
    M qmp-commands.hx
    M stubs/vm-stop.c
    M tests/qemu-iotests/051
    M tests/qemu-iotests/051.out
    M tests/qemu-iotests/055
    M tests/qemu-iotests/common.filter

  Log Message:
  -----------
  Merge remote-tracking branch 'kwolf/for-anthony' into staging

# By Kevin Wolf (6) and Stefan Hajnoczi (2)
# Via Kevin Wolf
* kwolf/for-anthony:
  ahci: Fix FLUSH command
  migration: Fail migration on bdrv_flush_all() error
  cpus: Add return value for vm_stop()
  block: Add return value for bdrv_flush_all()
  qemu-iotests: Update 051 reference output
  block: Don't parse protocol from file.filename
  block: add drive_backup HMP command
  blockdev: add sync mode to drive-backup QMP command

Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>


  Commit: a34001fab5da2d0df605a8b83880c917c8aa0606
      
https://github.com/qemu/qemu/commit/a34001fab5da2d0df605a8b83880c917c8aa0606
  Author: Anthony Liguori <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M exec.c
    M hw/alpha/alpha_sys.h
    M hw/alpha/dp264.c
    M hw/alpha/pci.c
    M hw/alpha/typhoon.c

  Log Message:
  -----------
  Merge remote-tracking branch 'rth/axp-next' into staging

# By Richard Henderson
# Via Richard Henderson
* rth/axp-next:
  hw/alpha: Use SRM epoch
  hw/alpha: Drop latch_tmp hack
  exec: Support 64-bit operations in address_space_rw
  hw/alpha: Don't machine check on missing pci i/o
  hw/alpha: Don't use get_system_io

Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>


  Commit: 1750d019cea1e2383d3283eaad38cd0f93d07b11
      
https://github.com/qemu/qemu/commit/1750d019cea1e2383d3283eaad38cd0f93d07b11
  Author: Anthony Liguori <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/arm/highbank.c
    M hw/arm/vexpress.c
    M hw/char/cadence_uart.c
    M hw/cpu/a15mpcore.c
    M hw/dma/omap_dma.c
    M hw/sd/pl181.c

  Log Message:
  -----------
  Merge remote-tracking branch 'pmaydell/tags/pull-arm-devs-20130715' into 
staging

arm-devs queue

# gpg: Signature made Mon 15 Jul 2013 10:53:44 AM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found

# By Peter Maydell (4) and others
# Via Peter Maydell
* pmaydell/tags/pull-arm-devs-20130715:
  ARM/highbank: add support for Calxeda ECX-2000 / Midway
  ARM/highbank: prepare for adding similar machines
  hw/arm/vexpress: Add alias for flash at address 0 on A15 board
  hw/dma/omap_dma: Fix bugs with DMA requests above 32
  sd/pl181.c: Avoid undefined shift behaviour in RWORD macro
  hw/cpu/a15mpcore: Correct default value for num-irq
  char/cadence_uart: Fix reset for unattached instances

Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>


  Commit: ab4e1589f072c7a5d1238c7f0d289c163c7736b2
      
https://github.com/qemu/qemu/commit/ab4e1589f072c7a5d1238c7f0d289c163c7736b2
  Author: Anthony Liguori <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/helper.c
    M target-arm/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130715-1' into 
staging

target-arm queue

# gpg: Signature made Mon 15 Jul 2013 11:15:13 AM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found

# By Mans Rullgard (3) and others
# Via Peter Maydell
* pmaydell/tags/pull-target-arm-20130715-1:
  target-arm: Avoid g_hash_table_get_keys()
  target-arm: avoid undefined behaviour when writing TTBCR
  target-arm/helper.c: Allow const opaques in arm CP
  target-arm/helper.c: Implement MIDR aliases
  target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup
  target-arm: explicitly decode SEVL instruction
  target-arm: implement LDA/STL instructions
  target-arm: add feature flag for ARMv8

Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>


  Commit: 2562becfc126ed7678c662ee23b7c1fe135d8966
      
https://github.com/qemu/qemu/commit/2562becfc126ed7678c662ee23b7c1fe135d8966
  Author: Anthony Liguori <address@hidden>
  Date:   2013-07-15 (Mon, 15 Jul 2013)

  Changed paths:
    M hw/s390x/virtio-ccw.c

  Log Message:
  -----------
  Merge remote-tracking branch 'cohuck/virtio-ccw-upstr' into staging

# By Dominik Dingel
# Via Cornelia Huck
* cohuck/virtio-ccw-upstr:
  virtio-ccw: Enable x-data-plane for virtio-ccw-blk

Message-id: address@hidden
Signed-off-by: Anthony Liguori <address@hidden>


Compare: https://github.com/qemu/qemu/compare/c3cb8e778043...2562becfc126

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