qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 0402a5: qdev: DEVICE_DELETED event


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 0402a5: qdev: DEVICE_DELETED event
Date: Tue, 26 Mar 2013 15:00:20 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 0402a5d65ec004df5345d1f736e2ddaa7aee6665
      
https://github.com/qemu/qemu/commit/0402a5d65ec004df5345d1f736e2ddaa7aee6665
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-17 (Sun, 17 Mar 2013)

  Changed paths:
    M QMP/qmp-events.txt
    M hw/qdev.c
    M include/monitor/monitor.h
    M monitor.c
    M qapi-schema.json

  Log Message:
  -----------
  qdev: DEVICE_DELETED event

libvirt has a long-standing bug: when removing the device,
it can request removal but does not know when the
removal completes. Add an event so we can fix this in a robust way.

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: e998fa8df828ef68ea540a12917d10b4d335c1dd
      
https://github.com/qemu/qemu/commit/e998fa8df828ef68ea540a12917d10b4d335c1dd
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M qom/object.c

  Log Message:
  -----------
  qom: call class destructor before unparent

It seems more logical to have destruction flow start with the subclass
and move up to the base class.  This ensures object has a valid
canonical path when destructor is called.

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 15054fce2df8592dec70bba23faf126f0f372f81
      
https://github.com/qemu/qemu/commit/15054fce2df8592dec70bba23faf126f0f372f81
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M QMP/qmp-events.txt
    M hw/qdev.c

  Log Message:
  -----------
  qmp: add path to device_deleted event

Add QOM path to device deleted event.  It now becomes useful to report
it for devices which don't have an ID assigned.

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: f8f7c533e20d1681feeb665109301151bdb739b4
      
https://github.com/qemu/qemu/commit/f8f7c533e20d1681feeb665109301151bdb739b4
  Author: Jason Wang <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/virtio-net.c

  Log Message:
  -----------
  virtio-net: remove layout assumptions for mq ctrl

Following commit 921ac5d0f3a0df869db5ce4edf752f51d8b1596a (virtio-net:
remove layout assumptions for ctrl vq), this patch makes multiqueue ctrl
handling not rely on the layout of descriptors.

Signed-off-by: Jason Wang <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: a38b2c49bfd3f1cfc2aadd08cd049af16a342b1e
      
https://github.com/qemu/qemu/commit/a38b2c49bfd3f1cfc2aadd08cd049af16a342b1e
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/virtio-pci.c

  Log Message:
  -----------
  virtio-pci: guest notifier mask without non-irqfd

non-irqfd setups are currently broken with vhost:
we start up masked and nothing unmasks the interrupts.
Fix by using mask notifiers, same as the irqfd path.

Sharing irqchip/non irqchip code is always a good thing,
in this case it will help non irqchip benefit
from backend masking optimization.

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: e01fd687185444944b0b5b0f8c739ae4b33eb029
      
https://github.com/qemu/qemu/commit/e01fd687185444944b0b5b0f8c739ae4b33eb029
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c
    M hw/pci/pci.h

  Log Message:
  -----------
  pci: Add PCI VGA helpers

Allow devices to register VGA memory regions for handling PCI spec
defined VGA I/O port and MMIO areas.  PCI will attach these to the
bus address spaces and enable them according to the device command
register value.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: ba7d8515c1e929baccea9f53d06d131fd2b007a1
      
https://github.com/qemu/qemu/commit/ba7d8515c1e929baccea9f53d06d131fd2b007a1
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c
    M hw/pci/pci_bridge.c
    M hw/pci/pci_bus.h
    M hw/pci/pcie_port.c

  Log Message:
  -----------
  pci: Teach PCI Bridges about VGA routing

Each PCI Bridge has a set of implied VGA regions that are enabled when
the VGA bit is set in the bridge control register.  This allows VGA
devices behind bridges.  Unfortunately with VGA Enable, which we
formerly allowed but didn't back, comes along some required VGA
baggage.  VGA Palette Snooping is required, along with VGA 16-bit
decoding.  We don't yet have support for palette snooping.
We also don't have support for 10-bit VGA aliases, the default mode, but
we enable the register, even on root ports, to avoid confusing guests.
Fortunately there's likely nothing from this century that requires these
features, so the missing bits are noted with TODOs.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 45eb768c706d3a5fbe55224c589e8b4e252781d9
      
https://github.com/qemu/qemu/commit/45eb768c706d3a5fbe55224c589e8b4e252781d9
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c
    M hw/pci/pci_bridge.h
    M hw/pci/pcie_port.c

  Log Message:
  -----------
  pci_bridge: factor out common code

Reuse common code in pcie_port, override the hardwired-to-0
bits per PCI Express spec.
No functional change but makes the code easier to follow.

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 600d05b9aa4b4d23775fc17968dd6b581928001d
      
https://github.com/qemu/qemu/commit/600d05b9aa4b4d23775fc17968dd6b581928001d
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci_bridge.h

  Log Message:
  -----------
  pci_bridge: drop formatting from source

We use the same formatting for all files, it
doesn't make sense to have formatting directives only
in pci bridge header.

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: e5368f0da75c1c668e85398aa930be2f4273e684
      
https://github.com/qemu/qemu/commit/e5368f0da75c1c668e85398aa930be2f4273e684
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c

  Log Message:
  -----------
  pci: Fix INTx routing notifier recursion

For some reason we recurse to fire the INTx routing notifier for each
child of a bus, for each possible device of a bus.  That means that if
we add a root port, the notifier gets called for that bridge 256
times.  If we add an upstream switch behind that root port, 256^2.  But
of course we need a downstream switch, 256^3.  This starts to be
noticeable.  Stop the insanity.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 659fefeed36a4b58191595cebab2dbc003788d90
      
https://github.com/qemu/qemu/commit/659fefeed36a4b58191595cebab2dbc003788d90
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci_bridge.c

  Log Message:
  -----------
  pci_bridge: Use a default map_irq function

The PCI bridge spec defines a default swizzle for translating INTx
IRQs from secondary bus to primary.  Use this by default for any
bridge that doesn't set a function.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: ea7cfed68bb4f26fc65b078ab735a4097e9b4fe2
      
https://github.com/qemu/qemu/commit/ea7cfed68bb4f26fc65b078ab735a4097e9b4fe2
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci_bridge_dev.c

  Log Message:
  -----------
  pci_bridge: Remove duplicate IRQ swizzle function

pci_bridge_dev_map_irq_fn() is identical to pci_swizzle_map_irq_fn(),
which is now the default for all PCI bridges.  We can therefore remove
this function and the pci_bridge_map_irq() call that used it.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 8c7f3dd05e4f1ee90000c89e428e69ae2e6bd691
      
https://github.com/qemu/qemu/commit/8c7f3dd05e4f1ee90000c89e428e69ae2e6bd691
  Author: Stefan Hajnoczi <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c

  Log Message:
  -----------
  pci: refuse empty ROM files

A zero size ROM file is invalid and should produce a warning.
Attempting to use a zero size file ends up hitting an assertion
qemu_ram_set_idstr() because RAMBlocks with duplicate addresses are
allocated - due to zero size the allocator doesn't increment the next
available RAMBlock offset.

Also convert __FUNCTION__ to __func__ while we're touching this code.
There are no other __FUNCTION__ instances in pci.c anymore.

Reported-by: Milos Ivanovic <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 49cd9ac6a1929467e2df5783a5183fc7708ec3ff
      
https://github.com/qemu/qemu/commit/49cd9ac6a1929467e2df5783a5183fc7708ec3ff
  Author: Stefan Hajnoczi <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M exec.c

  Log Message:
  -----------
  exec: assert that RAMBlock size is non-zero

find_ram_offset() does not handle size=0 gracefully.  It hands out the
same RAMBlock offset multiple times, leading to obscure failures later
on.

Add an assert to warn early if something is incorrectly allocating a
zero size RAMBlock.

Signed-off-by: Stefan Hajnoczi <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 3a861c466cee46fed042d76100fa0fd9644f3091
      
https://github.com/qemu/qemu/commit/3a861c466cee46fed042d76100fa0fd9644f3091
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c
    M hw/pci/pci_bus.h

  Log Message:
  -----------
  pci: Create and register a new PCI Express TypeInfo

This will allow us to differentiate Express and Legacy buses.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: cf09458d644934976aa64e88bb41ef9a4cc2766a
      
https://github.com/qemu/qemu/commit/cf09458d644934976aa64e88bb41ef9a4cc2766a
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.h
    M hw/pci/pci_bus.h

  Log Message:
  -----------
  pci: Move PCI and PCIE type defines

Move these so that we can reference them from a more common header
instead of including pci_bus.h everywhere.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 60a0e44320cc2601236450fbe95d952830192a1d
      
https://github.com/qemu/qemu/commit/60a0e44320cc2601236450fbe95d952830192a1d
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/alpha_typhoon.c
    M hw/apb_pci.c
    M hw/bonito.c
    M hw/dec_pci.c
    M hw/grackle_pci.c
    M hw/gt64xxx.c
    M hw/i82801b11.c
    M hw/ioh3420.c
    M hw/pci/pci.c
    M hw/pci/pci.h
    M hw/pci/pci_bridge.c
    M hw/pci/pci_bridge.h
    M hw/pci_bridge_dev.c
    M hw/piix_pci.c
    M hw/ppc4xx_pci.c
    M hw/ppce500_pci.c
    M hw/prep_pci.c
    M hw/q35.c
    M hw/sh_pci.c
    M hw/spapr_pci.c
    M hw/unin_pci.c
    M hw/versatile_pci.c
    M hw/xio3130_downstream.c
    M hw/xio3130_upstream.c

  Log Message:
  -----------
  pci: Allow PCI bus creation interfaces to specify the type of bus

No change to any types.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: afb661eb902f4ad1456d57b31cdd02f0b4aac33f
      
https://github.com/qemu/qemu/commit/afb661eb902f4ad1456d57b31cdd02f0b4aac33f
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/ioh3420.c
    M hw/q35.c
    M hw/xio3130_downstream.c
    M hw/xio3130_upstream.c

  Log Message:
  -----------
  pci: Q35, Root Ports, and Switches create PCI Express buses

Convert q35, ioh3420, xio3130_upstream, and xio3130_downstream to
use the new TYPE_PCIE_BUS.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 8c0bf9e24242c89c1abbd708c714dd2a89febbd2
      
https://github.com/qemu/qemu/commit/8c0bf9e24242c89c1abbd708c714dd2a89febbd2
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c
    M hw/pci/pci.h

  Log Message:
  -----------
  pci: Create pci_bus_is_express helper

For testing the bus type.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 0889464a5050c25611d08ca33d8447796c88c7f7
      
https://github.com/qemu/qemu/commit/0889464a5050c25611d08ca33d8447796c88c7f7
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pci.c
    M hw/pci/pci.h

  Log Message:
  -----------
  pci: Create and use API to determine root buses

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: eb28cb1bb0cb156aef7e613395af403bba0e7f30
      
https://github.com/qemu/qemu/commit/eb28cb1bb0cb156aef7e613395af403bba0e7f30
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pcie.c

  Log Message:
  -----------
  pcie: Mangle types to match topology

Windows will fail to start drivers for devices with an Endpoint type
PCIe capability attached to a Root Complex (code 10 - Device cannot
start).  The proper type for such a device is Root Complex Integrated
Endpoint.  Devices don't care which they are, so do this conversion
automatically.

This allows the Windows driver to load for nec-usb-xhci when attached
to pcie.0 of a q35 machine.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: a5519b42cfd6c00e9f8b31c5aad7682e7a9f1181
      
https://github.com/qemu/qemu/commit/a5519b42cfd6c00e9f8b31c5aad7682e7a9f1181
  Author: Michael S. Tsirkin <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M roms/configure-seabios.sh

  Log Message:
  -----------
  roms: switch oldnoconfig to olddefconfig

When a new option is added that qemu does not know
about, the prudent thing is to use the default not
force it to "no".

Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 6214e73cc5b75a4f8d89a70d71727edfa47a81b3
      
https://github.com/qemu/qemu/commit/6214e73cc5b75a4f8d89a70d71727edfa47a81b3
  Author: Alex Williamson <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M hw/pci/pcie.c
    M hw/pci/pcie.h
    M hw/usb/hcd-xhci.c

  Log Message:
  -----------
  pcie: Add endpoint capability initialization wrapper

Fix the awkward API of mangling the caller specified PCIe type and
just provide an interface to initialize an endpoint device.  This
will pick either a regular endpoint or integrated endpoint based on
the bus and return pcie_cap_init to doing exactly what is asked.

Signed-off-by: Alex Williamson <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>


  Commit: 404e7a4f4af753bd2aef649adf79e7434fb6dc31
      
https://github.com/qemu/qemu/commit/404e7a4f4af753bd2aef649adf79e7434fb6dc31
  Author: Anthony Liguori <address@hidden>
  Date:   2013-03-26 (Tue, 26 Mar 2013)

  Changed paths:
    M QMP/qmp-events.txt
    M exec.c
    M hw/alpha_typhoon.c
    M hw/apb_pci.c
    M hw/bonito.c
    M hw/dec_pci.c
    M hw/grackle_pci.c
    M hw/gt64xxx.c
    M hw/i82801b11.c
    M hw/ioh3420.c
    M hw/pci/pci.c
    M hw/pci/pci.h
    M hw/pci/pci_bridge.c
    M hw/pci/pci_bridge.h
    M hw/pci/pci_bus.h
    M hw/pci/pcie.c
    M hw/pci/pcie.h
    M hw/pci/pcie_port.c
    M hw/pci_bridge_dev.c
    M hw/piix_pci.c
    M hw/ppc4xx_pci.c
    M hw/ppce500_pci.c
    M hw/prep_pci.c
    M hw/q35.c
    M hw/qdev.c
    M hw/sh_pci.c
    M hw/spapr_pci.c
    M hw/unin_pci.c
    M hw/usb/hcd-xhci.c
    M hw/versatile_pci.c
    M hw/virtio-net.c
    M hw/virtio-pci.c
    M hw/xio3130_downstream.c
    M hw/xio3130_upstream.c
    M include/monitor/monitor.h
    M monitor.c
    M qapi-schema.json
    M qom/object.c
    M roms/configure-seabios.sh

  Log Message:
  -----------
  Merge remote-tracking branch 'mst/tags/for_anthony' into staging

virtio,pci,qom

Work by Alex to support VGA assignment,
pci and virtio fixes by Stefan, Jason and myself, and a
new qmp event for hotplug support by myself.

Signed-off-by: Michael S. Tsirkin <address@hidden>

# gpg: Signature made Tue 26 Mar 2013 02:02:24 PM CDT using RSA key ID D28D5469
# gpg: Can't check signature: public key not found

# By Alex Williamson (13) and others
# Via Michael S. Tsirkin
* mst/tags/for_anthony: (23 commits)
  pcie: Add endpoint capability initialization wrapper
  roms: switch oldnoconfig to olddefconfig
  pcie: Mangle types to match topology
  pci: Create and use API to determine root buses
  pci: Create pci_bus_is_express helper
  pci: Q35, Root Ports, and Switches create PCI Express buses
  pci: Allow PCI bus creation interfaces to specify the type of bus
  pci: Move PCI and PCIE type defines
  pci: Create and register a new PCI Express TypeInfo
  exec: assert that RAMBlock size is non-zero
  pci: refuse empty ROM files
  pci_bridge: Remove duplicate IRQ swizzle function
  pci_bridge: Use a default map_irq function
  pci: Fix INTx routing notifier recursion
  pci_bridge: drop formatting from source
  pci_bridge: factor out common code
  pci: Teach PCI Bridges about VGA routing
  pci: Add PCI VGA helpers
  virtio-pci: guest notifier mask without non-irqfd
  virtio-net: remove layout assumptions for mq ctrl
  ...


Compare: https://github.com/qemu/qemu/compare/18501ae6e825...404e7a4f4af7

reply via email to

[Prev in Thread] Current Thread [Next in Thread]