[Qemu-commits] [qemu/qemu] 8c3ac6: arm/translate.c: Fix adc_CC/sbc_CC implementation

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 8c3ac601bdaf8d4d81823a79f2a166b586db7dab
      
https://github.com/qemu/qemu/commit/8c3ac601bdaf8d4d81823a79f2a166b586db7dab
  Author: Peter Crosthwaite <address@hidden>
  Date:   2013-02-25 (Mon, 25 Feb 2013)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  arm/translate.c: Fix adc_CC/sbc_CC implementation

commits 49b4c31efcce45ab714f286f14fa5d5173f9069d and
2de68a4900ef6eb67380b0c128abfe1976bc66e8 reworked the implementation of adc_CC
and sub_CC. The new implementations (on the TCG_TARGET_HAS_add2_i32 code path)
are incorrect. The new logic is:

CF:NF = 0:A +/- 0:CF
CF:NF = CF:A +/- 0:B

The lower 32 bits of the intermediate result stored in NF needs to be passes
into the second addition in place of A (s/CF:A/CF:NF):

CF:NF = 0:A +/- 0:CF
CF:NF = CF:NF +/- 0:B

This patch fixes the issue.

Cc: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Anthony Liguori <address@hidden>


  Commit: e77f083292916ba43b940fdacd2fc1001b750d1d
      
https://github.com/qemu/qemu/commit/e77f083292916ba43b940fdacd2fc1001b750d1d
  Author: Richard Henderson <address@hidden>
  Date:   2013-02-25 (Mon, 25 Feb 2013)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Fix sbc_CC carry

While T0+~T1+CF = T0-T1+CF-1 is true for the low 32-bits,
it does not produce the correct carry-out to bit 33.  Do
exactly what the manual says.

Using the ~T1 makes the add and subtract code paths nearly
identical, so have sbc_CC use adc_CC.

Cc: Peter Maydell <address@hidden>
Reported-by: Laurent Desnogues <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Anthony Liguori <address@hidden>


  Commit: 08f4a0f7ee899c32bac91114e859d2687cbcf1d7
      
https://github.com/qemu/qemu/commit/08f4a0f7ee899c32bac91114e859d2687cbcf1d7
  Author: Richard Henderson <address@hidden>
  Date:   2013-02-25 (Mon, 25 Feb 2013)

  Changed paths:
    M target-ppc/translate.c

  Log Message:
  -----------
  target-ppc: Fix SUBFE carry

While ~T0+T1+CF = T1-T0+CF-1 is true for the low 32-bits,
it does not produce the correct carry-out to bit 33.  Do
exactly what the manual says.

Cc: Alexander Graf <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Anthony Liguori <address@hidden>


Compare: https://github.com/qemu/qemu/compare/a345481baa2b...08f4a0f7ee89