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[Qemu-commits] [qemu/qemu] 8a269c: MAINTAINERS: Document sPAPR (pSeries)
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[Qemu-commits] [qemu/qemu] 8a269c: MAINTAINERS: Document sPAPR (pSeries) machine |
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Date: |
Sat, 06 Oct 2012 12:00:16 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 8a269ca4167b43cbf1acaf51929f3f5919edcd1e
https://github.com/qemu/qemu/commit/8a269ca4167b43cbf1acaf51929f3f5919edcd1e
Author: Andreas Färber <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Document sPAPR (pSeries) machine
Signed-off-by: Andreas Färber <address@hidden>
Acked-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 98cded3a05de6a3295e89cc149ff267f1619bdc4
https://github.com/qemu/qemu/commit/98cded3a05de6a3295e89cc149ff267f1619bdc4
Author: Andreas Färber <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Document e500 machines and devices
Signed-off-by: Andreas Färber <address@hidden>
Cc: Alexander Graf <address@hidden>
Cc: Scott Wood <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 9b9fe13540d2375a109c1d17b53d240a592e442d
https://github.com/qemu/qemu/commit/9b9fe13540d2375a109c1d17b53d240a592e442d
Author: Andreas Färber <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Downgrade ppc405 to Odd Fixes
As requested by Alex.
Signed-off-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: aaade8d7d4d2a3d9b7fb99b198369b1b35a75450
https://github.com/qemu/qemu/commit/aaade8d7d4d2a3d9b7fb99b198369b1b35a75450
Author: Andreas Färber <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Document Bamboo machine and ppc4xx devices
Place it in alphabetical order and add new Devices section ppc4xx to
share file rules with 405 and virtex_ml507.
Signed-off-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 794d00bfc7c38cfc559fbec137ecd0117b40e77b
https://github.com/qemu/qemu/commit/794d00bfc7c38cfc559fbec137ecd0117b40e77b
Author: Andreas Färber <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Document virtex_ml507 machine
Place it in alphabetical order, there is a separate section for sharing
ppc4xx devices now.
Signed-off-by: Andreas Färber <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: ef9bd1507b60edba0619e16f1179b158eac2c3ac
https://github.com/qemu/qemu/commit/ef9bd1507b60edba0619e16f1179b158eac2c3ac
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/int_helper.c
Log Message:
-----------
target-ppc: simplify NaN propagation for vector functions
Commit e024e881bb1a8b5085026589360d26ed97acdd64 provided a pickNaN()
function for PowerPC, implementing the correct NaN propagation rules.
Therefore there is no need to test the operands manually, we can rely
on the softfloat code to do that.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: db1babb8dbb6d18433a51f1b4c3d186ea7057a6f
https://github.com/qemu/qemu/commit/db1babb8dbb6d18433a51f1b4c3d186ea7057a6f
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/int_helper.c
Log Message:
-----------
target-ppc: use the softfloat min/max functions
Use the new softfloat float32_min() and float32_max() to implement the
vminfp and vmaxfp instructions. As a bonus we can get rid of the call to
the HANDLE_NAN2 macro, as the NaN handling is directly done at the
softfloat level.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 2f93c23fe71420e5095f2fae1877fe747ad9f876
https://github.com/qemu/qemu/commit/2f93c23fe71420e5095f2fae1877fe747ad9f876
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/int_helper.c
Log Message:
-----------
target-ppc: use the softfloat float32_muladd function
Use the new softfloat float32_muladd() function to implement the vmaddfp
and vnmsubfp instructions. As a bonus we can get rid of the call to the
HANDLE_NAN3 macro, as the NaN handling is directly done at the softfloat
level.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 89243b3b0183471a373d1457e7f93811773b64a7
https://github.com/qemu/qemu/commit/89243b3b0183471a373d1457e7f93811773b64a7
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/int_helper.c
Log Message:
-----------
target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macros
We can finally get rid of the ugly HANDLE_NAN{1,2,3} macros.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: f1af19d767073a0926ce12c19b1f06c4933bca35
https://github.com/qemu/qemu/commit/f1af19d767073a0926ce12c19b1f06c4933bca35
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/kvm.c
Log Message:
-----------
ppc: Make kvm_arch_put_registers() put *all* the registers
At least when invoked with high enough 'level' arguments,
kvm_arch_put_registers() is supposed to copy essentially all the cpu state
as encoded in qemu's internal structures into the kvm state. Currently
the ppc version does not do this - it never calls KVM_SET_SREGS, for
example, and therefore never sets the SDR1 and various other important
though rarely changed registers.
Instead, the code paths which need to set these registers need to
explicitly make (conditional) kvm calls which transfer the changes to kvm.
This breaks the usual model of handling state updates in qemu, where code
just changes the internal model and has it flushed out to kvm automatically
at some later point.
This patch fixes this for Book S ppc CPUs by adding a suitable call to
KVM_SET_SREGS and als to KVM_SET_ONE_REG to set the HIOR (the only register
that is set with that call so far). This lets us remove the hacks to
explicitly set these registers from the kvmppc_set_papr() function.
The problem still exists for Book E CPUs (which use a different version of
the kvm_sregs structure). But fixing that has some complications of its
own so can be left to another day.
Lkewise, there is still some ugly code for setting the PVR through special
calls to SET_SREGS which is left in for now. The PVR needs to be set
especially early because it can affect what other features are available
on the CPU, so I need to do more thinking to see if it can be integrated
into the normal paths or not.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 048706d971c1830d7813052ca027ae00c519e894
https://github.com/qemu/qemu/commit/048706d971c1830d7813052ca027ae00c519e894
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.c
M hw/spapr_rtas.c
Log Message:
-----------
pseries: Fix and cleanup CPU initialization and reset
The current pseries machine init function iterates over the CPUs at several
points, doing various bits of initialization. This is messy; these can
and should be merged into a single iteration doing all the necessary per
cpu initialization. Worse, some of these initializations were setting up
state which should be set on every reset, not just at machine init time.
A few of the initializations simply weren't necessary at all.
This patch, therefore, moves those things that need to be to the
per-cpu reset handler, and combines the remainder into two loops over
the cpus (which also creates them). The second loop is for setting up
hash table information, and will be removed in a subsequent patch also
making other fixes to the hash table setup.
This exposes a bug in our start-cpu RTAS routine (called by the guest to
start up CPUs other than CPU0) under kvm. Previously, this function did
not make a call to ensure that it's changes to the new cpu's state were
pushed into KVM in-kernel state. We sort-of got away with this because
some of the initializations had already placed the secondary CPUs into the
right starting state for the sorts of Linux guests we've been running.
Nonetheless the start-cpu RTAS call's behaviour was not correct and could
easily have been broken by guest changes. This patch also fixes it.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: c8787ad477f3be5a971b877dcb1bae5752c5796a
https://github.com/qemu/qemu/commit/c8787ad477f3be5a971b877dcb1bae5752c5796a
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.c
Log Message:
-----------
pseries: Use new method to correct reset sequence
A number of things need to occur during reset of the PAPR
paravirtualized platform in a specific order. For example, the hash
table needs to be cleared before the CPUs are reset, so that they
initialize their register state correctly, and the CPUs need to have
their main reset called before we set up the entry point state on the
boot cpu. We also need to have the main qdev reset happen before the
creation and installation of the device tree for the new boot, because
we need the state of the devices settled to correctly construct the
device tree.
We currently do the pseries once-per-reset initializations done from a
reset handler. However we can't adequately control when this handler
is called during the reset - in particular we can't guarantee it
happens after all the qdev resets (since qdevs might be registered
after the machine init function has executed).
This patch uses the new QEMUMachine reset method to to fix this
problem, ensuring the various order dependent reset steps happen in
the correct order.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 7f763a5d994bbddb50705d2e50decdf52937521f
https://github.com/qemu/qemu/commit/7f763a5d994bbddb50705d2e50decdf52937521f
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.c
M hw/spapr.h
M target-ppc/kvm.c
M target-ppc/kvm_ppc.h
Log Message:
-----------
pseries: Add support for new KVM hash table control call
This adds support for then new "reset htab" ioctl which allows qemu
to properly cleanup the MMU hash table when the guest is reset. With
the corresponding kernel support, reset of a guest now works properly.
This also paves the way for indicating a different size hash table
to the kernel and for the kernel to be able to impose limits on
the requested size.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 4dd96f244f62d5e4b493c1f4071c0d4a4a57474d
https://github.com/qemu/qemu/commit/4dd96f244f62d5e4b493c1f4071c0d4a4a57474d
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr_vio.c
Log Message:
-----------
pseries: Clear TCE and signal state when resetting PAPR VIO devices
When we reset the system, the reset method for VIO bus devices resets
the state of their request queue (if present) as it should. However
it was not resetting the state of their TCE table (DMA translation) if
present. It was also not resetting the state of the per-device signal
mask set with H_VIO_SIGNAL. This patch corrects both bugs, and also
removes some small code duplication in the reset paths.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: eddeed26ac83392053aef823a341f643ea8e3d2f
https://github.com/qemu/qemu/commit/eddeed26ac83392053aef823a341f643ea8e3d2f
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.h
M hw/spapr_iommu.c
M hw/spapr_pci.c
Log Message:
-----------
pseries: Reset emulated PCI TCE tables on system reset
The emulated PCI host bridge on the pseries machine incorporates an IOMMU
(PAPR TCE table). Currently the mappings in this IOMMU are not cleared
when we reset the system. This patch fixes this bug. To do this it adds
a new reset function to the IOMMU emulation code. The VIO devices already
reset their TCE tables, but they do so by destroying and re-creating their
DMA context. This doesn't work for the PCI host bridge, because the
infrastructure for PCI IOMMUs has already copied/cached the DMA pointer
context into the subordinate PCI device structures.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 256b408abea2cfe18d8c0278e5b46213509db271
https://github.com/qemu/qemu/commit/256b408abea2cfe18d8c0278e5b46213509db271
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/xics.c
Log Message:
-----------
pseries: Fix XICS reset
The XICS interrupt controller used on the pseries machine currently has no
reset handler. We can get away with this under some circumstances, but
it's not correct, and can cause failures if the XICS happens to be in the
wrong state at the time of reset.
This patch adds a hook to properly reset the XICS state.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 1dd088946cf464a994bc93945a360aef049493af
https://github.com/qemu/qemu/commit/1dd088946cf464a994bc93945a360aef049493af
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr_hcall.c
Log Message:
-----------
pseries: Small cleanup to H_CEDE implementation
The H_CEDE hypercall implementation for the pseries machine doesn't trigger
quite the right path in the main cpu exec loop. We should set exit_request
to pop up one extra level and recheck state, and we should set the
exception_index to EXCP_HLT (H_CEDE is roughly equivalent to the hlt
instruction on x86).
In practice, this doesn't really matter except for KVM, and KVM implements
H_CEDE internally so we never hit this code path. But we might as well
get it right, just in case it matters some day.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 98ca8c023825fc6dd99e6cea1956d84ed8cadb3a
https://github.com/qemu/qemu/commit/98ca8c023825fc6dd99e6cea1956d84ed8cadb3a
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/xics.c
Log Message:
-----------
pseries: Remove C bitfields from xics code
The XICS interrupt controller emulation uses some C bitfield variables in
its internal state structure. This makes like awkward for saving the state
because we don't have easy VMSTATE helpers for bitfields.
This patch removes the bitfields, instead using explicit bit masking in a
single status variable.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: ff9d2afa618acd81d926c9c213b4ff5f7163db1d
https://github.com/qemu/qemu/commit/ff9d2afa618acd81d926c9c213b4ff5f7163db1d
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.c
M hw/spapr.h
M hw/spapr_pci.c
M hw/xics.c
M hw/xics.h
Log Message:
-----------
pseries: Remove XICS irq type enum type
Currently the XICS interrupt controller emulation uses a custom enum to
specify whether a given interrupt is level-sensitive or message-triggered.
This enum makes life awkward for saving the state, and isn't particularly
useful since there are only two possibilities. This patch replaces the
enum with a simple bool.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 490d4a2b6edafb27cd688ded7fdb1290453d71b0
https://github.com/qemu/qemu/commit/490d4a2b6edafb27cd688ded7fdb1290453d71b0
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr_vio.h
Log Message:
-----------
pseries: Remove never used flags field from spapr vio devices
The general device state structure for PAPR VIO emulated devices includes a
'flags' field which was never used. This patch removes it.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 53724ee565565f69560dbe17553bede8c0169379
https://github.com/qemu/qemu/commit/53724ee565565f69560dbe17553bede8c0169379
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.h
M hw/spapr_iommu.c
M hw/spapr_vio.c
M hw/spapr_vio.h
Log Message:
-----------
pseries: Rework implementation of TCE bypass
On the pseries machine the IOMMU (aka TCE tables) is always active for all
PCI and VIO devices. Mostly to simplify the SLOF firmware, we implement an
extension which allows the IOMMU to be temporarily disabled for certain
devices.
Currently this is implemented by setting the device's DMAContext pointer to
NULL (thus reverting to qemu's default no-IOMMU DMA behaviour), then
replacing it when bypass mode is disabled.
This approach causes a bunch of complications though. It complexifies the
management of the DMAContext lifetimes, it's problematic for savevm/loadvm,
and it means that while bypass is active we have nowhere to store the
device's LIOBN (Logical IO Bus Number, used to identify DMA address
spaces). At present we regenerate the LIOBN from other address information
but this restricts how we can allocate LIOBNs.
This patch gives up on this approach, replacing it with the much simpler
one of having a 'bypass' boolean flag in the TCE state structure.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 3fe719f467530b7c8ac0797881ff4b66d1357c18
https://github.com/qemu/qemu/commit/3fe719f467530b7c8ac0797881ff4b66d1357c18
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/xics.c
Log Message:
-----------
pseries: Fix semantics of RTAS int-on, int-off and set-xive functions
Currently the ibm,int-on and ibm,int-off RTAS functions are implemented as
no-ops. This is because when implemented as specified in PAPR they caused
Linux (which calls both int-on/off and set-xive) to end up with interrupts
masked when they should not be. Since Linux's set-xive calls make the
int-on/off calls redundant, making them nops worked around the problem.
In fact, the problem was caused because there was a subtle bug in set-xive,
PAPR specifies that as well as updating the current priority, it also needs
to update the saved priority used by int-on/off. With this bug fixed the
problem goes away. This patch implements this more correct fix.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: ace9a2cbac9b2949aadc176ffa83a1d2a0873e2c
https://github.com/qemu/qemu/commit/ace9a2cbac9b2949aadc176ffa83a1d2a0873e2c
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/kvm.c
Log Message:
-----------
target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab()
The kvmppc_reset_htab() function invokes the KVM_PPC_ALLOCATE_HTAB vm ioctl
to request KVM to allocate and reset a hash page table for the guest - it
returns the size of hash table allocated, or 0 to indicate that qemu needs
to allocate the hash table itself. In practice qemu needs to allocate the
htab for full emulation and with Book3sPR KVM, but the kernel has to
allocate it for Book3sHV KVM (the hash table needs to be physically
contiguous in that case).
Unfortunately, the logic in this function is incorrect for some existing
kernels. Specifically:
* at least some PR KVM versions advertise the relevant capability but
don't actually implement the ioctl(), returning ENOTTY.
* For old kernels which don't have the capability, we currently return 0.
This is correct for PV KVM, where we need to allocate the htab, but not for
HV KVM - kernels of this era always allocate a 16MB hash table per guest.
This patch corrects both of these edge cases.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 5a1972c8472fafd519a68b689fdcaf33ec857945
https://github.com/qemu/qemu/commit/5a1972c8472fafd519a68b689fdcaf33ec857945
Author: Stefan Weil <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/ppc405_uc.c
Log Message:
-----------
ppc405_uc: Fix buffer overflow
Report from smatch:
ppc405_uc.c:209 dcr_read_pob(12) error: buffer overflow 'pob->besr' 2 <= 2
ppc405_uc.c:232 dcr_write_pob(12) error: buffer overflow 'pob->besr' 2 <= 2
The old code reads and writes besr[POB0_BESR1 - POB0_BESR0] or besr[2]
which is one too much.
Signed-off-by: Stefan Weil <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 35f9304d925a5423c51bd2c83a81fa3cc2b6e680
https://github.com/qemu/qemu/commit/35f9304d925a5423c51bd2c83a81fa3cc2b6e680
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr_hcall.c
Log Message:
-----------
pseries: Remove unnecessary locking from PAPR hash table hcalls
In the paravirtualized environment provided by PAPR, there is a standard
locking scheme so that hypercalls updating the hash page table from
different guest threads don't corrupt the haah table state. We implement
this HVLOCK bit in out page table hypercalls. However, it is not necessary
in our case, since the hypercalls all run in the qemu environment under the
big qemu lock.
Therefore, this patch removes the locking code. This has the additional
advantage of freeing up a hash PTE bit which will be useful for migration
support.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 382be75df77142cf6bdc7f5852738029eeb9e23a
https://github.com/qemu/qemu/commit/382be75df77142cf6bdc7f5852738029eeb9e23a
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.c
Log Message:
-----------
pseries: Set hash table size based on RAM size
Currently the pseries machine code always attempts to set the size of the
guests's hash page table to 16MB. However, because of the way the POWER
MMU works, a suitable hash page table size should really depend on memory
size. 16MB will be excessive for guests with <1GB and RAM, and may not be
enough for guests with >2GB of RAM (depending on guest page size and
other factors).
The usual given rule of thumb is that the hash table should be 1/64 of
the size of memory, but in fact the Linux guests we are aiming at don't
really need that much. This patch, therefore, changes the hash table
allocation code to aim for 1/128 of the size of RAM (rounding up). When
using KVM, this size may still be adjusted by the host kernel if it is
unable to allocate a suitable (contiguous) table.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 011aba24ed73000e126dd1bb90a6bea2afd91649
https://github.com/qemu/qemu/commit/011aba24ed73000e126dd1bb90a6bea2afd91649
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/cpu.h
M target-ppc/machine.c
Log Message:
-----------
target-ppc: Remove unused power_mode field from cpu state
CPUPPCState includes a variable 'power_mode' which is used nowhere. This
patch removes it. This includes saving a dummy zero in its place during
vmsave, to avoid breaking the save format.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 711934334eb3895a89c555c1f57eb3d84ddb2906
https://github.com/qemu/qemu/commit/711934334eb3895a89c555c1f57eb3d84ddb2906
Author: Alexander Graf <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M device_tree.c
M device_tree.h
M hw/ppc/e500.c
Log Message:
-----------
fdt: move dumpdtb interpretation code to device_tree.c
The dumpdtb code can be useful in more places than just for e500. Move it
to a generic place.
Signed-off-by: Alexander Graf <address@hidden>
Commit: 6641b77254d3c191ecee5a87947425f623ac9ca0
https://github.com/qemu/qemu/commit/6641b77254d3c191ecee5a87947425f623ac9ca0
Author: Alexander Graf <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M device_tree.c
Log Message:
-----------
device tree: simplify dumpdtb code
As per Peter's suggestion, we can use glib to write out a buffer in whole to
a file, simplifying the code dramatically.
Signed-off-by: Alexander Graf <address@hidden>
Commit: 9dd5eba1bc69bccbd83885d157d84e2514799a22
https://github.com/qemu/qemu/commit/9dd5eba1bc69bccbd83885d157d84e2514799a22
Author: Scott Wood <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/ppc/e500.c
Log Message:
-----------
PPC: e500: increase DTC_LOAD_PAD
An allowance of 5 MiB for BSS is not enough for Linux kernels with certain
debug options enabled (not sure exactly which one caused it, but I'd guess
lockdep). The kernel I ran into this with had a BSS of around 6.4 MB.
Unfortunately, uImage does not give us enough information to determine the
actual BSS size. Increase the allowance to 18 MiB to give us plenty of
room. Eventually this should be more intelligent, possibly packing
initrd+dtb at the end of guest RAM.
Signed-off-by: Scott Wood <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 7e7ec2d290ca5b1bdd555da9852dc5ee60232fe5
https://github.com/qemu/qemu/commit/7e7ec2d290ca5b1bdd555da9852dc5ee60232fe5
Author: Scott Wood <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/ppc/e500.c
Log Message:
-----------
PPC: e500: calculate initrd_base like dt_base
While investigating dtb pad issues, I noticed that initrd_base wasn't taking
loadaddr into account the way dt_base was. This seems wrong.
Signed-off-by: Scott Wood <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: efcb9383b974114e5f682e531346006f8f2466c0
https://github.com/qemu/qemu/commit/efcb9383b974114e5f682e531346006f8f2466c0
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/spapr.c
M hw/spapr_hcall.c
Log Message:
-----------
pseries: Don't test for MSR_PR for hypercalls under KVM
PAPR hypercalls should only be invoked from the guest kernel, not guest
user programs, that is, with MSR[PR]=0. Currently we check this in
spapr_hypercall, returning H_PRIVILEGE if MSR[PR]=1.
However, under KVM the state of MSR[PR] is already checked by the host
kernel before passing the hypercall to qemu, making this check redundant.
Worse, however, we don't generally synchronize KVM and qemu state on the
hypercall path, meaning that qemu could incorrectly reject a hypercall
because it has a stale MSR value.
This patch fixes the problem by moving the privilege test exclusively to
the TCG hypercall path.
Signed-off-by: David Gibson <address@hidden>
CC: address@hidden
Signed-off-by: Alexander Graf <address@hidden>
Commit: 2b15811c8cd4dbe8dcde32320936fe74e51e4279
https://github.com/qemu/qemu/commit/2b15811c8cd4dbe8dcde32320936fe74e51e4279
Author: David Gibson <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/translate_init.c
Log Message:
-----------
ppc/pseries: Reset VPA registration on CPU reset
The ppc specific CPU state contains several variables which track the
VPA, SLB shadow and dispatch trace log. These are structures shared
between OS and hypervisor that are used on the pseries machine to track
various per-CPU quantities.
The address of these structures needs to be registered by the guest on each
boot, however currently this registration is not cleared when we reset the
cpu. This patch corrects this bug.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: fb37c3029c5a695e367baaacc6baf17640cc63cc
https://github.com/qemu/qemu/commit/fb37c3029c5a695e367baaacc6baf17640cc63cc
Author: Alexander Graf <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M hw/ppc/e500.c
Log Message:
-----------
PPC: e500: Only expose even TLB sizes in initial TLB
When booting our e500 machine, we automatically generate a big TLB entry
in TLB1 that covers all of the code we need to run in there until the guest
can handle its TLB on its own.
However, e500v2 can only handle MAS1.0 sizes. However, we keep our TLB
information in MAS2.0 layout, which means we have twice as many TLB sizes
to choose from. That also means we can run into a situation where we try
to add a TLB size that could not fit into the MAS1.0 size bits.
Fix it by making sure we always have the lower bit set to 0. That way we
are always guaranteed to have MAS1.0 compatible TLB size information.
Signed-off-by: Alexander Graf <address@hidden>
Commit: ef8beb0e94c75984e016e855164361c36e15396c
https://github.com/qemu/qemu/commit/ef8beb0e94c75984e016e855164361c36e15396c
Author: Alexander Graf <address@hidden>
Date: 2012-10-04 (Thu, 04 Oct 2012)
Changed paths:
M target-ppc/kvm.c
Log Message:
-----------
PPC: KVM: Fix BAT put
In the sregs API, upper and lower 32bit segments of the BAT registers
are swapped when doing a set. Since we need to support old kernels out
there, don't bother to fix it in the kernel, but instead work around
the problem in QEMU by swapping on put.
Signed-off-by: Alexander Graf <address@hidden>
Commit: 7a608f562ebd91e811ed0b725e528c894e4f19c4
https://github.com/qemu/qemu/commit/7a608f562ebd91e811ed0b725e528c894e4f19c4
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M hw/nand.c
M hw/onenand.c
M hw/sd.c
Log Message:
-----------
hw: Fix return value check for bdrv_read, bdrv_write
Those functions return -errno in case of an error.
The old code would typically only detect EPERM (1) errors.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: afb63ebd0a9599312c27ecceb839a399740e00ef
https://github.com/qemu/qemu/commit/afb63ebd0a9599312c27ecceb839a399740e00ef
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M configure
Log Message:
-----------
configure: Support empty target list (--target-list=)
Specifying an empty target list with --target-list= is shorter
than specifying --disable-user --disable-system.
Both variants should give the same result: no targets at all.
This modification implements that feature.
It uses a trick which works with POSIX compliant shells to test whether
target_list is undefined (=> default targets) or empty (=> no targets).
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: b2532d88c9eb4f4734f62d5075585ee8c1516605
https://github.com/qemu/qemu/commit/b2532d88c9eb4f4734f62d5075585ee8c1516605
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M cpus.c
Log Message:
-----------
cpu: Add missing 'static' attribute to qemu_global_mutex
Contrary to its name, 'qemu_global_mutex' is only used locally
in cpus.c.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: f97713ff191ab855ca5c03458f8dab0c9bf58443
https://github.com/qemu/qemu/commit/f97713ff191ab855ca5c03458f8dab0c9bf58443
Author: Peter Maydell <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M tcg/arm/tcg-target.c
Log Message:
-----------
tcg/arm: Use tcg_out_mov_reg rather than inline equivalent code
Use the recently introduced tcg_out_mov_reg() function rather than
the equivalent inline code.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 30daca5f77588a75bf9bcd604e21c5506402fabb
https://github.com/qemu/qemu/commit/30daca5f77588a75bf9bcd604e21c5506402fabb
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M slirp/ip_icmp.h
Log Message:
-----------
slirp: Fix spelling in comment (enought -> enough, insure -> ensure)
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: d69eba24269c0d3d376b7de4095dcca376a3beea
https://github.com/qemu/qemu/commit/d69eba24269c0d3d376b7de4095dcca376a3beea
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M ui/vnc-tls.c
Log Message:
-----------
vnc: Fix spelling (hellmen -> hellman) in comment
The algorithm was named after Martin E. Hellman.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 58455eb9f2865d54c8bf208805f7a4c217b5c00d
https://github.com/qemu/qemu/commit/58455eb9f2865d54c8bf208805f7a4c217b5c00d
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M qemu-common.h
M qemu-sockets.c
Log Message:
-----------
qemu-sockets: Fix compiler warning (regression for MinGW)
setsockopt needs a type cast for MinGW. That type cast is missing in
a recent commit which results in a compiler warning.
Like for other socket related functions which have the same problem,
we add a 'qemu_setsockopt' macro which provides that type cast where
needed and use the new macro to avoid the warning.
A 'qemu_getsockopt' is also added and can be used for future
modifications.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 4d5b97da35ecbfdad6fe1cbe7fdd7d71ef735602
https://github.com/qemu/qemu/commit/4d5b97da35ecbfdad6fe1cbe7fdd7d71ef735602
Author: Amos Kong <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M block/qed-table.c
M blockdev.c
M hw/9pfs/virtio-9p.c
M hw/blizzard.c
M hw/bt-hci.c
M hw/device-hotplug.c
M hw/exynos4210_combiner.c
M hw/exynos4210_gic.c
M hw/exynos4210_mct.c
M hw/fdc.c
M hw/framebuffer.c
M hw/ide/macio.c
M hw/ivshmem.c
M hw/megasas.c
M hw/msix.c
M hw/pflash_cfi01.c
M hw/pflash_cfi02.c
M hw/pxa2xx_keypad.c
M hw/sb16.c
M hw/scsi-disk.c
M hw/tcx.c
M hw/usb/dev-uas.c
M hw/usb/hcd-ohci.c
M hw/usb/hcd-xhci.c
M hw/xen_domainbuild.c
M libcacard/vcard.c
M libcacard/vcard_emul_nss.c
M libcacard/vreader.c
M linux-user/signal.c
M os-posix.c
M qemu-sockets.c
M qga/commands-posix.c
M qga/commands-win32.c
M savevm.c
M slirp/ip_input.c
M slirp/tcp_input.c
M slirp/udp.c
M target-unicore32/translate.c
M ui/vnc-auth-sasl.c
M vl.c
M xen-all.c
Log Message:
-----------
cleanup useless return sentence
This patch cleans up return sentences in the end of void functions.
Reported-by: Paolo Bonzini <address@hidden>
Signed-off-by: Amos Kong <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: da665c99f1b5d3247f7f9f8a24f3eb1fda94e1e4
https://github.com/qemu/qemu/commit/da665c99f1b5d3247f7f9f8a24f3eb1fda94e1e4
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M hw/leon3.c
M hw/mips_fulong2e.c
Log Message:
-----------
hw: Add missing 'static' attribute for QEMUMachine
It was missing for leon3 and mips_fulong2e.
Signed-off-by: Stefan Weil <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 8e7e2b14e7c86cdceb337cf7f5c4c351ab350775
https://github.com/qemu/qemu/commit/8e7e2b14e7c86cdceb337cf7f5c4c351ab350775
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M qemu-barrier.h
Log Message:
-----------
qemu-barrier: Fix compiler version check for future gcc versions
The current check will give a wrong result for gcc-5.x with x < 4.
Using QEMU_GNUC_PREREQ is simpler and fixes that issue.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: c36b7de64dfb106ee0384d2634fd4037218ffbca
https://github.com/qemu/qemu/commit/c36b7de64dfb106ee0384d2634fd4037218ffbca
Author: Eduardo Habkost <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M hw/qdev.c
Log Message:
-----------
qdev: kill bogus comment
When the DeviceInfo code was removed, the comment describing
qdev_subclass_init() was left in the code by mistake. Remove it.
Cc: address@hidden
Signed-off-by: Eduardo Habkost <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 02cd521f6e207bd8843a7c1309f6d065cf01c6ee
https://github.com/qemu/qemu/commit/02cd521f6e207bd8843a7c1309f6d065cf01c6ee
Author: Stefan Weil <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M hw/versatilepb.c
Log Message:
-----------
versatilepb: Use symbolic indices for ARM PIC
It is more readable, and all other code does it like that, too.
Signed-off-by: Stefan Weil <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 6fd2a026fbf46ed5927a57e3e043a2039a0651d0
https://github.com/qemu/qemu/commit/6fd2a026fbf46ed5927a57e3e043a2039a0651d0
Author: Peter Maydell <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M cpu-all.h
M cpu-exec.c
M cpus.c
M exec.c
M monitor.c
M target-i386/cpu.c
M target-i386/cpu.h
M target-i386/helper.c
M target-i386/seg_helper.c
M target-i386/smm_helper.c
Log Message:
-----------
cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being
x86-specific flags to being generic ones. This allows us to drop some
TARGET_I386 ifdefs in various places, and means that we can (potentially)
be more consistent across architectures about which monitor commands or
debug abort printouts include FPU register contents and info about
QEMU's condition-code optimisations.
Signed-off-by: Peter Maydell <address@hidden>
Commit: f2617cfc237a7f7e72bd3791ed1f3d35f496bb22
https://github.com/qemu/qemu/commit/f2617cfc237a7f7e72bd3791ed1f3d35f496bb22
Author: Peter Maydell <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/translate.c
Log Message:
-----------
target-arm: Reinstate display of VFP registers in cpu_dump_state
Reinstate the display of VFP registers in cpu_dump_state(), if
the CPU has them (this code had been #if 0'd out a for a long time).
We drop the attempt ot display the values as floating point, since
this makes assumptions about the host 'float' and 'double' formats
and is not done by eg the i386 cpu_dump_state().
This display is gated on the CPU_DUMP_FPU flag, as for x86.
Signed-off-by: Peter Maydell <address@hidden>
Commit: 66c374de8a949062bfb1792f7e685a168c61c416
https://github.com/qemu/qemu/commit/66c374de8a949062bfb1792f7e685a168c61c416
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/translate.c
Log Message:
-----------
target-arm: use globals for CC flags
Use globals for CC flags instead of loading/storing them each they are
accessed. This allows some optimizations to be performed by the TCG
optimization passes.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 72485ec4f63d86c428f9223fc966bd7d2cc8100c
https://github.com/qemu/qemu/commit/72485ec4f63d86c428f9223fc966bd7d2cc8100c
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/helper.h
M target-arm/op_helper.c
M target-arm/translate.c
Log Message:
-----------
target-arm: convert add_cc and sub_cc helpers to TCG
Now that the setcond TCG op is available, it's possible to replace
add_cc and sub_cc helpers by TCG code. The code generated by TCG is
actually very close to the one generated by GCC for the helper, and
this avoid all the consequences of using an helper: globals saved back
to memory, no possible optimization, call overhead, etc.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 365af80e47bf150506345cdfbcbf32120f18cdf6
https://github.com/qemu/qemu/commit/365af80e47bf150506345cdfbcbf32120f18cdf6
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/helper.h
M target-arm/op_helper.c
M target-arm/translate.c
Log Message:
-----------
target-arm: convert sar, shl and shr helpers to TCG
Now that the movcond TCG op is available, it's possible to replace
shl and shr helpers by TCG code. The code generated by TCG is slightly
longer than the code generated by GCC for the helper but is still worth
it as this avoid all the consequences of using an helper: globals saved
back to memory, no possible optimization, call overhead, etc.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 00e3ab2db059d243e210052937fc4f4169aa839c
https://github.com/qemu/qemu/commit/00e3ab2db059d243e210052937fc4f4169aa839c
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/helper.h
Log Message:
-----------
target-arm: mark a few integer helpers const and pure
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: d593c48ef91b6fee609d9c87958fe76dd2b36852
https://github.com/qemu/qemu/commit/d593c48ef91b6fee609d9c87958fe76dd2b36852
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/translate.c
Log Message:
-----------
target-arm: use deposit instead of hardcoded version
Use the deposit op instead of and hardcoded bit field insertion. It
allows the host to emit the corresponding instruction if available.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 1273d9ca09e91bb290d10f704055f6abec363dd6
https://github.com/qemu/qemu/commit/1273d9ca09e91bb290d10f704055f6abec363dd6
Author: Peter Maydell <address@hidden>
Date: 2012-10-05 (Fri, 05 Oct 2012)
Changed paths:
M target-arm/cpu.h
Log Message:
-----------
target-arm: Drop unused DECODE_CPREG_CRN macro
This macro snuck through code review despite being unused; drop it.
Signed-off-by: Peter Maydell <address@hidden>
Commit: f783cb22409c6537b3cab7e78e527f62b4237d1e
https://github.com/qemu/qemu/commit/f783cb22409c6537b3cab7e78e527f62b4237d1e
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M target-xtensa/translate.c
Log Message:
-----------
target-xtensa: de-optimize EXTUI
Now that "and" with 0xff, 0xffff and 0xffffffff and "shr" with 0 shift
are optimized in tcg/tcg-op.h there is no need to do it in
target-xtensa/translate.c.
Acked-by: Max Filippov <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 626cd050e2c9094c1b005bc39cab637f8cbe3755
https://github.com/qemu/qemu/commit/626cd050e2c9094c1b005bc39cab637f8cbe3755
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M tcg/README
M tcg/arm/tcg-target.c
M tcg/hppa/tcg-target.c
M tcg/i386/tcg-target.c
M tcg/ia64/tcg-target.c
M tcg/mips/tcg-target.c
M tcg/ppc/tcg-target.c
M tcg/ppc64/tcg-target.c
M tcg/s390/tcg-target.c
M tcg/sparc/tcg-target.c
M tcg/tcg-opc.h
M tcg/tci/tcg-target.c
M tci.c
Log Message:
-----------
tcg: remove obsolete jmp op
The TCG jmp operation doesn't really make sense in the QEMU context, it
is unused, it is not implemented by some targets, and it is wrongly
implemented by some others.
This patch simply removes it.
Reviewed-by: Richard Henderson <address@hidden>
Acked-by: Blue Swirl <address@hidden>
Acked-by: Stefan Weil<address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: a1e472119aa2efa88a2a24b1aa50e45ea8cc8f31
https://github.com/qemu/qemu/commit/a1e472119aa2efa88a2a24b1aa50e45ea8cc8f31
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/alpha_pci.c
M hw/mips_malta.c
M hw/pc.c
M hw/ppc_newworld.c
M hw/ppc_oldworld.c
M hw/ppc_prep.c
M hw/spapr.c
M hw/sun4u.c
M hw/vga-pci.c
M hw/vga-pci.h
Log Message:
-----------
vga: rename pci_vga_init() into pci_std_vga_init()
This better explains what is this function about. Adjust all callers.
Cc: Alexander Graf <address@hidden>
Cc: Andreas Färber <address@hidden>
Cc: David Gibson <address@hidden>
Cc: Anthony Liguori <address@hidden>
Acked-by: Richard Henderson <address@hidden>
Acked-by: Blue Swirl <address@hidden>
Acked-by: Andreas Färber <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 6405c86412719a0ccd1a09b81baf0b78e8a4ae6b
https://github.com/qemu/qemu/commit/6405c86412719a0ccd1a09b81baf0b78e8a4ae6b
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/mips_r4k.c
M hw/pc.c
M hw/pc.h
Log Message:
-----------
vga: rename isa_vga_init() to isa_std_vga_init()
This better explains what is this function about. Adjust all callers.
Cc: Anthony Liguori <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 36b7f27d2195a09dbfb7f08b2323d807c1ad90b0
https://github.com/qemu/qemu/commit/36b7f27d2195a09dbfb7f08b2323d807c1ad90b0
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/qdev.c
M hw/qdev.h
M vl.c
Log Message:
-----------
vl.c: convert *vga_enabled functions to QOM
And get rid of qdev_exists().
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 879049a39724f91224f10c8d80b3cf70c9dc1c5e
https://github.com/qemu/qemu/commit/879049a39724f91224f10c8d80b3cf70c9dc1c5e
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M vl.c
Log Message:
-----------
vl.c: check for qxl availability
Check for qxl availability in vl.c. This will allow to remove #ifdef
CONFIG_SPICE .. #endif later in this series
Cc: Anthony Liguori <address@hidden>
Cc: Gerd Hoffmann <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 3605ded557eb2a6d06a942b952c8fac4c676b125
https://github.com/qemu/qemu/commit/3605ded557eb2a6d06a942b952c8fac4c676b125
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M vl.c
Log Message:
-----------
vl.c: default to std if cirrus is not available
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 129d42fb8496de5c1896160fddab949784d4dea4
https://github.com/qemu/qemu/commit/129d42fb8496de5c1896160fddab949784d4dea4
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/pci.c
M hw/pci.h
Log Message:
-----------
pci: add a pci_vga_init() function
This function create a PCI VGA device according to the value of
vga_interface_type. It returns a PCIDevice (and not a DeviceState).
Cc: Anthony Liguori <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 14e7a6456e1dba2c6499b3b05637fee9f553e6ce
https://github.com/qemu/qemu/commit/14e7a6456e1dba2c6499b3b05637fee9f553e6ce
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/isa-bus.c
M hw/isa.h
Log Message:
-----------
isa: add a isa_vga_init() function
This function create a ISA VGA device according to the value of
vga_interface_type. It returns a ISADevice (and not a DeviceState).
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 9c59864d16d720184e723c0c29c505c34e94fed5
https://github.com/qemu/qemu/commit/9c59864d16d720184e723c0c29c505c34e94fed5
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/mips_malta.c
Log Message:
-----------
mips/malta: use the new pci_vga_init() function
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 606f90cc22094bab743c84d40a11f6ded603ad34
https://github.com/qemu/qemu/commit/606f90cc22094bab743c84d40a11f6ded603ad34
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/alpha_dp264.c
M hw/alpha_pci.c
M hw/alpha_sys.h
Log Message:
-----------
alpha: use the new pci_vga_init() function
This remove the fallback to std-vga in case, as availability of the
requested vga device is now tested in vl.c, and returns an error message
to the user.
Acked-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: e7a2e96df0692e19f253476027a565dc7c11da76
https://github.com/qemu/qemu/commit/e7a2e96df0692e19f253476027a565dc7c11da76
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/ppc_newworld.c
Log Message:
-----------
ppc/newworld: use the new pci_vga_init() function
As a bonus it allows new vga card types (including none).
Cc: Alexander Graf <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 3e20ad3a9b674abc3464504d59bba46304316136
https://github.com/qemu/qemu/commit/3e20ad3a9b674abc3464504d59bba46304316136
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/ppc_oldworld.c
Log Message:
-----------
ppc/oldworld: use the new pci_vga_init() function
As a bonus it allows new vga card types (including none).
Cc: Alexander Graf <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 95fa01fab0082483c1849f1439303db4183c8dd4
https://github.com/qemu/qemu/commit/95fa01fab0082483c1849f1439303db4183c8dd4
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/ppc_prep.c
Log Message:
-----------
ppc/prep: use the new pci_vga_init() function
As a bonus it allows new vga card types (including none).
Acked-by: Andreas Färber <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 1ddcae82a2509668b94a13e84921bdcafddcdfff
https://github.com/qemu/qemu/commit/1ddcae82a2509668b94a13e84921bdcafddcdfff
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/spapr.c
Log Message:
-----------
ppc/pSeries: use the new pci_vga_init() function
Keep the case to prevent some vga card to be selected.
Cc: Alexander Graf <address@hidden>
Cc: David Gibson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: f2898771435701df33145cacabeb42c6aa3a9a16
https://github.com/qemu/qemu/commit/f2898771435701df33145cacabeb42c6aa3a9a16
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/sun4u.c
Log Message:
-----------
sun/sun4u: use the new pci_vga_init() function
As a bonus it allows new vga card types (including none).
Acked-by: Blue Swirl <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 16094b75b38dcb5582810bd4149fa8336a939dc8
https://github.com/qemu/qemu/commit/16094b75b38dcb5582810bd4149fa8336a939dc8
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/pc.c
Log Message:
-----------
pc: use the new pci_vga_init() and isa_vga_init() functions
The CONFIG_SPICE is now tested in vl.c and thus not needed anymore.
Cc: Anthony Liguori <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: f642dfce199eecda5a558ce94c17a34707d63ccd
https://github.com/qemu/qemu/commit/f642dfce199eecda5a558ce94c17a34707d63ccd
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/mips_r4k.c
Log Message:
-----------
mips/r4k: use the new is_vga_init() function
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 457ebdcd91aa7f0df094e12a8c46235f0c7d4f9b
https://github.com/qemu/qemu/commit/457ebdcd91aa7f0df094e12a8c46235f0c7d4f9b
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M hw/cirrus_vga.c
M hw/pc.h
M hw/vga-pci.c
R hw/vga-pci.h
M hw/vmware_vga.c
R hw/vmware_vga.h
M sysemu.h
Log Message:
-----------
vga: cleanup after isa_vga_init() and pci_vga_init() conversion
Now that all machines call isa_vga_init() or pci_vga_init(), some unused
code can be removed.
Cc: Anthony Liguori <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: bcc66562ad185e9c2a667b00426f625e2489bda9
https://github.com/qemu/qemu/commit/bcc66562ad185e9c2a667b00426f625e2489bda9
Author: Richard Henderson <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M tcg/s390/tcg-target.c
M tcg/tcg.h
Log Message:
-----------
tcg: Add is_unsigned_cond
Before we rearrange the TCG_COND enumeration, add a predicate for
the (single) use of comparisons vs TCGCond.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 0aed257f08444feb6269d0c302b35a8fb10fcb3f
https://github.com/qemu/qemu/commit/0aed257f08444feb6269d0c302b35a8fb10fcb3f
Author: Richard Henderson <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M tcg/arm/tcg-target.c
M tcg/hppa/tcg-target.c
M tcg/i386/tcg-target.c
M tcg/optimize.c
M tcg/ppc/tcg-target.c
M tcg/ppc64/tcg-target.c
M tcg/s390/tcg-target.c
M tcg/sparc/tcg-target.c
M tcg/tcg-op.h
M tcg/tcg.c
M tcg/tcg.h
Log Message:
-----------
tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYS
There are several cases that can be handled easier inside both
translators and code generators if we have out-of-band values
for conditions. It's easy enough to handle ALWAYS and NEVER in
the natural way inside the tcg middle-end.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: d1e321b82a021c2e86d204af870356bc72b22546
https://github.com/qemu/qemu/commit/d1e321b82a021c2e86d204af870356bc72b22546
Author: Richard Henderson <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M tcg/hppa/tcg-target.c
M tcg/tcg.h
Log Message:
-----------
tcg: Add tcg_high_cond
The table that was recently added for hppa is generally usable.
And with the renumbering of the TCG_COND constants it's not too
difficult to compute rather than have a table.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 1d31fca470648ec66afd8743491bfb5846306341
https://github.com/qemu/qemu/commit/1d31fca470648ec66afd8743491bfb5846306341
Author: Stefan Weil <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M qemu-barrier.h
Log Message:
-----------
qemu-barrier: Fix compilation on i386 hosts
Commit 610b823ef66b993660f1ab1447a769f190e4f3b3 uses QEMU_GNUC_PREREQ
on i386 hosts.
That macro is defined in qemu-common.h which is not always included
before qemu-barrier.h, so compilation on i386 hosts was broken.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 6b2f90fbbd31d594238098f46ef63ee307a12f55
https://github.com/qemu/qemu/commit/6b2f90fbbd31d594238098f46ef63ee307a12f55
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M MAINTAINERS
M device_tree.c
M device_tree.h
M hw/ppc/e500.c
M hw/ppc405_uc.c
M hw/spapr.c
M hw/spapr.h
M hw/spapr_hcall.c
M hw/spapr_iommu.c
M hw/spapr_pci.c
M hw/spapr_rtas.c
M hw/spapr_vio.c
M hw/spapr_vio.h
M hw/xics.c
M hw/xics.h
M target-ppc/cpu.h
M target-ppc/int_helper.c
M target-ppc/kvm.c
M target-ppc/kvm_ppc.h
M target-ppc/machine.c
M target-ppc/translate_init.c
Log Message:
-----------
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (35 commits)
PPC: KVM: Fix BAT put
PPC: e500: Only expose even TLB sizes in initial TLB
ppc/pseries: Reset VPA registration on CPU reset
pseries: Don't test for MSR_PR for hypercalls under KVM
PPC: e500: calculate initrd_base like dt_base
PPC: e500: increase DTC_LOAD_PAD
device tree: simplify dumpdtb code
fdt: move dumpdtb interpretation code to device_tree.c
target-ppc: Remove unused power_mode field from cpu state
pseries: Set hash table size based on RAM size
pseries: Remove unnecessary locking from PAPR hash table hcalls
ppc405_uc: Fix buffer overflow
target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab()
pseries: Fix semantics of RTAS int-on, int-off and set-xive functions
pseries: Rework implementation of TCE bypass
pseries: Remove never used flags field from spapr vio devices
pseries: Remove XICS irq type enum type
pseries: Remove C bitfields from xics code
pseries: Small cleanup to H_CEDE implementation
pseries: Fix XICS reset
...
Commit: 048d3612a51b3da45081091b734f93428925ebf8
https://github.com/qemu/qemu/commit/048d3612a51b3da45081091b734f93428925ebf8
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M block/qed-table.c
M blockdev.c
M configure
M cpus.c
M hw/9pfs/virtio-9p.c
M hw/blizzard.c
M hw/bt-hci.c
M hw/device-hotplug.c
M hw/exynos4210_combiner.c
M hw/exynos4210_gic.c
M hw/exynos4210_mct.c
M hw/fdc.c
M hw/framebuffer.c
M hw/ide/macio.c
M hw/ivshmem.c
M hw/leon3.c
M hw/megasas.c
M hw/mips_fulong2e.c
M hw/msix.c
M hw/nand.c
M hw/onenand.c
M hw/pflash_cfi01.c
M hw/pflash_cfi02.c
M hw/pxa2xx_keypad.c
M hw/qdev.c
M hw/sb16.c
M hw/scsi-disk.c
M hw/sd.c
M hw/tcx.c
M hw/usb/dev-uas.c
M hw/usb/hcd-ohci.c
M hw/usb/hcd-xhci.c
M hw/versatilepb.c
M hw/xen_domainbuild.c
M libcacard/vcard.c
M libcacard/vcard_emul_nss.c
M libcacard/vreader.c
M linux-user/signal.c
M os-posix.c
M qemu-common.h
M qemu-sockets.c
M qga/commands-posix.c
M qga/commands-win32.c
M savevm.c
M slirp/ip_icmp.h
M slirp/ip_input.c
M slirp/tcp_input.c
M slirp/udp.c
M target-unicore32/translate.c
M tcg/arm/tcg-target.c
M ui/vnc-auth-sasl.c
M ui/vnc-tls.c
M vl.c
M xen-all.c
Log Message:
-----------
Merge branch 'trivial-patches' of git://github.com/stefanha/qemu
* 'trivial-patches' of git://github.com/stefanha/qemu:
versatilepb: Use symbolic indices for ARM PIC
qdev: kill bogus comment
qemu-barrier: Fix compiler version check for future gcc versions
hw: Add missing 'static' attribute for QEMUMachine
cleanup useless return sentence
qemu-sockets: Fix compiler warning (regression for MinGW)
vnc: Fix spelling (hellmen -> hellman) in comment
slirp: Fix spelling in comment (enought -> enough, insure -> ensure)
tcg/arm: Use tcg_out_mov_reg rather than inline equivalent code
cpu: Add missing 'static' attribute to qemu_global_mutex
configure: Support empty target list (--target-list=)
hw: Fix return value check for bdrv_read, bdrv_write
Commit: 046dbab95f33e007428190610d638d2fcaf37fdf
https://github.com/qemu/qemu/commit/046dbab95f33e007428190610d638d2fcaf37fdf
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-06 (Sat, 06 Oct 2012)
Changed paths:
M cpu-all.h
M cpu-exec.c
M cpus.c
M exec.c
M monitor.c
M target-arm/cpu.h
M target-arm/helper.h
M target-arm/op_helper.c
M target-arm/translate.c
M target-i386/cpu.c
M target-i386/cpu.h
M target-i386/helper.c
M target-i386/seg_helper.c
M target-i386/smm_helper.c
Log Message:
-----------
Merge branch 'target-arm.for-upstream' of
git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
target-arm: Drop unused DECODE_CPREG_CRN macro
target-arm: use deposit instead of hardcoded version
target-arm: mark a few integer helpers const and pure
target-arm: convert sar, shl and shr helpers to TCG
target-arm: convert add_cc and sub_cc helpers to TCG
target-arm: use globals for CC flags
target-arm: Reinstate display of VFP registers in cpu_dump_state
cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
Compare: https://github.com/qemu/qemu/compare/c9159fe9aa9a...046dbab95f33
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