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[Qemu-commits] [COMMIT 6458421] tcg/x86_64: add support for ext{8, 16,
From: |
Anthony Liguori |
Subject: |
[Qemu-commits] [COMMIT 6458421] tcg/x86_64: add support for ext{8, 16, 32}u_i{32, 64} TCG ops |
Date: |
Sun, 04 Oct 2009 12:00:01 -0000 |
From: Aurelien Jarno <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index b4ba65f..5c829e7 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -1181,6 +1181,21 @@ static inline void tcg_out_op(TCGContext *s, int opc,
const TCGArg *args,
case INDEX_op_ext32s_i64:
tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
break;
+ case INDEX_op_ext8u_i32:
+ tcg_out_modrm(s, 0xb6 | P_EXT | P_REXB, args[0], args[1]);
+ break;
+ case INDEX_op_ext16u_i32:
+ tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
+ break;
+ case INDEX_op_ext8u_i64:
+ tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, args[0], args[1]);
+ break;
+ case INDEX_op_ext16u_i64:
+ tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, args[0], args[1]);
+ break;
+ case INDEX_op_ext32u_i64:
+ tcg_out_modrm(s, 0x8b, args[0], args[1]);
+ break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
@@ -1355,6 +1370,11 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ INDEX_op_ext8s_i64, { "r", "r"} },
{ INDEX_op_ext16s_i64, { "r", "r"} },
{ INDEX_op_ext32s_i64, { "r", "r"} },
+ { INDEX_op_ext8u_i32, { "r", "r"} },
+ { INDEX_op_ext16u_i32, { "r", "r"} },
+ { INDEX_op_ext8u_i64, { "r", "r"} },
+ { INDEX_op_ext16u_i64, { "r", "r"} },
+ { INDEX_op_ext32u_i64, { "r", "r"} },
{ INDEX_op_qemu_ld8u, { "r", "L" } },
{ INDEX_op_qemu_ld8s, { "r", "L" } },
diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h
index 8d47e78..3ca392f 100644
--- a/tcg/x86_64/tcg-target.h
+++ b/tcg/x86_64/tcg-target.h
@@ -70,6 +70,12 @@ enum {
#define TCG_TARGET_HAS_ext8s_i64
#define TCG_TARGET_HAS_ext16s_i64
#define TCG_TARGET_HAS_ext32s_i64
+#define TCG_TARGET_HAS_ext8u_i32
+#define TCG_TARGET_HAS_ext16u_i32
+#define TCG_TARGET_HAS_ext8u_i64
+#define TCG_TARGET_HAS_ext16u_i64
+#define TCG_TARGET_HAS_ext32u_i64
+
#define TCG_TARGET_HAS_rot_i32
#define TCG_TARGET_HAS_rot_i64
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- [Qemu-commits] [COMMIT 6458421] tcg/x86_64: add support for ext{8, 16, 32}u_i{32, 64} TCG ops,
Anthony Liguori <=