[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [COMMIT 3aa8098] microblaze: Compute masks for alignment
From: |
Anthony Liguori |
Subject: |
[Qemu-commits] [COMMIT 3aa8098] microblaze: Compute masks for alignment checks attranslation time. |
Date: |
Thu, 03 Sep 2009 20:37:08 -0000 |
From: Edgar E. Iglesias <address@hidden>
Thanks to Blue Swirl for reporting.
Signed-off-by: Edgar E. Iglesias <address@hidden>
diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c
index 2cc4ced..89dbc0c 100644
--- a/target-microblaze/op_helper.c
+++ b/target-microblaze/op_helper.c
@@ -206,27 +206,18 @@ uint32_t helper_pcmpbf(uint32_t a, uint32_t b)
return 0;
}
-void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t size)
+void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t mask)
{
- uint32_t mask;
-
- switch (size) {
- case 4: mask = 3; break;
- case 2: mask = 1; break;
- default:
- case 1: mask = 0; break;
- }
-
if (addr & mask) {
- qemu_log("unaligned access addr=%x size=%d, wr=%d\n",
- addr, size, wr);
+ qemu_log("unaligned access addr=%x mask=%x, wr=%d\n",
+ addr, mask, wr);
if (!(env->sregs[SR_MSR] & MSR_EE)) {
return;
}
env->sregs[SR_ESR] = ESR_EC_UNALIGNED_DATA | (wr << 10) \
| (dr & 31) << 5;
- if (size == 4) {
+ if (mask == 3) {
env->sregs[SR_ESR] |= 1 << 11;
}
helper_raise_exception(EXCP_HW_EXCP);
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 3c69160..b180d24 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -814,7 +814,7 @@ static void dec_load(DisasContext *dc)
/* Verify alignment if needed. */
if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
gen_helper_memalign(*addr, tcg_const_tl(dc->rd),
- tcg_const_tl(0), tcg_const_tl(size));
+ tcg_const_tl(0), tcg_const_tl(size - 1));
}
if (dc->rd) {
@@ -858,7 +858,7 @@ static void dec_store(DisasContext *dc)
/* Verify alignment if needed. */
if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
gen_helper_memalign(*addr, tcg_const_tl(dc->rd),
- tcg_const_tl(1), tcg_const_tl(size));
+ tcg_const_tl(1), tcg_const_tl(size - 1));
}
gen_store(dc, *addr, cpu_R[dc->rd], size);
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-commits] [COMMIT 3aa8098] microblaze: Compute masks for alignment checks attranslation time.,
Anthony Liguori <=